Cape: 4 UARTS: Correct SPI pin constraints.
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- sources/FPGA-design/script_support/components/CAPE/4_UARTS/ADD_CAPE.tcl 4 additions, 3 deletions...esign/script_support/components/CAPE/4_UARTS/ADD_CAPE.tcl
- sources/FPGA-design/script_support/components/CAPE/4_UARTS/constraints/cape.pdc 3 additions, 1 deletion...ript_support/components/CAPE/4_UARTS/constraints/cape.pdc
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