- May 25, 2023
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Robert Nelson authored
6.1.26-ti-arm64-r1 bb.org_defconfig 6.1 TI Delta: https://github.com/RobertCNelson/ti-linux-kernel/compare/5618571dbfea8f91cafc5595ec360037da9fd5ac...30bcc25e7cb1b25667db88d61828728f0f0b5f4b AUFS: https://github.com/sfjro/aufs-standalone/commit/80bbd686e8be627d87bfa0ede768c2a52843647f WIRELESS_REGDB: https://git.kernel.org/pub/scm/linux/kernel/git/sforshee/wireless-regdb.git/commit/?id=43f81b4d0819ae1f9f6e31af7f563e9135aec9b6 KSMBD: https://github.com/cifsd-team/ksmbd/commit/11aa06fbc7307b3ff68ebbdb96d42484d9b5ae6a WPANUSB: https://git.beagleboard.org/beagleconnect/linux/wpanusb/-/commit/6aa9bf65b9d88a2c9a111e7b4aed03de2be9413d BCFSERIAL: https://git.beagleboard.org/beagleconnect/linux/bcfserial/-/commit/db467023bd136c97c2e13c3a8b9e41dbdfafbc66 Signed-off-by:
Robert Nelson <robertcnelson@gmail.com>
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Robert Nelson authored
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Robert Nelson authored
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Robert Nelson authored
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Robert Nelson authored
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Nishanth Menon authored
The adcxx4s communicates with a host processor via an SPI/Microwire Bus interface. The device family responds with 12bit data, of which the LSB bits are transmitted by the lower resolution devices as 0. We don't need to mess with ADC108S102_BITS as a result for the lower resolution devices. I have been able to test adc102s051, hence adding just the missing ones in that family. Lets reuse the driver to support the family of devices with name ADC<bb><c>S<sss>, where * bb is the resolution in number of bits (8, 10, 12) * c is the number of channels (1, 2, 4, 8) * sss is the maximum conversion speed (021 for 200 kSPS, 051 for 500 kSPS and 101 for 1 MSPS) Complete datasheets are available at TI's website here: https://www.ti.com/lit/gpn/adc<bb><c>s<sss>.pdf Also see: drivers/hwmon/adcxx.c Link: https://lore.kernel.org/linux-iio/20220701042919.18180-3-nm@ti.com/ Signed-off-by:
Nishanth Menon <nm@ti.com>
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Nishanth Menon authored
The adcxx4s communicates with a host processor via an SPI/Microwire Bus interface. The device family responds with 12bit data, of which the LSB bits are 0 for the lower resolution devices. I have been able to test adc102s051, hence adding just the missing ones in that family. Lets reuse the binding to support the family of devices with name ADC<bb><c>S<sss>, where * bb is the resolution in number of bits (8, 10, 12) * c is the number of channels (1, 2, 4, 8) * sss is the maximum conversion speed (021 for 200 kSPS, 051 for 500 kSPS and 101 for 1 MSPS) Complete datasheets are available at TI's website here: https://www.ti.com/lit/gpn/adc<bb><c>s<sss>.pdf Handling of 8, 10 and 12 bits converters are the same, the unavailable bits are 0 in LSB :) Inspired-by: drivers/hwmon/adcxx.c Link: https://lore.kernel.org/linux-iio/20220701042919.18180-2-nm@ti.com/ Signed-off-by:
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Robert Nelson authored
Reference: v6.1.29 Signed-off-by: -
Robert Nelson authored
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Matthijs van Duin authored
"uio" for generic use "ti,pruss-shmem" for backwards compatibility the of_id module parameter is still supported to add another id
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Matthijs van Duin authored
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Robert Nelson authored
Reference: v5.10.180 Signed-off-by: -
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Robert Nelson authored
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Jason Kridner authoredFrom https://github.com/statropy/wpanusb
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Robert Nelson authored
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Robert Nelson authored
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Robert Nelson authored
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Robert Nelson authored
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- May 22, 2023
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Nas Chung authored
This patch enables the 48bit addressing support which was limited to 32 bit. Change dma_mask value so that wave5 driver can allow 48bit memory address. Change the u32 type address variable to dma_addr_t to allow 48bit address. Get high_address(higher 16bit) value from common_memory dma address. Signed-off-by:
Nas Chung <nas.chung@chipsnmedia.com> Signed-off-by:
Prasanth Babu Mantena <p-mantena@ti.com> Tested-by:
Devarsh Thakkar <devarsht@ti.com> Signed-off-by:
Brandon Brnich <b-brnich@ti.com> Reviewed-by:
Andrew Davis <afd@ti.com> Acked-by:
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Disable MCU R5F firmware on AM62a since it is causing a DM crash while trying to boot MCU R5F firmware. Signed-off-by:
Vignesh Raghavendra <vigneshr@ti.com>
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Vignesh Raghavendra authored
This driver causes boot instability and random hangs with no apparent error message, sometimes DM firmware crashes leading to communication timeouts on Linux side. Keep it disabled until rootcaused. Acked-by:
Praneeth Bajjuri <praneeth@ti.com> Signed-off-by:
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- May 19, 2023
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commit a2116e7b upstream. Enable crypto test module, used for testing crypto engine performance. Signed-off-by:
Kamlesh Gurudasani <kamlesh@ti.com> Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Jayesh Choudhary <j-choudhary@ti.com> Signed-off-by:
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Add PCIe configuration for j784s4 platform which has 4x lane support. Tested-by:
Achal Verma <a-verma1@ti.com> Signed-off-by:
Matt Ranostay <mranostay@ti.com> Reviewed-by:
Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/linux-pci/20230401112633.2406604-6-a-verma1@ti.com Signed-off-by:
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Add definition for j784s4-pci-ep + j784s4-pci-host devices along with schema checks for num-lanes. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/linux-pci/20230401112633.2406604-5-a-verma1@ti.com Signed-off-by:
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Add support for setting of two-bit field that allows selection of 4x lane PCIe which was previously limited to only 2x lanes. Signed-off-by:
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Various platforms have different maximum amount of lanes that can be selected. Add max_lanes to struct j721e_pcie to allow for detection of this which is needed to calculate the needed bitmask size for the possible lane count. Signed-off-by:
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Add num-lanes schema checks based on compatible string on available lanes for that platform. Signed-off-by:
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IMX390 is a 2.1MP raw (bayer) sensor, the rugged camera module by D3 [1] packages it with an FPDLink-III serializer (DS90UB953) for use with sensor fusion setups using FPDLink-III deserializer boards. Add overlays for the cases when the modules are connected to ports on the second instance of DS90UB960 deserializer in fusion EVM. Also add product URL to the D3 IMX390 overlays that were missing them. 1 - https://www.d3engineering.co/product/designcore-d3rcm-imx390-953-rugged-camera-module/ Signed-off-by:
Vaishnav Achath <vaishnav.a@ti.com> Signed-off-by:
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Fusion application board [1] can be used to connect multiple FPDLink-III based sensors to TI EVMs. Upto 8x sensors can simultaneously stream over the two CSI RX ports on J721S2 and J721E. CSI2RX connectivity in J784S4 is same as that on J721S2 so the same fusion overlay can be reused. Also reorder the J721E entries in makefile which were not in alphabetical order and add product URL in overlays where it was missing. Link: https://svtronics.com/portfolio/evm577pfusion-v1-0-fusion/ [1] Signed-off-by:
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Add OV5640 overlays for J721S2 Common Processor Board and J784S4 EVM, both platforms have MIPI CSI connector to which LI OV5640 camera can be attached for CSI2RX based streaming. Signed-off-by:
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Enable main_i2c5 instance which is the camera control I2C interface for the CSI2 instances on J784S4 and also enable the TCA6408 GPIO expander on main_i2c5. CSI2RX instance 0 and instance 1 are routed to the Samtec MIPI connector 0 and CSI2RX instance is routed to the MIPI connector 1 (CSI2-EXP-AUX) connector on the EVM thus enable them as well. Signed-off-by:
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Enable main_i2c5 instance which is the camera control I2C interface for the CSI2 instances on J721S2 and also enable the TCA6408 GPIO expander on main_i2c5. CSI2RX instances which are routed to the Samtec MIPI connector on the common processor board thus enable them as well. Signed-off-by:
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J784S4 has two instances of CSI2RX capture subsytem, Add nodes for the three instances of Cadence CSI2RX, DPHY, and TI CSI2RX wrapper and keep them disabled by default. Signed-off-by:
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J721S2 has two instances of CSI2RX capture subsytem, Add nodes for the two instances of Cadence CSI2RX, DPHY, and TI CSI2RX wrapper and keep them disabled by default. Signed-off-by:
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J784S4 has dedicated BCDMA controller for Camera Serial Interface. Events from the BCDMA controller instance are routed through the main UDMA interrupt aggregator as unmapped events. Signed-off-by:
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