- Jan 12, 2023
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Lucas Tamborrino authored
Update hal_espressif to latest revision Signed-off-by:
Lucas Tamborrino <lucas.tamborrino@espressif.com>
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Lucas Tamborrino authored
Add ESP32C3 support for uart async api test Signed-off-by:
Lucas Tamborrino <lucas.tamborrino@espressif.com>
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Lucas Tamborrino authored
Add UART async support for ESP32C3 Signed-off-by:
Lucas Tamborrino <lucas.tamborrino@espressif.com>
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Lucas Tamborrino authored
Add esp32c3 support to DMA tests Signed-off-by:
Lucas Tamborrino <lucas.tamborrino@espressif.com>
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Lucas Tamborrino authored
Add GDMA driver for esp32c3. Signed-off-by:
Lucas Tamborrino <lucas.tamborrino@espressif.com>
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Lucas Tamborrino authored
Add GDMA node to esp32c3. Signed-off-by:
Lucas Tamborrino <lucas.tamborrino@espressif.com>
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Guillaume Lager authored
Add a note on removed BOOT_TRAILER_IMG_STATUS_OFFS macro and its replacement functions Signed-off-by:
Guillaume Lager <g.lager@innoseis.com>
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Guillaume Lager authored
BOOT_MAGIC_SZ and BOOT_MAX_ALIGN were used in the header without including bootutil/bootutil_public.h. This change remove the need of the inclusion by making the dependency private. Fixes #52095 Signed-off-by:
Guillaume Lager <g.lager@innoseis.com>
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Ravi Dondaputi authored
Add and delete options to configure IPv6 address and route from shell. Signed-off-by:
Ravi Dondaputi <ravi.dondaputi@nordicsemi.no>
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Ravi Dondaputi authored
Add support to configure IP address using net shell. Signed-off-by:
Ravi Dondaputi <ravi.dondaputi@nordicsemi.no>
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Krishna T authored
Fix a bug in setting MAC address using net_if API, the API doesn't do a memcpy but just stores the pointer and shell was passing stack pointer. We can use dynamic allocation but freeing the memory for the MAC address would be trickier, so, use the net management API and let the underlying drivers figure out the MAC address memory management. Signed-off-by:
Krishna T <krishna.t@nordicsemi.no>
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Krishna T authored
Validate MAC address before setting, add new helper APIs to cover all cases. Signed-off-by:
Krishna T <krishna.t@nordicsemi.no>
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Gerard Marull-Paretas authored
Add initial support for the nPM1100 EK. The EK is expected to be connected to Arduino header pins (D2/3/4/5). Signed-off-by:
Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
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Gerard Marull-Paretas authored
While nPM1100 is to be operated in fixed configuration for some applications, it has some degree of configuration via GPIOs. For example, mode (auto/PWM) can be configured via MODE pin. VBUS current can also be adjusted using ISET pin, even though there is no API yet to limit the PMIC input current. This patch adds a new regulator class driver for nPM1100 PMIC, so that it can be used with the standard regulator API when needed. Signed-off-by:
Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
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Michał Barnaś authored
It is recommended that choices in Kconfig have names so this commit adds missing one for the type of host commands peripheral. Signed-off-by:
Michał Barnaś <mb@semihalf.com>
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Tom Burdick authored
Adds a quick note about what the simulation platorm metadata for twister. Signed-off-by:
Tom Burdick <thomas.burdick@intel.com>
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Tom Burdick authored
It's enough that the rtio tests run once per each unique (arch, simulation) platform. Signed-off-by:
Tom Burdick <thomas.burdick@intel.com>
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Tom Burdick authored
Ensures the log_api tests only run once per unique (arch, simulator) platform. Signed-off-by:
Tom Burdick <thomas.burdick@intel.com>
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Tom Burdick authored
Adds an option to inform twister a testsuite should only be built and run for platforms with unique sets of attributes. This enables for example keying on unique (arch, simulation) platforms to run the test suite on. The most common usage may be test suites configured to run once per (arch, simulation) pair as being enough. Additional information about platforms may enable running a test once per hardware IP block or once per soc family or soc avoiding duplicated effort in building and running tests when once suffices. Signed-off-by:
Tom Burdick <thomas.burdick@intel.com>
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Mateusz Sierszulski authored
This commit enables entropy driver on EFR32BG22 SoC. Signed-off-by:
Mateusz Sierszulski <msierszulski@antmicro.com>
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Mirko Bottarelli authored
In file stm32l412.dtsi, spi2 was missing fifo compatibility, this way failing to initialise fifo threshold correctly when spi data width is configured. Signed-off-by:
Mirko Bottarelli <mirko.bottarelli@gmail.com>
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Marco Peter authored
STM32Gxxx controllers only have a single APB bus. Signed-off-by:
Marco Peter <marco.peter@joylab.ch>
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Emil Gydesen authored
There is special handling done for resolved addresses to convert them to "regular" addresses for the upper layers. This commits adds two helper functions to check if they are resolved, and if so, then properly copied. Signed-off-by:
Emil Gydesen <emil.gydesen@nordicsemi.no>
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Emil Gydesen authored
We only expose random/public address types to the upper layers. This is done by checking if the address type of events are resolved addresses, and if so, then we translate them to public/random. Signed-off-by:
Emil Gydesen <emil.gydesen@nordicsemi.no>
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Andrzej Głąbek authored
The value in this bitfield is provided in the two's complement form, so it requires special handling. Previously, it was read as just an unsigned value and this could result in a wrongly computed CAPVALUE. Signed-off-by:
Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
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Erwan Gouriou authored
In some case, we may need to describe a domain clock for a device while there is no way to configure it (ex: USB clock set on PLL_Q output on F405 devices > It is not selectable). Then, configuring a device clock domain in the clock_control driver will allow to retrieve its subsys rate. Signed-off-by:
Erwan Gouriou <erwan.gouriou@linaro.org>
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Erwan Gouriou authored
stm32f427 + crypto = stm32f437 Signed-off-by:
Erwan Gouriou <erwan.gouriou@linaro.org>
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Erwan Gouriou authored
Add f4 binding files to provide DCKCFGR registers description to enable clock selection for F410/F427/F446 variant lines Signed-off-by:
Erwan Gouriou <erwan.gouriou@linaro.org>
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Erwan Gouriou authored
Add rng definition to f410. Though, don't inherit directly in f412 as it's integrated in a different way. Signed-off-by:
Erwan Gouriou <erwan.gouriou@linaro.org>
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Erwan Gouriou authored
In order to ease description of DCKCFG regsiters, make f412 a variant of f410 as it supposed to be. Only exception is missing DAC1. Signed-off-by:
Erwan Gouriou <erwan.gouriou@linaro.org>
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Dominik Ermel authored
MCUmgr Kconfig replacement table has been missing a few entries. Signed-off-by:
Dominik Ermel <dominik.ermel@nordicsemi.no>
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Florian Grandel authored
As we have to provide LL addresses in big endian to userspace to be POSIX compliant and we also do not want to reserve extra space for such addresses, bff6a5cc introduced a change that swaps address bytes in place in the packet before returning the packet with LL address pointers to userspace. Unfortunately a regression sneaked into the code base while doing so: The byte swapping was duplicated when using 6LoWPAN compression and the byte swapping caused decryption to fail in some cases, see #53630. This commit fixes the problem. Fixes: #53630 Signed-off-by:
Florian Grandel <jerico.dev@gmail.com>
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Jamie McCrae authored
Allows specifying board revisions when configuring target images with sysbuild. Signed-off-by:
Jamie McCrae <jamie.mccrae@nordicsemi.no>
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Krishna T authored
The L2 networking layer checks for return value from enable, but Ethernet is not checking and always returns 0, so, relay the return value from the Ethernet driver to networking stack. This fixes the issue of interface start failing but interface still being up. Signed-off-by:
Krishna T <krishna.t@nordicsemi.no>
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Gerson Fernando Budke authored
This add storage abstraction to allow switch between different flash APIs. This remove the erase command at updatehub core and move it to storage init phase. Signed-off-by:
Gerson Fernando Budke <gerson.budke@ossystems.com.br>
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Gerson Fernando Budke authored
Currently MCUboot and system reset are invoked directly in the sample applicatiion. This introduce 2 new methods to isolate system from application. Signed-off-by:
Gerson Fernando Budke <gerson.budke@ossystems.com.br>
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Gerson Fernando Budke authored
Move header includes to source file. Currently firmware source files have a hardcode partition identificator. This moves identificators to updatehub core. Signed-off-by:
Gerson Fernando Budke <gerson.budke@ossystems.com.br>
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Gerson Fernando Budke authored
Move headers from header includes to source file. Signed-off-by:
Gerson Fernando Budke <gerson.budke@ossystems.com.br>
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Siddharth Chandrasekaran authored
The CP app sends PD a "command" and the PD responds to it. Some times, the PD has something that it wants to tell the PD which it does so in response to POLL command. Both CP and PD apps need a way to exchange these info over the OSDP bus. To archive this we will introduce what are called "events" that allow the PD app to enqueue and CP app to get notified. This is analogous to the incumbent "commands" abstraction where, the CP app enqueues a command and the PD app gets notified of it. Signed-off-by:
Siddharth Chandrasekaran <sidcha.dev@gmail.com>
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Siddharth Chandrasekaran authored
For all commands and replies, the buffer length needed to build or the length of data needed to decode needs to be checked and asserted. Right now we do this by ad-hoc if-s. Add macros that do this at a common location. Signed-off-by:
Siddharth Chandrasekaran <sidcha.dev@gmail.com>
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