- Jan 05, 2021
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Tom Rini authored
Signed-off-by:
Tom Rini <trini@konsulko.com>
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- Jan 04, 2021
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Tom Rini authored
- Assorted fixes
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Marc Ferland authored
This commit fixes a simple typo: sPL --> SPL. Signed-off-by:
Marc Ferland <ferlandm@amotus.ca>
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Philippe Reynes authored
This commits add a check on the command ubi rename. This check avoids to rename a volume to with a name that is already used on another ubi volume. If two volumes has the same name, then the ubi device can't be mounted anymore. Signed-off-by:
Philippe Reynes <philippe.reynes@softathome.com>
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Igor Opaniuk authored
My address at Toradex doesn't exist anymore, map this address to my personal email. Signed-off-by:
Igor Opaniuk <igor.opaniuk@gmail.com> Reviewed-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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Heinrich Schuchardt authored
make htmldocs results in an error: doc/android/boot-image.rst:33: WARNING: Unparseable C cross-reference: 'struct andr_img_hdr' Invalid C declaration: Expected identifier in nested name, got keyword: struct [error at 6] Follow the style prescribed in https://www.kernel.org/doc/html/latest/doc-guide/kernel-doc.html#highlights-and-cross-references Add missing definite article. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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Stefan Agner authored
There might be hardware configurations where 64-bit data accesses to NVMe registers are not supported properly. This patch removes the readq/writeq so always two 32-bit accesses are used to read/write 64-bit NVMe registers, similarly as it is done in Linux kernel. This patch fixes operation of NVMe devices on RPi4 Broadcom BCM2711 SoC based board, where the PCIe Root Complex, which is attached to the system through the SCB bridge. Even though the architecture is 64-bit the PCIe BAR is 32-bit and likely the 64-bit wide register accesses initiated by the CPU are not properly translated to a sequence of 32-bit PCIe accesses. nvme_readq(), for example, always returns same value in upper and lower 32-bits, e.g. 0x3c033fff3c033fff which lead to NVMe devices to fail probing. This fix is analogous to commit 8e2ab050 ("usb: xhci: Use only 32-bit accesses in xhci_writeq/xhci_readq"). Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Cc: Matthias Brugger <mbrugger@suse.com> Reviewed-by:
Stefan Roese <sr@denx.de> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Signed-off-by:
Stefan Agner <stefan@agner.ch>
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- Dec 29, 2020
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https://gitlab.denx.de/u-boot/custodians/u-boot-efiTom Rini authored
Pull request for UEFI sub-system for efi-2021-01-rc5 (2) The following errors in the UEFI sub-system are fixed: * use after free in efi_exit() * invalid free when using the boot manager * pressing escape key once not recognized
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- Dec 28, 2020
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Heinrich Schuchardt authored
Do not use data from the loaded image object after deleting it. Fixes: 126a43f1 ("efi_loader: unload applications upon Exit()") Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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Heinrich Schuchardt authored
Add the missing description of some fields of struct efi_loaded_image_obj. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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Heinrich Schuchardt authored
Add missing commas. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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Heinrich Schuchardt authored
load_options passed from do_efibootmgr() to do_bootefi_exec() may contain invalid data from the stack which will lead to an invalid free(). Fixes: 0ad64007 ("efi_loader: set load options in boot manager") Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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Heinrich Schuchardt authored
Up to now the escape key was not correctly detected in UEFI applications. We had to hit it twice for a single escape to be recognized. Use a 10 ms delay to detect if we are dealing with the escape key or an escape sequence. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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Heinrich Schuchardt authored
IS_ENABLED() contains parentheses. But we should still put extra parentheses around it in an if statement for readability. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imxTom Rini authored
Fixes for 2021.1 ---------------- CI: https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/5680 - fixes for Variscite dart6ul - imx8mp : increase malloc area - fixes for bx50v3 - imx8m: HS400ES and UHS for EVK - imx8qm-rom7720: fix phy bind
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https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini authored
- Fix "Assert PERST# signal when unloading driver" in a37xx PCI driver (Pali) - Fix SPL on armada-xp-gp (add u-boot,dm-pre-reloc and alias) (myself)
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This reverts commit 828d3262. This change revers code which asserting PERST# signal when unloading driver. Driver's remove callback is still there as it is used for other functionality. Asserting PERST# signal prior booting kernel is causing that A3720 boards (Turris MOX and Espressobin) with stable Linux kernel versions 4.14 and 4.19 are not able to detect some PCIe cards (e.g. Compex WLE200 and WLE900) and anymore. When PERST# signal is not asserted these cards are detected correctly. As this is regression for existing stable Linux kernel versions revert this problematic change in U-Boot. To make cards working with OpenWRT 4.14 kernel it is needed to disable link training prior booting kernel, which is already done in driver's remove callback. Described issue is in Linux kernel pci aardvark driver which is (hopefully) fixed in latest upstream versions. Latest upstream versions should be able to initialize PCIe bus and detects cards independently of the link training and PERST# signal state. So with this change, U-Boot on A3720 boards should be able to boot OpenWRT 4.14 kernel, stable 4.14 and 4.19 kernels and also latest mainline kernels. Signed-off-by:
Pali Rohár <pali@kernel.org> Reviewed-by:
Stefan Roese <sr@denx.de>
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Stefan Roese authored
For correct spi bus detection the spi0 alias is needed in the DT. Otherwise this error will ocurr in U-Boot: Invalid bus 0 (err=-19) Failed to initialize SPI flash at 0:0 (error -19) Signed-off-by:
Stefan Roese <sr@denx.de> Cc: Dennis Gilmore <dgilmore@redhat.com> Tested-by:
Dennis Gilmore <dgilmore@redhat.com>
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Stefan Roese authored
Add some missing "u-boot,dm-pre-reloc;" properties to UART0, SPI controller and SPI NOR flash node to enable usage in SPL. Otherwise these devices will not be available. Signed-off-by:
Stefan Roese <sr@denx.de> Cc: Dennis Gilmore <dgilmore@redhat.com> Tested-by:
Dennis Gilmore <dgilmore@redhat.com>
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- Dec 26, 2020
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Marc Ferland authored
Use 0x%2lx to print the i2c bus base address in hexadecimal format instead of printing as an integer. Signed-off-by:
Marc Ferland <ferlandm@amotus.ca> Reviewed-by:
Fabio Estevam <festevam@gmail.com>
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Heinrich Schuchardt authored
Use %u and not %d for unsigned values. Print kHz and not khz. Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by:
Peng Fan <peng.fan@nxp.com>
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Marc Ferland authored
The dart6ul has an i2c eeprom at 0x50 which contains, among other things, the manufacturing/revision/options info of the SoM. This patch replaces the current checkboard() implementation with a more exhaustive one based on the content of the eeprom. Since this code uses the new driver model, some changes were also required in the DTS to make the nodes related to i2c available before relocation. This code was inspired from the supported u-boot code from Variscite which can be found here: https://github.com/varigit/uboot-imx/tree/imx_v2018.03_4.14.78_1.0.0_ga_var02 New output example: Board: PN: VSM-6UL-705B, Assy: AS1812142257, Date: 2019 Feb 17 Storage: eMMC, Wifi: yes, DDR: 1024 MiB, Rev: 2.4G Signed-off-by:
Marc Ferland <ferlandm@amotus.ca> Reviewed-by:
Fabio Estevam <festevam@gmail.com>
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Marc Ferland authored
The eeprom at address 0x50 is a BR24G04NUX-3TTR. It has a 4Kbit (512x8) capacity, change the compatible string to reflect this fact. Also, add an alias to easily refer to this eeprom with fdt_path_offset() which will be in another commit. Signed-off-by:
Marc Ferland <ferlandm@amotus.ca> Reviewed-by:
Fabio Estevam <festevam@gmail.com>
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Igor Opaniuk authored
Hand over maintainership of Toradex SoMs (that I was responsible of) to Oleksandr because of my resignation from Toradex, as such I will have no immediate involvement with these modules and as a result not able to continue maintaining these boards. CC: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by:
Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by:
Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Acked-by:
Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
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Fabio Estevam authored
When booting imx8mp-evk the following allocation error message is seen: U-Boot 2021.01-rc3-00200-ge668bec96a5f (Dec 21 2020 - 14:36:42 -0300) alloc space exhausted Fix it by increasing CONFIG_SYS_MALLOC_F_LEN to 0x10000 like it is done on other i.MX8MM/8MN boards. Reported-by:
Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Signed-off-by:
Fabio Estevam <festevam@gmail.com> Tested-by:
Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Reviewed-by:
Peng Fan <peng.fan@nxp.com>
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Clément Péron authored
Calling ahab_close cmd force the user to interact for confirmation. This is not user-friendly when using this cmd during factory process. Allow the user to pass '-y' option to bypass this confirmation. Signed-off-by:
Clément Péron <peron.clem@gmail.com> Reviewed-by:
Peng Fan <peng.fan@nxp.com> Acked-by:
Oliver Graute <oliver.graute@kococonnector.com>
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Sebastian Reichel authored
The current PHY rework does the following things: 1. Configure 125MHz clock 2. Setup the TX clock delay (RX is enabled by default), 3. Setup reserved bits to avoid voltage peak The clock delays are nowadays already configured by the PHY driver (in ar803x_delay_config). The code for that can simply be dropped. The clock speed can also be configured by the PHY driver by adding the device tree property "qca,clk-out-frequency". What is left is setting up the undocumented reserved bits to avoid the voltage peak problem. I slightly improved its documentation while updating the board's PHY rework code. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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Sebastian Reichel authored
Instead of hardcoding index magic numbers in the board code, also rely on board_fit_config_name_match choosing the right config for the fitImage containing the kernel. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-efiTom Rini authored
Pull request for UEFI sub-system for efi-2021-01-rc5 * In the Standalone MM based implementation of UEFI variables check the internal OP-TEE return code
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Ilias Apalodimas authored
When opening an OP-TEE session we need to check the internal return value of OP-TEE call arguments as well the return code of the function itself. The code was also ignoring to close the OP-TEE session in case the shared memory registration failed. Fixes: f042e47e ("efi_loader: Implement EFI variable handling via OP-TEE") Signed-off-by:
Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by:
Heinrich Schuchardt <xypron.glpk@gmx.de>
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Sebastian Reichel authored
Add a host_build() function, so that it's possible to check for software being build with USE_HOSTCC without relying on preprocessor conditions. In other words #ifdef USE_HOSTCC host_only_code(); #endif can be written like this instead: if (host_build()) host_only_code(); This improves code readability and test coverage and compiler will eleminate this unreachable code. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Fabio Estevam authored
After the conversion to device tree the board information becomes redundant: Model: Freescale i.MX6 Quad Plus SABRE Smart Device Board Board: MX6-SabreSD Remove the printing of the board information. Signed-off-by:
Fabio Estevam <festevam@gmail.com> Reviewed-by:
Peng Fan <peng.fan@nxp.com>
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Andrey Zhizhikin authored
i.MX8M series includes support for high speed modes in uSDHC controllers. Turn on corresponding configuration options for EVK boards, which would enable high speed modes to be included in U-Boot. Signed-off-by:
Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
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Andrey Zhizhikin authored
i.MX8M series provide support for high speed grades in their usdhc controllers, which has eMMC and SDHC connected to them. Enable this support across the entire i.MX8M family by providing quirks to usdhc controllers designated by storage media connected to them. Signed-off-by:
Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Ye Li <ye.li@nxp.com>
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Andrey Zhizhikin authored
Some SD Card controller and power circuitry has increased capacitance, which keeps the internal logic remains powered after regulator is switch off. This is generally the case when card is switched to SD104 mode, where a power cycle should be performed. In case if the card internal logic remains powered, it causes a subsequent failure of mode transition, effectively leading to failed enumeration. Introduce a delay of 20 msec in order to provide a possibility for internal card circuitry to drain voltages and perform a power cycle correctly. Similar fix is done in commit c49d0ac3 ("ARM: dts: rmobile: Increase off-on delay on the SD Vcc regulator") targeted Renesas SOCs. Signed-off-by:
Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Cc: Stefano Babic <sbabic@denx.de>
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Adam Ford authored
The i.MX8MM is capable of HS400. Enable it in both U-Boot and SPL for faster throughput. Signed-off-by:
Adam Ford <aford173@gmail.com>
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Adam Ford authored
There have been some updates to the device trees, so re-sync. Signed-off-by:
Adam Ford <aford173@gmail.com> Acked-by:
Peng Fan <peng.fan@nxp.com>
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Adam Ford authored
There have been some updates to the device tree since 5.6. This also includes some clocks, and makes it easier to keep board device tree files in sync with Linux Signed-off-by:
Adam Ford <aford173@gmail.com> Acked-by:
Peng Fan <peng.fan@nxp.com>
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Adam Ford authored
Import clock bindings header file from Linux 5.10-rc6 Signed-off-by:
Adam Ford <aford173@gmail.com> Acked-by:
Peng Fan <peng.fan@nxp.com>
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Oliver Graute authored
Fixed wrong PHY Interface Mode As per kernel commit 0672d22a1924 ("ARM: dts: imx: Fix the AR803X phy-mode) the correct phy-mode should be "rgmii-id", so fix it accordingly to fix the Ethernet regression. This problem has been exposed by commit: commit 13114f38 Fix the phy-mode accordingly to fix the regression. Signed-off-by:
Oliver Graute <oliver.graute@kococonnector.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Vladimir Oltean <vladimir.oltean@nxp.com>
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