diff --git a/sources/MSS_Configuration/MSS_Configuration.cfg b/sources/MSS_Configuration/MSS_Configuration.cfg
index f2d7c78152af09ba20d9733d46b19a726335691c..9bdd7865cf4565ed5311f8847a8b85b993eeffce 100644
--- a/sources/MSS_Configuration/MSS_Configuration.cfg
+++ b/sources/MSS_Configuration/MSS_Configuration.cfg
@@ -21,6 +21,7 @@ CRYPTO_MSS_CLK_FREQ                                 200
 CRYPTO_USE_EMBEDDED_DLL                             true
 DDR3_ADDRESS_MIRROR                                 false
 DDR3_ADDRESS_ORDERING                               CHIP_ROW_BANK_COL
+DDR3_ADVANCED_CA_TRAINING                           false
 DDR3_BANK_ADDR_WIDTH                                3
 DDR3_BURST_LENGTH                                   0
 DDR3_CAS_ADDITIVE_LATENCY                           0
@@ -34,6 +35,9 @@ DDR3_CONTROLLER_DQS_DRIVE                           34
 DDR3_CONTROLLER_DQS_ODT                             60
 DDR3_CONTROLLER_DQ_DRIVE                            34
 DDR3_CONTROLLER_DQ_ODT                              120
+DDR3_DEGREE0                                        0
+DDR3_DEGREE45                                       1
+DDR3_DEGREE90                                       2
 DDR3_DM_MODE                                        DM
 DDR3_DQDQS_TRAINING_OFFSET                          1
 DDR3_ENABLE_ECC                                     false
@@ -41,6 +45,7 @@ DDR3_ENABLE_LOOKAHEAD_PRECHARGE_ACTIVATE            false
 DDR3_MEMORY_FORMAT                                  COMPONENT
 DDR3_NB_CLKS                                        1
 DDR3_NB_RANKS                                       1
+DDR3_NUMBER_OF_OFFSETS                              4
 DDR3_ODT_ENABLE_RD_RNK0_ODT0                        false
 DDR3_ODT_ENABLE_RD_RNK0_ODT1                        false
 DDR3_ODT_ENABLE_RD_RNK1_ODT0                        false
@@ -49,6 +54,10 @@ DDR3_ODT_ENABLE_WR_RNK0_ODT0                        false
 DDR3_ODT_ENABLE_WR_RNK0_ODT1                        false
 DDR3_ODT_ENABLE_WR_RNK1_ODT0                        false
 DDR3_ODT_ENABLE_WR_RNK1_ODT1                        false
+DDR3_OFFSET0                                        0
+DDR3_OFFSET1                                        1
+DDR3_OFFSET2                                        2
+DDR3_OFFSET3                                        3
 DDR3_OUTPUT_DRIVE_STRENGTH                          RZQ6
 DDR3_PARTIAL_ARRAY_SELF_REFRESH                     FULL
 DDR3_READ_BURST_TYPE                                SEQUENTIAL
@@ -75,6 +84,7 @@ DDR3_ZQ_CAL_L_TIME                                  256
 DDR3_ZQ_CAL_S_TIME                                  64
 DDR4_ADDRESS_MIRROR                                 false
 DDR4_ADDRESS_ORDERING                               CHIP_ROW_BG_BANK_COL
+DDR4_ADVANCED_CA_TRAINING                           false
 DDR4_AUTO_SELF_REFRESH                              3
 DDR4_BANK_ADDR_WIDTH                                2
 DDR4_BANK_GROUP_ADDRESS_WIDTH                       1
@@ -91,6 +101,9 @@ DDR4_CONTROLLER_DQS_DRIVE                           48
 DDR4_CONTROLLER_DQS_ODT                             120
 DDR4_CONTROLLER_DQ_DRIVE                            48
 DDR4_CONTROLLER_DQ_ODT                              120
+DDR4_DEGREE0                                        0
+DDR4_DEGREE45                                       1
+DDR4_DEGREE90                                       2
 DDR4_DM_MODE                                        DM
 DDR4_DQDQS_TRAINING_OFFSET                          1
 DDR4_ENABLE_ECC                                     false
@@ -101,6 +114,7 @@ DDR4_INTERNAL_VREF_MONITER                          0
 DDR4_MEMORY_FORMAT                                  COMPONENT
 DDR4_NB_CLKS                                        1
 DDR4_NB_RANKS                                       1
+DDR4_NUMBER_OF_OFFSETS                              4
 DDR4_ODT_ENABLE_RD_RNK0_ODT0                        false
 DDR4_ODT_ENABLE_RD_RNK0_ODT1                        false
 DDR4_ODT_ENABLE_RD_RNK1_ODT0                        false
@@ -109,6 +123,10 @@ DDR4_ODT_ENABLE_WR_RNK0_ODT0                        false
 DDR4_ODT_ENABLE_WR_RNK0_ODT1                        false
 DDR4_ODT_ENABLE_WR_RNK1_ODT0                        false
 DDR4_ODT_ENABLE_WR_RNK1_ODT1                        false
+DDR4_OFFSET0                                        0
+DDR4_OFFSET1                                        1
+DDR4_OFFSET2                                        2
+DDR4_OFFSET3                                        3
 DDR4_OUTPUT_DRIVE_STRENGTH                          RZQ7
 DDR4_POWERDOWN_INPUT_BUFFER                         1
 DDR4_READ_BURST_TYPE                                SEQUENTIAL
@@ -598,7 +616,9 @@ LOCK_DOWN_B4_IOS                                    false
 LOCK_DOWN_DDR_IOS                                   false
 LOCK_DOWN_SGMII_IOS                                 false
 LPDDR3_ADDRESS_ORDERING                             CHIP_ROW_BANK_COL
+LPDDR3_ADVANCED_CA_TRAINING                         false
 LPDDR3_BANK_ADDR_WIDTH                              3
+LPDDR3_CLK_DISABLE_IN_SELF_REFRESH                  false
 LPDDR3_CLOCK_DDR                                    666
 LPDDR3_COL_ADDR_WIDTH                               11
 LPDDR3_CONTROLLER_ADD_CMD_DRIVE                     40
@@ -608,14 +628,24 @@ LPDDR3_CONTROLLER_DQS_ODT                           120
 LPDDR3_CONTROLLER_DQ_DRIVE                          48
 LPDDR3_CONTROLLER_DQ_ODT                            120
 LPDDR3_DATA_LATENCY                                 RL10WL6
+LPDDR3_DEGREE0                                      0
+LPDDR3_DEGREE45                                     1
+LPDDR3_DEGREE90                                     2
 LPDDR3_DM_MODE                                      DM
 LPDDR3_DQDQS_TRAINING_OFFSET                        1
 LPDDR3_DQ_ODT                                       DISABLE
+LPDDR3_ENABLE_DDR_SELF_REFRESH                      false
 LPDDR3_ENABLE_ECC                                   false
 LPDDR3_ENABLE_LOOKAHEAD_PRECHARGE_ACTIVATE          false
+LPDDR3_IDLE_TIME_TO_SELF_REFRESH                    0
 LPDDR3_MEMORY_FORMAT                                COMPONENT
+LPDDR3_NUMBER_OF_OFFSETS                            4
 LPDDR3_ODT_ENABLE_RD_RNK0_ODT0                      false
 LPDDR3_ODT_ENABLE_WR_RNK0_ODT0                      false
+LPDDR3_OFFSET0                                      0
+LPDDR3_OFFSET1                                      1
+LPDDR3_OFFSET2                                      2
+LPDDR3_OFFSET3                                      3
 LPDDR3_OUTPUT_DRIVE_STRENGTH                        PDPU34P3
 LPDDR3_POWERDOWN_ODT                                0
 LPDDR3_ROW_ADDR_WIDTH                               14
@@ -640,8 +670,10 @@ LPDDR3_ZQ_CAL_L_TIME                                360
 LPDDR3_ZQ_CAL_R_TIME                                50
 LPDDR3_ZQ_CAL_S_TIME                                90
 LPDDR4_ADDRESS_ORDERING                             CHIP_ROW_BANK_COL
+LPDDR4_ADVANCED_CA_TRAINING                         false
 LPDDR4_BANK_ADDR_WIDTH                              3
 LPDDR4_CA_ODT                                       RZQ4
+LPDDR4_CLK_DISABLE_IN_SELF_REFRESH                  false
 LPDDR4_CLOCK_DDR                                    800.0
 LPDDR4_COL_ADDR_WIDTH                               10
 LPDDR4_CONTROLLER_ADD_CMD_DRIVE                     40
@@ -650,16 +682,26 @@ LPDDR4_CONTROLLER_DQS_DRIVE                         40
 LPDDR4_CONTROLLER_DQS_ODT                           120
 LPDDR4_CONTROLLER_DQ_DRIVE                          40
 LPDDR4_CONTROLLER_DQ_ODT                            120
+LPDDR4_DEGREE0                                      0
+LPDDR4_DEGREE45                                     1
+LPDDR4_DEGREE90                                     2
 LPDDR4_DM_MODE                                      DM
 LPDDR4_DQDQS_TRAINING_OFFSET                        1
 LPDDR4_DQ_ODT                                       RZQ2
 LPDDR4_DRIVE_STRENGTH                               RZQ6
+LPDDR4_ENABLE_DDR_SELF_REFRESH                      false
 LPDDR4_ENABLE_ECC                                   false
 LPDDR4_ENABLE_LOOKAHEAD_PRECHARGE_ACTIVATE          false
+LPDDR4_IDLE_TIME_TO_SELF_REFRESH                    0
 LPDDR4_MEMORY_FORMAT                                COMPONENT
+LPDDR4_NUMBER_OF_OFFSETS                            4
 LPDDR4_ODTE_CA                                      0
 LPDDR4_ODTE_CK                                      0
 LPDDR4_ODTE_CS                                      0
+LPDDR4_OFFSET0                                      0
+LPDDR4_OFFSET1                                      1
+LPDDR4_OFFSET2                                      2
+LPDDR4_OFFSET3                                      3
 LPDDR4_PULLUP_CAL                                   VDDQ2P5
 LPDDR4_RD_POSTAMBLE                                 CK0P5
 LPDDR4_RD_PREAMBLE                                  STATIC
@@ -722,7 +764,7 @@ MSSIO_0_LPMD_IBUF                                   false
 MSSIO_0_LPMD_OBUF                                   false
 MSSIO_0_LP_PERSIST                                  false
 MSSIO_0_MD_IBUF                                     true
-MSSIO_0_OUT_DRIVE                                   10
+MSSIO_0_OUT_DRIVE                                   8
 MSSIO_0_RES_PULL                                    UP
 MSSIO_0_SCHMITT_TRIGGER                             false
 MSSIO_10_ATP_EN                                     false
@@ -731,7 +773,7 @@ MSSIO_10_LPMD_IBUF                                  false
 MSSIO_10_LPMD_OBUF                                  false
 MSSIO_10_LP_PERSIST                                 false
 MSSIO_10_MD_IBUF                                    true
-MSSIO_10_OUT_DRIVE                                  10
+MSSIO_10_OUT_DRIVE                                  8
 MSSIO_10_RES_PULL                                   UP
 MSSIO_10_SCHMITT_TRIGGER                            false
 MSSIO_11_ATP_EN                                     false
@@ -740,7 +782,7 @@ MSSIO_11_LPMD_IBUF                                  false
 MSSIO_11_LPMD_OBUF                                  false
 MSSIO_11_LP_PERSIST                                 false
 MSSIO_11_MD_IBUF                                    true
-MSSIO_11_OUT_DRIVE                                  10
+MSSIO_11_OUT_DRIVE                                  8
 MSSIO_11_RES_PULL                                   UP
 MSSIO_11_SCHMITT_TRIGGER                            false
 MSSIO_12_ATP_EN                                     false
@@ -821,7 +863,7 @@ MSSIO_1_LPMD_IBUF                                   false
 MSSIO_1_LPMD_OBUF                                   false
 MSSIO_1_LP_PERSIST                                  false
 MSSIO_1_MD_IBUF                                     true
-MSSIO_1_OUT_DRIVE                                   10
+MSSIO_1_OUT_DRIVE                                   8
 MSSIO_1_RES_PULL                                    UP
 MSSIO_1_SCHMITT_TRIGGER                             false
 MSSIO_20_ATP_EN                                     false
@@ -920,7 +962,7 @@ MSSIO_2_LPMD_IBUF                                   false
 MSSIO_2_LPMD_OBUF                                   false
 MSSIO_2_LP_PERSIST                                  false
 MSSIO_2_MD_IBUF                                     true
-MSSIO_2_OUT_DRIVE                                   10
+MSSIO_2_OUT_DRIVE                                   8
 MSSIO_2_RES_PULL                                    UP
 MSSIO_2_SCHMITT_TRIGGER                             false
 MSSIO_30_ATP_EN                                     false
@@ -1001,7 +1043,7 @@ MSSIO_3_LPMD_IBUF                                   false
 MSSIO_3_LPMD_OBUF                                   false
 MSSIO_3_LP_PERSIST                                  false
 MSSIO_3_MD_IBUF                                     true
-MSSIO_3_OUT_DRIVE                                   10
+MSSIO_3_OUT_DRIVE                                   8
 MSSIO_3_RES_PULL                                    UP
 MSSIO_3_SCHMITT_TRIGGER                             false
 MSSIO_4_ATP_EN                                      false
@@ -1010,7 +1052,7 @@ MSSIO_4_LPMD_IBUF                                   false
 MSSIO_4_LPMD_OBUF                                   false
 MSSIO_4_LP_PERSIST                                  false
 MSSIO_4_MD_IBUF                                     true
-MSSIO_4_OUT_DRIVE                                   10
+MSSIO_4_OUT_DRIVE                                   8
 MSSIO_4_RES_PULL                                    UP
 MSSIO_4_SCHMITT_TRIGGER                             false
 MSSIO_5_ATP_EN                                      false
@@ -1019,7 +1061,7 @@ MSSIO_5_LPMD_IBUF                                   false
 MSSIO_5_LPMD_OBUF                                   false
 MSSIO_5_LP_PERSIST                                  false
 MSSIO_5_MD_IBUF                                     true
-MSSIO_5_OUT_DRIVE                                   10
+MSSIO_5_OUT_DRIVE                                   8
 MSSIO_5_RES_PULL                                    UP
 MSSIO_5_SCHMITT_TRIGGER                             false
 MSSIO_6_ATP_EN                                      false
@@ -1029,7 +1071,7 @@ MSSIO_6_LPMD_OBUF                                   false
 MSSIO_6_LP_PERSIST                                  false
 MSSIO_6_MD_IBUF                                     true
 MSSIO_6_OUT_DRIVE                                   8
-MSSIO_6_RES_PULL                                    UP
+MSSIO_6_RES_PULL                                    DOWN
 MSSIO_6_SCHMITT_TRIGGER                             false
 MSSIO_7_ATP_EN                                      false
 MSSIO_7_CLAMP_DIODE                                 false
@@ -1037,7 +1079,7 @@ MSSIO_7_LPMD_IBUF                                   false
 MSSIO_7_LPMD_OBUF                                   false
 MSSIO_7_LP_PERSIST                                  false
 MSSIO_7_MD_IBUF                                     true
-MSSIO_7_OUT_DRIVE                                   10
+MSSIO_7_OUT_DRIVE                                   8
 MSSIO_7_RES_PULL                                    UP
 MSSIO_7_SCHMITT_TRIGGER                             false
 MSSIO_8_ATP_EN                                      false
@@ -1046,7 +1088,7 @@ MSSIO_8_LPMD_IBUF                                   false
 MSSIO_8_LPMD_OBUF                                   false
 MSSIO_8_LP_PERSIST                                  false
 MSSIO_8_MD_IBUF                                     true
-MSSIO_8_OUT_DRIVE                                   10
+MSSIO_8_OUT_DRIVE                                   8
 MSSIO_8_RES_PULL                                    UP
 MSSIO_8_SCHMITT_TRIGGER                             false
 MSSIO_9_ATP_EN                                      false
@@ -1055,7 +1097,7 @@ MSSIO_9_LPMD_IBUF                                   false
 MSSIO_9_LPMD_OBUF                                   false
 MSSIO_9_LP_PERSIST                                  false
 MSSIO_9_MD_IBUF                                     true
-MSSIO_9_OUT_DRIVE                                   10
+MSSIO_9_OUT_DRIVE                                   8
 MSSIO_9_RES_PULL                                    UP
 MSSIO_9_SCHMITT_TRIGGER                             false
 MSSIO_REFCLK_IOSTD                                  LVDS25
@@ -1071,7 +1113,7 @@ MSS_PLLOUT_FREQ                                     600.000
 MSS_PMP_ENABLE                                      false
 MSS_REFCLK                                          DEDICATED_IO
 PACKAGE                                             FCVG484
-PFSOC_MSS_VERSION                                   2022.3
+PFSOC_MSS_VERSION                                   2023.2
 PLL_NW_REFCLK0_FREQ                                 100
 PLL_NW_REFCLK1_FREQ                                 125
 PMP_CAN0_CONTEXT_A_EN                               true