From ad1bb9c01fdcdaacc5e3eac58ae3920cf87608ec Mon Sep 17 00:00:00 2001 From: vauban353 <vauban353@gmail.com> Date: Sat, 22 Jun 2024 17:36:47 +0100 Subject: [PATCH] Cape: Add LEDs to device tree overlays. --- .../device-tree-overlay/cape-gpios.dtso | 77 ++++++++++++++++++ .../device-tree-overlay/cape-gpios.dtso | 71 +++++++++++++++++ .../GPIOS/device-tree-overlay/cape-gpios.dtso | 77 ++++++++++++++++++ .../NONE/device-tree-overlay/cape-gpios.dtso | 79 +++++++++++++++++++ .../device-tree-overlay/robotics-cape.dtso | 77 ++++++++++++++++++ .../device-tree-overlay/verilog-cape.dtso | 77 ++++++++++++++++++ .../device-tree-overlay/verilog-cape.dtso | 71 +++++++++++++++++ 7 files changed, 529 insertions(+) diff --git a/sources/FPGA-design/script_support/components/CAPE/4_UARTS/device-tree-overlay/cape-gpios.dtso b/sources/FPGA-design/script_support/components/CAPE/4_UARTS/device-tree-overlay/cape-gpios.dtso index 5ef50fbb..d74a91f0 100644 --- a/sources/FPGA-design/script_support/components/CAPE/4_UARTS/device-tree-overlay/cape-gpios.dtso +++ b/sources/FPGA-design/script_support/components/CAPE/4_UARTS/device-tree-overlay/cape-gpios.dtso @@ -68,6 +68,83 @@ clocks = <&fabric_clk3>; }; }; + + leds { + compatible = "gpio-leds"; + + led_P8_03 { + status = "okay"; + gpios = <&gpio2 0 0>; + default-state = "on"; + }; + + led_P8_04 { + status = "okay"; + gpios = <&gpio2 1 0>; + default-state = "on"; + }; + + led_P8_05 { + status = "okay"; + gpios = <&gpio2 2 0>; + default-state = "on"; + }; + + led_P8_06 { + status = "okay"; + gpios = <&gpio2 3 0>; + linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + + led_P8_07 { + status = "okay"; + gpios = <&gpio2 4 0>; + default-state = "off"; + }; + + led_P8_08 { + status = "okay"; + gpios = <&gpio2 5 0>; + default-state = "off"; + }; + + led_P8_09 { + status = "okay"; + gpios = <&gpio2 6 0>; + default-state = "off"; + }; + + led_P8_10 { + status = "okay"; + gpios = <&gpio2 7 0>; + default-state = "off"; + }; + + led_P8_11 { + status = "okay"; + gpios = <&gpio2 8 0>; + default-state = "off"; + }; + + led_P8_12 { + status = "okay"; + gpios = <&gpio2 9 0>; + default-state = "off"; + }; + + led_P8_13 { + status = "okay"; + gpios = <&gpio2 10 0>; + default-state = "off"; + }; + + led_P8_14 { + status = "okay"; + gpios = <&gpio2 11 0>; + default-state = "off"; + }; + }; }; &gpio2 { diff --git a/sources/FPGA-design/script_support/components/CAPE/DEFAULT/device-tree-overlay/cape-gpios.dtso b/sources/FPGA-design/script_support/components/CAPE/DEFAULT/device-tree-overlay/cape-gpios.dtso index 7dca6fcb..036f7e10 100644 --- a/sources/FPGA-design/script_support/components/CAPE/DEFAULT/device-tree-overlay/cape-gpios.dtso +++ b/sources/FPGA-design/script_support/components/CAPE/DEFAULT/device-tree-overlay/cape-gpios.dtso @@ -68,6 +68,77 @@ clocks = <&fabric_clk3>; }; }; + + leds { + compatible = "gpio-leds"; + + led_P8_03 { + status = "okay"; + gpios = <&gpio2 0 0>; + default-state = "on"; + }; + + led_P8_04 { + status = "okay"; + gpios = <&gpio2 1 0>; + default-state = "on"; + }; + + led_P8_05 { + status = "okay"; + gpios = <&gpio2 2 0>; + default-state = "on"; + }; + + led_P8_06 { + status = "okay"; + gpios = <&gpio2 3 0>; + linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + + led_P8_07 { + status = "okay"; + gpios = <&gpio2 4 0>; + default-state = "off"; + }; + + led_P8_08 { + status = "okay"; + gpios = <&gpio2 5 0>; + default-state = "off"; + }; + + led_P8_09 { + status = "okay"; + gpios = <&gpio2 6 0>; + default-state = "off"; + }; + + led_P8_10 { + status = "okay"; + gpios = <&gpio2 7 0>; + default-state = "off"; + }; + + led_P8_11 { + status = "okay"; + gpios = <&gpio2 8 0>; + default-state = "off"; + }; + + led_P8_12 { + status = "okay"; + gpios = <&gpio2 9 0>; + default-state = "off"; + }; + + led_P8_14 { + status = "okay"; + gpios = <&gpio2 11 0>; + default-state = "off"; + }; + }; }; &gpio2 { diff --git a/sources/FPGA-design/script_support/components/CAPE/GPIOS/device-tree-overlay/cape-gpios.dtso b/sources/FPGA-design/script_support/components/CAPE/GPIOS/device-tree-overlay/cape-gpios.dtso index 377a17fe..f76b996f 100644 --- a/sources/FPGA-design/script_support/components/CAPE/GPIOS/device-tree-overlay/cape-gpios.dtso +++ b/sources/FPGA-design/script_support/components/CAPE/GPIOS/device-tree-overlay/cape-gpios.dtso @@ -42,6 +42,83 @@ "P9_42"; }; }; + + leds { + compatible = "gpio-leds"; + + led_P8_03 { + status = "okay"; + gpios = <&gpio2 0 0>; + default-state = "on"; + }; + + led_P8_04 { + status = "okay"; + gpios = <&gpio2 1 0>; + default-state = "on"; + }; + + led_P8_05 { + status = "okay"; + gpios = <&gpio2 2 0>; + default-state = "on"; + }; + + led_P8_06 { + status = "okay"; + gpios = <&gpio2 3 0>; + linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + + led_P8_07 { + status = "okay"; + gpios = <&gpio2 4 0>; + default-state = "off"; + }; + + led_P8_08 { + status = "okay"; + gpios = <&gpio2 5 0>; + default-state = "off"; + }; + + led_P8_09 { + status = "okay"; + gpios = <&gpio2 6 0>; + default-state = "off"; + }; + + led_P8_10 { + status = "okay"; + gpios = <&gpio2 7 0>; + default-state = "off"; + }; + + led_P8_11 { + status = "okay"; + gpios = <&gpio2 8 0>; + default-state = "off"; + }; + + led_P8_12 { + status = "okay"; + gpios = <&gpio2 9 0>; + default-state = "off"; + }; + + led_P8_13 { + status = "okay"; + gpios = <&gpio2 10 0>; + default-state = "off"; + }; + + led_P8_14 { + status = "okay"; + gpios = <&gpio2 11 0>; + default-state = "off"; + }; + }; }; &gpio2 { diff --git a/sources/FPGA-design/script_support/components/CAPE/NONE/device-tree-overlay/cape-gpios.dtso b/sources/FPGA-design/script_support/components/CAPE/NONE/device-tree-overlay/cape-gpios.dtso index 83ae0e0f..109df6e1 100644 --- a/sources/FPGA-design/script_support/components/CAPE/NONE/device-tree-overlay/cape-gpios.dtso +++ b/sources/FPGA-design/script_support/components/CAPE/NONE/device-tree-overlay/cape-gpios.dtso @@ -10,6 +10,85 @@ }; }; +&{/} { + leds { + compatible = "gpio-leds"; + + led_P8_03 { + status = "okay"; + gpios = <&gpio2 0 0>; + default-state = "on"; + }; + + led_P8_04 { + status = "okay"; + gpios = <&gpio2 1 0>; + default-state = "on"; + }; + + led_P8_05 { + status = "okay"; + gpios = <&gpio2 2 0>; + default-state = "on"; + }; + + led_P8_06 { + status = "okay"; + gpios = <&gpio2 3 0>; + linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + + led_P8_07 { + status = "okay"; + gpios = <&gpio2 4 0>; + default-state = "off"; + }; + + led_P8_08 { + status = "okay"; + gpios = <&gpio2 5 0>; + default-state = "off"; + }; + + led_P8_09 { + status = "okay"; + gpios = <&gpio2 6 0>; + default-state = "off"; + }; + + led_P8_10 { + status = "okay"; + gpios = <&gpio2 7 0>; + default-state = "off"; + }; + + led_P8_11 { + status = "okay"; + gpios = <&gpio2 8 0>; + default-state = "off"; + }; + + led_P8_12 { + status = "okay"; + gpios = <&gpio2 9 0>; + default-state = "off"; + }; + + led_P8_13 { + status = "okay"; + gpios = <&gpio2 10 0>; + default-state = "off"; + }; + + led_P8_14 { + status = "okay"; + gpios = <&gpio2 11 0>; + default-state = "off"; + }; + }; +}; + &gpio2 { interrupts = <53>, <53>, <53>, <53>, <53>, <53>, <53>, <53>, diff --git a/sources/FPGA-design/script_support/components/CAPE/ROBOTICS/device-tree-overlay/robotics-cape.dtso b/sources/FPGA-design/script_support/components/CAPE/ROBOTICS/device-tree-overlay/robotics-cape.dtso index fedc4fc2..f940cd8b 100644 --- a/sources/FPGA-design/script_support/components/CAPE/ROBOTICS/device-tree-overlay/robotics-cape.dtso +++ b/sources/FPGA-design/script_support/components/CAPE/ROBOTICS/device-tree-overlay/robotics-cape.dtso @@ -67,5 +67,82 @@ symlink = "bone/pwm/2"; }; }; + + leds { + compatible = "gpio-leds"; + + led_P8_03 { + status = "okay"; + gpios = <&gpio2 0 0>; + default-state = "on"; + }; + + led_P8_04 { + status = "okay"; + gpios = <&gpio2 1 0>; + default-state = "on"; + }; + + led_P8_05 { + status = "okay"; + gpios = <&gpio2 2 0>; + default-state = "on"; + }; + + led_P8_06 { + status = "okay"; + gpios = <&gpio2 3 0>; + linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + + led_P8_07 { + status = "okay"; + gpios = <&gpio2 4 0>; + default-state = "off"; + }; + + led_P8_08 { + status = "okay"; + gpios = <&gpio2 5 0>; + default-state = "off"; + }; + + led_P8_09 { + status = "okay"; + gpios = <&gpio2 6 0>; + default-state = "off"; + }; + + led_P8_10 { + status = "okay"; + gpios = <&gpio2 7 0>; + default-state = "off"; + }; + + led_P8_11 { + status = "okay"; + gpios = <&gpio2 8 0>; + default-state = "off"; + }; + + led_P8_12 { + status = "okay"; + gpios = <&gpio2 9 0>; + default-state = "off"; + }; + + led_P8_13 { + status = "okay"; + gpios = <&gpio2 10 0>; + default-state = "off"; + }; + + led_P8_14 { + status = "okay"; + gpios = <&gpio2 11 0>; + default-state = "off"; + }; + }; }; diff --git a/sources/FPGA-design/script_support/components/CAPE/VERILOG_TEMPLATE/device-tree-overlay/verilog-cape.dtso b/sources/FPGA-design/script_support/components/CAPE/VERILOG_TEMPLATE/device-tree-overlay/verilog-cape.dtso index f9de1855..d90e87f6 100644 --- a/sources/FPGA-design/script_support/components/CAPE/VERILOG_TEMPLATE/device-tree-overlay/verilog-cape.dtso +++ b/sources/FPGA-design/script_support/components/CAPE/VERILOG_TEMPLATE/device-tree-overlay/verilog-cape.dtso @@ -33,5 +33,82 @@ "P8_43", "P8_44", "P8_45", "P8_46"; }; }; + + leds { + compatible = "gpio-leds"; + + led_P8_03 { + status = "okay"; + gpios = <&gpio2 0 0>; + default-state = "on"; + }; + + led_P8_04 { + status = "okay"; + gpios = <&gpio2 1 0>; + default-state = "on"; + }; + + led_P8_05 { + status = "okay"; + gpios = <&gpio2 2 0>; + default-state = "on"; + }; + + led_P8_06 { + status = "okay"; + gpios = <&gpio2 3 0>; + linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + + led_P8_07 { + status = "okay"; + gpios = <&gpio2 4 0>; + default-state = "off"; + }; + + led_P8_08 { + status = "okay"; + gpios = <&gpio2 5 0>; + default-state = "off"; + }; + + led_P8_09 { + status = "okay"; + gpios = <&gpio2 6 0>; + default-state = "off"; + }; + + led_P8_10 { + status = "okay"; + gpios = <&gpio2 7 0>; + default-state = "off"; + }; + + led_P8_11 { + status = "okay"; + gpios = <&gpio2 8 0>; + default-state = "off"; + }; + + led_P8_12 { + status = "okay"; + gpios = <&gpio2 9 0>; + default-state = "off"; + }; + + led_P8_13 { + status = "okay"; + gpios = <&gpio2 10 0>; + default-state = "off"; + }; + + led_P8_14 { + status = "okay"; + gpios = <&gpio2 11 0>; + default-state = "off"; + }; + }; }; diff --git a/sources/FPGA-design/script_support/components/CAPE/VERILOG_TUTORIAL/device-tree-overlay/verilog-cape.dtso b/sources/FPGA-design/script_support/components/CAPE/VERILOG_TUTORIAL/device-tree-overlay/verilog-cape.dtso index bd6f5522..c5c165e7 100644 --- a/sources/FPGA-design/script_support/components/CAPE/VERILOG_TUTORIAL/device-tree-overlay/verilog-cape.dtso +++ b/sources/FPGA-design/script_support/components/CAPE/VERILOG_TUTORIAL/device-tree-overlay/verilog-cape.dtso @@ -33,5 +33,76 @@ "P8_43", "P8_44", "P8_45", "P8_46"; }; }; + + leds { + compatible = "gpio-leds"; + + led_P8_03 { + status = "okay"; + gpios = <&gpio2 0 0>; + default-state = "on"; + }; + + led_P8_04 { + status = "okay"; + gpios = <&gpio2 1 0>; + default-state = "on"; + }; + + led_P8_05 { + status = "okay"; + gpios = <&gpio2 2 0>; + default-state = "on"; + }; + + led_P8_06 { + status = "okay"; + gpios = <&gpio2 3 0>; + linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + + led_P8_07 { + status = "okay"; + gpios = <&gpio2 4 0>; + default-state = "off"; + }; + + led_P8_09 { + status = "okay"; + gpios = <&gpio2 6 0>; + default-state = "off"; + }; + + led_P8_10 { + status = "okay"; + gpios = <&gpio2 7 0>; + default-state = "off"; + }; + + led_P8_11 { + status = "okay"; + gpios = <&gpio2 8 0>; + default-state = "off"; + }; + + led_P8_12 { + status = "okay"; + gpios = <&gpio2 9 0>; + default-state = "off"; + }; + + led_P8_13 { + status = "okay"; + gpios = <&gpio2 10 0>; + default-state = "off"; + }; + + led_P8_14 { + status = "okay"; + gpios = <&gpio2 11 0>; + default-state = "off"; + }; + }; }; -- GitLab