From 63f544691cadba491f32cb3b187da0cebecabc86 Mon Sep 17 00:00:00 2001
From: lorforlinux <deepaklorkhatri7@gmail.com>
Date: Thu, 11 Jun 2020 23:00:06 +0530
Subject: [PATCH 01/86] add comments to am5729-beagleboneai.dts
---
src/arm/am5729-beagleboneai.dts | 1169 ++++++++++++++-----------------
1 file changed, 541 insertions(+), 628 deletions(-)
diff --git a/src/arm/am5729-beagleboneai.dts b/src/arm/am5729-beagleboneai.dts
index 7b2f2585..057f2f00 100644
--- a/src/arm/am5729-beagleboneai.dts
+++ b/src/arm/am5729-beagleboneai.dts
@@ -753,693 +753,667 @@
/* P8_02 GND */
- /* P8_03 */
+ /* P8_03 (ball AB8) gpio1_24 */
P8_03_default_pin: pinmux_P8_03_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
P8_03_gpio_pin: pinmux_P8_03_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
P8_03_gpio_pu_pin: pinmux_P8_03_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
P8_03_gpio_pd_pin: pinmux_P8_03_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
P8_03_gpio_input_pin: pinmux_P8_03_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x379C, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x379C, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
- /* P8_04 */
+ /* P8_04 (ball AB5) gpio1_25 */
P8_04_default_pin: pinmux_P8_04_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
P8_04_gpio_pin: pinmux_P8_04_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
P8_04_gpio_pu_pin: pinmux_P8_04_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
P8_04_gpio_pd_pin: pinmux_P8_04_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
P8_04_gpio_input_pin: pinmux_P8_04_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37A0, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x37A0, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
- /* P8_05 */
+ /* P8_05 (ball AC9) gpio7_1 */
P8_05_default_pin: pinmux_P8_05_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
P8_05_gpio_pin: pinmux_P8_05_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
P8_05_gpio_pu_pin: pinmux_P8_05_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
P8_05_gpio_pd_pin: pinmux_P8_05_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
P8_05_gpio_input_pin: pinmux_P8_05_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x378C, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x378C, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
- /* P8_06 */
+ /* P8_06 (ball AC3) gpio7_2 */
P8_06_default_pin: pinmux_P8_06_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
P8_06_gpio_pin: pinmux_P8_06_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
P8_06_gpio_pu_pin: pinmux_P8_06_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
P8_06_gpio_pd_pin: pinmux_P8_06_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
P8_06_gpio_input_pin: pinmux_P8_06_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3790, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3790, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
- /* P8_07 */
+ /* P8_07 (ball G14) gpio6_5*/
P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
P8_07_gpio_pin: pinmux_P8_07_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
P8_07_gpio_pd_pin: pinmux_P8_07_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
P8_07_gpio_input_pin: pinmux_P8_07_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36EC, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36EC, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
P8_07_timer_pin: pinmux_P8_07_timer_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; };
+ DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr14.timer11 */
- /* P8_08 */
+ /* P8_08 (ball F14) gpio6_6 */
P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
P8_08_gpio_pin: pinmux_P8_08_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
P8_08_gpio_input_pin: pinmux_P8_08_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36F0, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36F0, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
P8_08_timer_pin: pinmux_P8_08_timer_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; };
+ DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr15.timer12 */
- /* P8_09 */
+ /* P8_09 (ball E17) gpio6_18 */
P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
P8_09_gpio_pin: pinmux_P8_09_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
P8_09_gpio_pd_pin: pinmux_P8_09_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
P8_09_gpio_input_pin: pinmux_P8_09_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3698, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3698, PIN_INPUT | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
P8_09_timer_pin: pinmux_P8_09_timer_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; };
+ DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* xref_clk1.timer14 */
- /* P8_10 */
+ /* P8_10 (ball A13) gpio6_4 */
P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
P8_10_gpio_pin: pinmux_P8_10_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
P8_10_gpio_pd_pin: pinmux_P8_10_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
P8_10_gpio_input_pin: pinmux_P8_10_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E8, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36E8, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
P8_10_timer_pin: pinmux_P8_10_timer_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; };
+ DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr13.timer10 */
- /* P8_11 */
+ /* P8_11 (ball AH4) gpio3_11 */
P8_11_default_pin: pinmux_P8_11_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
P8_11_gpio_pin: pinmux_P8_11_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
P8_11_gpio_pu_pin: pinmux_P8_11_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
P8_11_gpio_pd_pin: pinmux_P8_11_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
P8_11_gpio_input_pin: pinmux_P8_11_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3510, PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
P8_11_qep_pin: pinmux_P8_11_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; };
+ DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_d7.eQEP2B_in */
P8_11_pruout_pin: pinmux_P8_11_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d7.pr1_pru0_gpo4 */
- /* P8_12 */
+ /* P8_12 (ball AG6) gpio3_10 */
P8_12_default_pin: pinmux_P8_12_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
P8_12_gpio_pin: pinmux_P8_12_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
P8_12_gpio_pu_pin: pinmux_P8_12_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
P8_12_gpio_pd_pin: pinmux_P8_12_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
P8_12_gpio_input_pin: pinmux_P8_12_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x350C, PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
P8_12_qep_pin: pinmux_P8_12_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; };
+ DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_d6.eQEP2A_in */
P8_12_pruout_pin: pinmux_P8_12_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d6.pr1_pru0_gpo3 */
- /* P8_13 */
+ /* P8_13 (ball D3) gpio4_11 */
P8_13_default_pin: pinmux_P8_13_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
P8_13_gpio_pin: pinmux_P8_13_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
P8_13_gpio_pu_pin: pinmux_P8_13_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
P8_13_gpio_pd_pin: pinmux_P8_13_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
P8_13_gpio_input_pin: pinmux_P8_13_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
P8_13_pwm_pin: pinmux_P8_13_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; };
+ DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d10.ehrpwm2B */
- /* P8_14 */
+ /* P8_14 (ball D5) gpio4_13*/
P8_14_default_pin: pinmux_P8_14_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
P8_14_gpio_pin: pinmux_P8_14_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
P8_14_gpio_pu_pin: pinmux_P8_14_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
P8_14_gpio_pd_pin: pinmux_P8_14_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
P8_14_gpio_input_pin: pinmux_P8_14_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
P8_14_pwm_pin: pinmux_P8_14_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; };
+ DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d12.eCAP2_in_PWM2_out */
- /* P8_15a */
+ /* P8_15a (ball D1) gpio4_3*/
P8_15_default_pin: pinmux_P8_15_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
P8_15_gpio_pin: pinmux_P8_15_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
P8_15_gpio_input_pin: pinmux_P8_15_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3570, PIN_INPUT | MUX_MODE14) >; };
- P8_15_qep_pin: pinmux_P8_15_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE15) >; }; /* ?? eqep2_strobe available on P8.18*/
+ DRA7XX_CORE_IOPAD(0x3570, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
P8_15_pru_ecap_pin: pinmux_P8_15_pru_ecap_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE11) >; };
+ DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE11) >; }; /* vin2a_d2.pr1_ecap0_ecap_capin_apwm_o */
- /* P8_15b */
+ /* P8_15b (ball A3) gpio4_27 */
P8_15_pruin_pin: pinmux_P8_15_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B4, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x35B4, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d19.pr1_pru1_gpi16*/
- /* P8_16 */
+ /* P8_16 (ball B4) gpio4_29 */
P8_16_default_pin: pinmux_P8_16_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
P8_16_gpio_pin: pinmux_P8_16_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
P8_16_gpio_pu_pin: pinmux_P8_16_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
P8_16_gpio_pd_pin: pinmux_P8_16_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
P8_16_gpio_input_pin: pinmux_P8_16_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35BC, PIN_INPUT | MUX_MODE14) >; };
- P8_16_qep_pin: pinmux_P8_16_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE15) >; }; /* ?? eqep2_index available on P8.15*/
+ DRA7XX_CORE_IOPAD(0x35BC, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
P8_16_pruin_pin: pinmux_P8_16_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35BC, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x35BC, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d21.pr1_pru1_gpi18 */
- /* P8_17 */
+ /* P8_17 (ball A7) gpio8_18 */
P8_17_default_pin: pinmux_P8_17_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
P8_17_gpio_pin: pinmux_P8_17_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
P8_17_gpio_pu_pin: pinmux_P8_17_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
P8_17_gpio_pd_pin: pinmux_P8_17_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
P8_17_gpio_input_pin: pinmux_P8_17_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3624, PIN_INPUT | MUX_MODE14) >; };
- P8_17_pwm_pin: pinmux_P8_17_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE15) >; }; /* ?? ehrpwm0_synco */
+ DRA7XX_CORE_IOPAD(0x3624, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
- /* P8_18 */
+ /* P8_18 (ball F5) gpio4_9 */
P8_18_default_pin: pinmux_P8_18_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
P8_18_gpio_pin: pinmux_P8_18_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
P8_18_gpio_pu_pin: pinmux_P8_18_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
P8_18_gpio_pd_pin: pinmux_P8_18_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
P8_18_gpio_input_pin: pinmux_P8_18_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3588, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3588, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
+ P8_18_qep_pin: pinmux_P8_18_qep_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d8.eQEP2_strobe */
- /* P8_19 */
+ /* P8_19 (ball E6) gpio4_10 */
P8_19_default_pin: pinmux_P8_19_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
P8_19_gpio_pin: pinmux_P8_19_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
P8_19_gpio_pu_pin: pinmux_P8_19_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
P8_19_gpio_pd_pin: pinmux_P8_19_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
P8_19_gpio_input_pin: pinmux_P8_19_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x358C, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x358C, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
P8_19_pwm_pin: pinmux_P8_19_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; };
+ DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d9.ehrpwm2A */
- /* P8_20 (ZCZ ball V9) emmc */
+ /* P8_20 (ball AC4) gpio6_30 */
P8_20_default_pin: pinmux_P8_20_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
P8_20_gpio_pin: pinmux_P8_20_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
P8_20_gpio_pu_pin: pinmux_P8_20_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
P8_20_gpio_pd_pin: pinmux_P8_20_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
P8_20_gpio_input_pin: pinmux_P8_20_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3780, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
P8_20_pruout_pin: pinmux_P8_20_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_cmd.pr2_pru0_gpo3 */
P8_20_pruin_pin: pinmux_P8_20_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x3780, PIN_INPUT | MUX_MODE12) >; }; /* mmc3_cmd.pr2_pru0_gpi3 */
- /* P8_21 */
+ /* P8_21 (ball AD4) gpio6_29 */
P8_21_default_pin: pinmux_P8_21_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
P8_21_gpio_pin: pinmux_P8_21_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
P8_21_gpio_pu_pin: pinmux_P8_21_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
P8_21_gpio_pd_pin: pinmux_P8_21_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
P8_21_gpio_input_pin: pinmux_P8_21_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x377C, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
P8_21_pruout_pin: pinmux_P8_21_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_clk.pr2_pru0_gpo2 */
P8_21_pruin_pin: pinmux_P8_21_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x377C, PIN_INPUT | MUX_MODE12) >; }; /* mmc3_clk.pr2_pru0_gpi2 */
- /* P8_22 */
+ /* P8_22 (ball AD6) gpio1_23 */
P8_22_default_pin: pinmux_P8_22_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
P8_22_gpio_pin: pinmux_P8_22_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
P8_22_gpio_pu_pin: pinmux_P8_22_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
P8_22_gpio_pd_pin: pinmux_P8_22_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
P8_22_gpio_input_pin: pinmux_P8_22_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3798, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3798, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
- /* P8_23 */
+ /* P8_23 (ball AC8) gpio1_22 */
P8_23_default_pin: pinmux_P8_23_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
P8_23_gpio_pin: pinmux_P8_23_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
P8_23_gpio_pu_pin: pinmux_P8_23_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
P8_23_gpio_pd_pin: pinmux_P8_23_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
P8_23_gpio_input_pin: pinmux_P8_23_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3794, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3794, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
- /* P8_24 */
+ /* P8_24 (ball AC6) gpio7_0 */
P8_24_default_pin: pinmux_P8_24_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
P8_24_gpio_pin: pinmux_P8_24_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
P8_24_gpio_pu_pin: pinmux_P8_24_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
P8_24_gpio_pd_pin: pinmux_P8_24_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
P8_24_gpio_input_pin: pinmux_P8_24_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3788, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3788, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
- /* P8_25 */
+ /* P8_25 (ball AC7) gpio6_31 */
P8_25_default_pin: pinmux_P8_25_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
P8_25_gpio_pin: pinmux_P8_25_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
P8_25_gpio_pu_pin: pinmux_P8_25_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
P8_25_gpio_pd_pin: pinmux_P8_25_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
P8_25_gpio_input_pin: pinmux_P8_25_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3784, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3784, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
- /* P8_26 */
+ /* P8_26 (ball B3) gpio4_28 */
P8_26_default_pin: pinmux_P8_26_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
P8_26_gpio_pin: pinmux_P8_26_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
P8_26_gpio_pu_pin: pinmux_P8_26_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
P8_26_gpio_pd_pin: pinmux_P8_26_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
P8_26_gpio_input_pin: pinmux_P8_26_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B8, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35B8, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
- /* P8_27a */
+ /* P8_27a (ball E11) gpio4_23 */
P8_27_default_pin: pinmux_P8_27_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
P8_27_gpio_pin: pinmux_P8_27_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
P8_27_gpio_pu_pin: pinmux_P8_27_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
P8_27_gpio_pd_pin: pinmux_P8_27_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
P8_27_gpio_input_pin: pinmux_P8_27_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D8, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35D8, PIN_INPUT | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
- /* P8_27b */
+ /* P8_27b (ball A8) gpio8_19 */
P8_27_pruout_pin: pinmux_P8_27_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3628, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x3628, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d19.pr2_pru0_gpo16 */
P8_27_pruin_pin: pinmux_P8_27_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3628, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x3628, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d19.pr2_pru0_gpi16 */
- /* P8_28a */
+ /* P8_28a (ball D11) gpio4_19 */
P8_28_default_pin: pinmux_P8_28_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
P8_28_gpio_pin: pinmux_P8_28_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
P8_28_gpio_pu_pin: pinmux_P8_28_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
P8_28_gpio_pd_pin: pinmux_P8_28_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
P8_28_gpio_input_pin: pinmux_P8_28_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35C8, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35C8, PIN_INPUT | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
- /* P8_28b */
+ /* P8_28b (ball C9) gpio8_20 */
P8_28_pruout_pin: pinmux_P8_28_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x362C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x362C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d20.pr2_pru0_gpo17 */
P8_28_pruin_pin: pinmux_P8_28_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x362C, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x362C, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d20.pr2_pru0_gpi17 */
- /* P8_29a */
+ /* P8_29a (ball C11) gpio4_22 */
P8_29_default_pin: pinmux_P8_29_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
P8_29_gpio_pin: pinmux_P8_29_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
P8_29_gpio_pu_pin: pinmux_P8_29_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
P8_29_gpio_pd_pin: pinmux_P8_29_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
P8_29_gpio_input_pin: pinmux_P8_29_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D4, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35D4, PIN_INPUT | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
- /* P8_29b */
+ /* P8_29b (ball A9) gpio8_21 */
P8_29_pruout_pin: pinmux_P8_29_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3630, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x3630, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d21.pr2_pru0_gpo18 */
P8_29_pruin_pin: pinmux_P8_29_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3630, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x3630, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d21.pr2_pru0_gpi18 */
- /* P8_30a */
+ /* P8_30a (ball B10) gpio4_20 */
P8_30_default_pin: pinmux_P8_30_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
P8_30_gpio_pin: pinmux_P8_30_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
P8_30_gpio_pu_pin: pinmux_P8_30_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
P8_30_gpio_pd_pin: pinmux_P8_30_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
P8_30_gpio_input_pin: pinmux_P8_30_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35CC, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35CC, PIN_INPUT | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
- /* P8_30b */
+ /* P8_30b (ball B9) gpio8_22 */
P8_30_pruout_pin: pinmux_P8_30_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3634, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x3634, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d22.pr2_pru0_gpo19 */
P8_30_pruin_pin: pinmux_P8_30_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3634, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x3634, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d22.pr2_pru0_gpi19 */
- /* P8_31a */
+ /* P8_31a (ball C8) gpio8_14 */
P8_31_default_pin: pinmux_P8_31_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
P8_31_gpio_pin: pinmux_P8_31_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
P8_31_gpio_pu_pin: pinmux_P8_31_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
P8_31_gpio_pd_pin: pinmux_P8_31_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
P8_31_gpio_input_pin: pinmux_P8_31_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3614, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3614, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
- /* P8_31b */
- P8_31_qep_pin: pinmux_P8_31_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x373C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE15) >; }; /* ?? eqep1_index */
+ /* P8_31b (ball G16) */
P8_31_uart_pin: pinmux_P8_31_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x373C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; };
+ DRA7XX_CORE_IOPAD(0x373C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp4_axr0.uart4_rxd */
- /* P8_32a */
+ /* P8_32a (ball C7) gpio8_15 */
P8_32_default_pin: pinmux_P8_32_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
P8_32_gpio_pin: pinmux_P8_32_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
P8_32_gpio_pu_pin: pinmux_P8_32_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
P8_32_gpio_pd_pin: pinmux_P8_32_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
P8_32_gpio_input_pin: pinmux_P8_32_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3618, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3618, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
- /* P8_32b */
- P8_32_qep_pin: pinmux_P8_32_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3740, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* ?? eqep1_strobe available on P9_21*/
+ /* P8_32b (ball D17) */
+ P8_32_uart_pin: pinmux_P8_32_uart_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3740, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp4_axr1.uart4_txd */
- /* P8_33a */
+ /* P8_33a (ball C6) gpio8_13 */
P8_33_default_pin: pinmux_P8_33_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
P8_33_gpio_pin: pinmux_P8_33_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
P8_33_gpio_pu_pin: pinmux_P8_33_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
P8_33_gpio_pd_pin: pinmux_P8_33_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
P8_33_gpio_input_pin: pinmux_P8_33_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3610, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3610, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
- /* P8_33b */
+ /* P8_33b (ball AF9) gpio3_1 */
P8_33_qep_pin: pinmux_P8_33_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; };
+ DRA7XX_CORE_IOPAD(0x34E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_fld0.eQEP1B_in */
- /* P8_34a */
+ /* P8_34a (ball D8) gpio8_11 */
P8_34_default_pin: pinmux_P8_34_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
P8_34_gpio_pin: pinmux_P8_34_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
P8_34_gpio_pu_pin: pinmux_P8_34_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
P8_34_gpio_pd_pin: pinmux_P8_34_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
P8_34_gpio_input_pin: pinmux_P8_34_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3608, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3608, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
- /* P8_34b */
+ /* P8_34b (ball G6) gpio4_0 */
P8_34_pwm_pin: pinmux_P8_34_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3564, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* ?? ehrpwm1b instead we have ehrpwm1a here */
+ DRA7XX_CORE_IOPAD(0x3564, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_vsync0.ehrpwm1A */
- /* P8_35a */
+ /* P8_35a (ball A5) gpio8_12 */
P8_35_default_pin: pinmux_P8_35_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
P8_35_gpio_pin: pinmux_P8_35_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
P8_35_gpio_pu_pin: pinmux_P8_35_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
P8_35_gpio_pd_pin: pinmux_P8_35_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
P8_35_gpio_input_pin: pinmux_P8_35_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x360C, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x360C, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
- /* P8_35b */
+ /* P8_35b (ball AD9) gpio3_0 */
P8_35_qep_pin: pinmux_P8_35_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; };
+ DRA7XX_CORE_IOPAD(0x34E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_de0.eQEP1A_in */
- /* P8_36a */
+ /* P8_36a (ball D7) gpio8_10 */
P8_36_default_pin: pinmux_P8_36_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
P8_36_gpio_pin: pinmux_P8_36_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
P8_36_gpio_pu_pin: pinmux_P8_36_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
P8_36_gpio_pd_pin: pinmux_P8_36_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
P8_36_gpio_input_pin: pinmux_P8_36_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3604, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3604, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
- /* P8_36b */
+ /* P8_36b (ball F2) gpio4_1 */
P8_36_pwm_pin: pinmux_P8_36_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3568, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* ?? ehrpwm1a instead we have ehrpwm1b here */
+ DRA7XX_CORE_IOPAD(0x3568, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d0.ehrpwm1B */
- /* P8_37a */
+ /* P8_37a (ball E8) gpio8_8 */
P8_37_default_pin: pinmux_P8_37_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
P8_37_gpio_pin: pinmux_P8_37_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
P8_37_gpio_pu_pin: pinmux_P8_37_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
P8_37_gpio_pd_pin: pinmux_P8_37_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
P8_37_gpio_input_pin: pinmux_P8_37_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35FC, PIN_INPUT | MUX_MODE14) >; };
- P8_37_pwm_pin: pinmux_P8_37_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE15) >; }; /* ?? ehrpwm1_tripzone_input */
+ DRA7XX_CORE_IOPAD(0x35FC, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
- /* P8_37b */
+ /* P8_37b (ball A21) */
P8_37_uart_pin: pinmux_P8_37_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3738, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data8.uart5_txd */
+ DRA7XX_CORE_IOPAD(0x3738, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp4_fsx.uart8_txd */
- /* P8_38a */
+ /* P8_38a (ball D9) gpio8_9 */
P8_38_default_pin: pinmux_P8_38_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
P8_38_gpio_pin: pinmux_P8_38_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
P8_38_gpio_pu_pin: pinmux_P8_38_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
P8_38_gpio_pd_pin: pinmux_P8_38_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
P8_38_gpio_input_pin: pinmux_P8_38_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3600, PIN_INPUT | MUX_MODE14) >; };
- P8_38_pwm_pin: pinmux_P8_38_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE15) >; }; /* ?? ehrpwm0_synco */
+ DRA7XX_CORE_IOPAD(0x3600, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
- /* P8_38b */
+ /* P8_38b (ball C18) */
P8_38_uart_pin: pinmux_P8_38_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3734, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data9.uart5_rxd */
+ DRA7XX_CORE_IOPAD(0x3734, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp4_aclkx.uart8_rxd */
- /* P8_39 */
+ /* P8_39 (ball F8) gpio8_6 */
P8_39_default_pin: pinmux_P8_39_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
P8_39_gpio_pin: pinmux_P8_39_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
P8_39_gpio_pu_pin: pinmux_P8_39_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
P8_39_gpio_pd_pin: pinmux_P8_39_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
P8_39_gpio_input_pin: pinmux_P8_39_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_INPUT | MUX_MODE14) >; };
- P8_39_qep_pin: pinmux_P8_39_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE15) >; }; /* ?? eqep2_index */
+ DRA7XX_CORE_IOPAD(0x35F4, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
P8_39_pruout_pin: pinmux_P8_39_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d6.pr2_pru0_gpo3 */
P8_39_pruin_pin: pinmux_P8_39_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x35F4, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d6.pr2_pru0_gpi3 */
- /* P8_40 */
+ /* P8_40 (ball E7) gpio8_7 */
P8_40_default_pin: pinmux_P8_40_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
P8_40_gpio_pin: pinmux_P8_40_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
P8_40_gpio_pu_pin: pinmux_P8_40_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
P8_40_gpio_pd_pin: pinmux_P8_40_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
P8_40_gpio_input_pin: pinmux_P8_40_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_INPUT | MUX_MODE14) >; };
- P8_40_qep_pin: pinmux_P8_40_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE15) >; }; /* ?? eqep2_strobe */
+ DRA7XX_CORE_IOPAD(0x35F8, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
P8_40_pruout_pin: pinmux_P8_40_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d7.pr2_pru0_gpo4 */
P8_40_pruin_pin: pinmux_P8_40_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x35F8, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d7.pr2_pru0_gpi4 */
- /* P8_41 */
+ /* P8_41 (ball E9) gpio8_4 */
P8_41_default_pin: pinmux_P8_41_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
P8_41_gpio_pin: pinmux_P8_41_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
P8_41_gpio_pu_pin: pinmux_P8_41_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
P8_41_gpio_pd_pin: pinmux_P8_41_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
P8_41_gpio_input_pin: pinmux_P8_41_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_INPUT | MUX_MODE14) >; };
- P8_41_qep_pin: pinmux_P8_41_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE15) >; }; /* ?? eqep2a_in */
+ DRA7XX_CORE_IOPAD(0x35EC, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
P8_41_pruout_pin: pinmux_P8_41_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d4.pr2_pru0_gpo1 */
P8_41_pruin_pin: pinmux_P8_41_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x35EC, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d4.pr2_pru0_gpi1 */
- /* P8_42 */
+ /* P8_42 (ball F9) gpio8_5 */
P8_42_default_pin: pinmux_P8_42_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
P8_42_gpio_pin: pinmux_P8_42_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
P8_42_gpio_pu_pin: pinmux_P8_42_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
P8_42_gpio_pd_pin: pinmux_P8_42_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
P8_42_gpio_input_pin: pinmux_P8_42_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_INPUT | MUX_MODE14) >; };
- P8_42_qep_pin: pinmux_P8_42_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE15) >; }; /* ?? eqep2b_in */
+ DRA7XX_CORE_IOPAD(0x35F0, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
P8_42_pruout_pin: pinmux_P8_42_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d5.pr2_pru0_gpo2 */
P8_42_pruin_pin: pinmux_P8_42_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x35F0, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d5.pr2_pru0_gpi2 */
- /* P8_43 */
+ /* P8_43 (ball F10) gpio8_2 */
P8_43_default_pin: pinmux_P8_43_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
P8_43_gpio_pin: pinmux_P8_43_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
P8_43_gpio_pu_pin: pinmux_P8_43_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
P8_43_gpio_pd_pin: pinmux_P8_43_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
P8_43_gpio_input_pin: pinmux_P8_43_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_INPUT | MUX_MODE14) >; };
- P8_43_pwm_pin: pinmux_P8_43_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE15) >; }; /* ?? ehrpwm2_tripzone_input */
+ DRA7XX_CORE_IOPAD(0x35E4, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
P8_43_pruout_pin: pinmux_P8_43_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d2.pr2_pru1_gpo20 */
P8_43_pruin_pin: pinmux_P8_43_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x35E4, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d2.pr2_pru1_gpi20 */
- /* P8_44 */
+ /* P8_44 (ball G11) gpio8_3 */
P8_44_default_pin: pinmux_P8_44_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
P8_44_gpio_pin: pinmux_P8_44_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
P8_44_gpio_pu_pin: pinmux_P8_44_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
P8_44_gpio_pd_pin: pinmux_P8_44_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
P8_44_gpio_input_pin: pinmux_P8_44_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_INPUT | MUX_MODE14) >; };
- P8_44_pwm_pin: pinmux_P8_44_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE15) >; }; /* ?? ehrpwm0_synco */
+ DRA7XX_CORE_IOPAD(0x35E8, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
P8_44_pruout_pin: pinmux_P8_44_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d3.pr2_pru0_gpo0 */
P8_44_pruin_pin: pinmux_P8_44_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x35E8, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d3.pr2_pru0_gpi0 */
- /* P8_45a */
+ /* P8_45a (ball F11) gpio8_0 */
P8_45_default_pin: pinmux_P8_45_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
P8_45_gpio_pin: pinmux_P8_45_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
P8_45_gpio_pu_pin: pinmux_P8_45_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
P8_45_gpio_pd_pin: pinmux_P8_45_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
P8_45_gpio_input_pin: pinmux_P8_45_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35DC, PIN_INPUT | MUX_MODE14) >; };
- P8_45_pwm_pin: pinmux_P8_45_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE15) >; }; /* ?? ehrpwm2a */
+ DRA7XX_CORE_IOPAD(0x35DC, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
- /* P8_45b */
+ /* P8_45b (ball B7) gpio8_16 */
P8_45_pruout_pin: pinmux_P8_45_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x361C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x361C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d16.pr2_pru0_gpo13 */
P8_45_pruin_pin: pinmux_P8_45_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x361C, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x361C, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d16.pr2_pru0_gpi13 */
- /* P8_46a */
+ /* P8_46a (ball G10) gpio8_1 */
P8_46_default_pin: pinmux_P8_46_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
P8_46_gpio_pin: pinmux_P8_46_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
P8_46_gpio_pu_pin: pinmux_P8_46_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
P8_46_gpio_pd_pin: pinmux_P8_46_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
P8_46_gpio_input_pin: pinmux_P8_46_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E0, PIN_INPUT | MUX_MODE14) >; };
- P8_46_pwm_pin: pinmux_P8_46_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* ?? ehrpwm2b */
+ DRA7XX_CORE_IOPAD(0x35E0, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
- /* P8_46b */
+ /* P8_46b (ball A10) gpio8_23 */
P8_46_pruout_pin: pinmux_P8_46_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3638, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x3638, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d23.pr2_pru0_gpo20 */
P8_46_pruin_pin: pinmux_P8_46_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3638, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x3638, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d23.pr2_pru0_gpi20 */
/************************/
/* P9 Header */
@@ -1465,425 +1439,374 @@
/* P9_10 RSTn */
- /* P9_11a */
+ /* P9_11a (ball B19) */
P9_11_uart_pin: pinmux_P9_11_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x372C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; };
+ DRA7XX_CORE_IOPAD(0x372C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp3_axr0.uart5_rxd */
- /* P9_11b */
+ /* P9_11b (ball B8) gpio8_17 */
P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
P9_11_gpio_pin: pinmux_P9_11_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
P9_11_gpio_input_pin: pinmux_P9_11_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3620, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3620, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
- /* P9_12 */
+ /* P9_12 (ball B14) gpio5_0 */
P9_12_default_pin: pinmux_P9_12_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
P9_12_gpio_pin: pinmux_P9_12_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
P9_12_gpio_pd_pin: pinmux_P9_12_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
P9_12_gpio_input_pin: pinmux_P9_12_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36AC, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36AC, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
- /* P9_13a */
+ /* P9_13a (ball C17) */
P9_13_uart_pin: pinmux_P9_13_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3730, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; };
+ DRA7XX_CORE_IOPAD(0x3730, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp3_axr1.uart5_txd */
- /* P9_13b */
+ /* P9_13b (ball AB10) gpio6_12 */
P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
P9_13_gpio_pin: pinmux_P9_13_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
P9_13_gpio_pd_pin: pinmux_P9_13_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
P9_13_gpio_input_pin: pinmux_P9_13_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
- /* P9_14 */
+ /* P9_14 (ball D6) gpio4_25 */
P9_14_default_pin: pinmux_P9_14_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
P9_14_gpio_pin: pinmux_P9_14_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
P9_14_gpio_pu_pin: pinmux_P9_14_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
P9_14_gpio_pd_pin: pinmux_P9_14_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
P9_14_gpio_input_pin: pinmux_P9_14_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35AC, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35AC, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
P9_14_pwm_pin: pinmux_P9_14_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; };
+ DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d17.ehrpwm3A */
- /* P9_15 */
+ /* P9_15 (ball AG4) gpio3_12 */
P9_15_default_pin: pinmux_P9_15_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
P9_15_gpio_pin: pinmux_P9_15_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
P9_15_gpio_pu_pin: pinmux_P9_15_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
P9_15_gpio_pd_pin: pinmux_P9_15_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
P9_15_gpio_input_pin: pinmux_P9_15_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3514, PIN_INPUT | MUX_MODE14) >; };
- P9_15_pwm_pin: pinmux_P9_15_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE15) >; }; /* ?? ehrpwm1_tripzone_input */
+ DRA7XX_CORE_IOPAD(0x3514, PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
- /* P9_16 */
+ /* P9_16 (ball C5) gpio4_26 */
P9_16_default_pin: pinmux_P9_16_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; };
+ DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d18.gpio4_26 */
P9_16_gpio_pin: pinmux_P9_16_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
P9_16_gpio_pu_pin: pinmux_P9_16_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
P9_16_gpio_pd_pin: pinmux_P9_16_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
P9_16_gpio_input_pin: pinmux_P9_16_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B0, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35B0, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
P9_16_pwm_pin: pinmux_P9_16_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; };
+ DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d18.ehrpwm3B */
- /* P9_17a */
+ /* P9_17a (ball B24) gpio7_17 */
P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
P9_17_gpio_pd_pin: pinmux_P9_17_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
P9_17_gpio_input_pin: pinmux_P9_17_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37CC, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x37CC, PIN_INPUT | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
P9_17_spi_cs_pin: pinmux_P9_17_spi_cs_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; };
+ DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_cs0.spi2_cs0 */
- /* P9_17b */
+ /* P9_17b (ball F12) gpio5_3 */
P9_17_i2c_pin: pinmux_P9_17_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; };
- P9_17_pwm_pin: pinmux_P9_17_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36B8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE15) >; }; /* ?? ehrpwm0_synci */
- P9_17_pru_uart_pin: pinmux_P9_17_pru_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; };
+ DRA7XX_CORE_IOPAD(0x36B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr1.i2c5_scl */
+ P9_17_uart_pin: pinmux_P9_17_pru_uart_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr1.uart6_txd */
- /* P9_18 */
+ /* P9_18a (ball G17) gpio7_16 */
P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
P9_18_gpio_pin: pinmux_P9_18_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
P9_18_gpio_pd_pin: pinmux_P9_18_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
P9_18_gpio_input_pin: pinmux_P9_18_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C8, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x37C8, PIN_INPUT | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
P9_18_spi_pin: pinmux_P9_18_spi_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; };
+ DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_d0.spi2_d0 */
+ /* P9_18b (ball G12) gpio5_2 */
P9_18_i2c_pin: pinmux_P9_18_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36B4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; };
- P9_18_pwm_pin: pinmux_P9_18_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36B4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE15) >; }; /* ?? ehrpwm0_tripzone_input */
- P9_18_pru_uart_pin: pinmux_P9_18_pru_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36B4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; };
+ DRA7XX_CORE_IOPAD(0x36B4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr0.i2c5_sda */
+ P9_18_uart_pin: pinmux_P9_18_pru_uart_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36B4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr0.uart6_rxd */
- /* P9_19a */
+ /* P9_19a (ball R6) gpio7_3 */
P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };
+ DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio7_3 */
P9_19_gpio_pin: pinmux_P9_19_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
P9_19_gpio_input_pin: pinmux_P9_19_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_INPUT | MUX_MODE14) >; };
- P9_19_timer_pin: pinmux_P9_19_timer_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE15) >; }; /* ?? timer5 */
- P9_19_can_pin: pinmux_P9_19_can_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_INPUT_PULLUP | MUX_MODE15) >; }; /* ?? dcan0_rx */
+ DRA7XX_CORE_IOPAD(0x3440, PIN_INPUT | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };
+ DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.i2c4_scl */
- /* P9_19b */
- P9_19_spi_cs_pin: pinmux_P9_19_spi_cs_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x357C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE15) >; }; /* ?? spi1_cs1 */
- P9_19_pru_uart_pin: pinmux_P9_19_pru_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x357C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE8) >; };
+ /* P9_19b (ball F4) gpio4_6 */
+ P9_19_qep_pin: pinmux_P9_19_qep_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x357C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d5.eQEP2A_in */
- /* P9_20 */
+ /* P9_20a (ball T9) gpio7_4 */
P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };
+ DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio7_4 */
P9_20_gpio_pin: pinmux_P9_20_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
P9_20_gpio_input_pin: pinmux_P9_20_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_INPUT | MUX_MODE14) >; };
- P9_20_timer_pin: pinmux_P9_20_timer_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE15) >; }; /* ?? timer6 */
- P9_20_can_pin: pinmux_P9_20_can_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLUP | MUX_MODE15) >; }; /* ?? dcan0_tx */
+ DRA7XX_CORE_IOPAD(0x3444, PIN_INPUT | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
P9_20_i2c_pin: pinmux_P9_20_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; };
+ DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.i2c4_sda */
- /* P9_20 */
- P9_20_spi_cs_pin: pinmux_P9_20_spi_cs_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3578, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE15) >; }; /* ?? spi1_cs0 */
- P9_20_pru_uart_pin: pinmux_P9_20_pru_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3578, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE8) >; };
+ /* P9_20b (ball D2) gpio4_5*/
+ P9_20_pruout_pin: pinmux_P9_20_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3578, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d4.pr1_pru1_gpo1 */
+ P9_20_pruin_pin: pinmux_P9_20_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3578, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d4.pr1_pru1_gpi1 */
- /* P9_21a */
+ /* P9_21a (ball AF8) gpio3_3 */
P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
P9_21_gpio_pin: pinmux_P9_21_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
P9_21_gpio_pd_pin: pinmux_P9_21_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
P9_21_gpio_input_pin: pinmux_P9_21_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34F0, PIN_INPUT | MUX_MODE14) >; };
- P9_21_pru_uart_pin: pinmux_P9_21_pru_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; };
+ DRA7XX_CORE_IOPAD(0x34F0, PIN_INPUT | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
+ P9_21_qep_pin: pinmux_P9_21_qep_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_vsync0.eQEP1_strobe */
- /* P9_21b */
+ /* P9_21b (ball B22) gpio7_15 */
P9_21_spi_pin: pinmux_P9_21_spi_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; };
+ DRA7XX_CORE_IOPAD(0x37C4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_d1.spi2_d1 */
P9_21_uart_pin: pinmux_P9_21_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; };
- P9_21_i2c_pin: pinmux_P9_21_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE15) >; }; /* ?? i2c2_scl */
- P9_21_pwm_pin: pinmux_P9_21_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE15) >; }; /* ?? ehrpwm0b */
+ DRA7XX_CORE_IOPAD(0x37C4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi2_d1.uart3_txd */
- /* P9_22a */
+ /* P9_22a (ball B26) gpio6_19 */
P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
P9_22_gpio_pin: pinmux_P9_22_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
P9_22_gpio_pd_pin: pinmux_P9_22_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
P9_22_gpio_input_pin: pinmux_P9_22_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x369C, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x369C, PIN_INPUT | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
- /* P9_22b */
+ /* P9_22b (ball A26) gpio7_14 */
P9_22_spi_sclk_pin: pinmux_P9_22_spi_sclk_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; };
+ DRA7XX_CORE_IOPAD(0x37C0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_sclk.spi2_sclk */
P9_22_uart_pin: pinmux_P9_22_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; };
- P9_22_i2c_pin: pinmux_P9_22_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE15) >; }; /* ??i2c2_sda */
- P9_22_pwm_pin: pinmux_P9_22_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE15) >; }; /* ?? ehrpwm0a */
- P9_22_pru_uart_pin: pinmux_P9_22_pru_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE15) >; }; /* ?? pr1_uart0_cts_n */
-
- /* P9_23 */
+ DRA7XX_CORE_IOPAD(0x37C0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi2_sclk.uart3_rxd */
+
+ /* P9_23 (ball A22) gpio7_11 */
P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
P9_23_gpio_pin: pinmux_P9_23_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
P9_23_gpio_input_pin: pinmux_P9_23_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37B4, PIN_INPUT | MUX_MODE14) >; };
- P9_23_pwm_pin: pinmux_P9_23_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE15) >; }; /* ?? ehrpwm0_synco */
+ DRA7XX_CORE_IOPAD(0x37B4, PIN_INPUT | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
- /* P9_24 */
+ /* P9_24 (ball F20) gpio6_15*/
P9_24_default_pin: pinmux_P9_24_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
P9_24_gpio_pin: pinmux_P9_24_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
P9_24_gpio_pd_pin: pinmux_P9_24_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
P9_24_gpio_input_pin: pinmux_P9_24_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x368C, PIN_INPUT | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
P9_24_uart_pin: pinmux_P9_24_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; };
+ DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* gpio6_15.uart10_txd */
P9_24_can_pin: pinmux_P9_24_can_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_INPUT_PULLUP | MUX_MODE2) >; };
+ DRA7XX_CORE_IOPAD(0x368C, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* gpio6_15.dcan2_rx */
P9_24_i2c_pin: pinmux_P9_24_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) >; };
- P9_24_pru_uart_pin: pinmux_P9_24_pru_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE15) >; }; /* ?? pr1_uart0_txd */
- P9_24_pruin_pin: pinmux_P9_24_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_INPUT | MUX_MODE15) >; }; /* ?? pru0_in16 */
-
+ DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) >; }; /* gpio6_15.i2c3_scl */
- /* P9_25 */
+ /* P9_25 (ball D18) gpio6_17 */
P9_25_default_pin: pinmux_P9_25_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
P9_25_gpio_pin: pinmux_P9_25_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
P9_25_gpio_pu_pin: pinmux_P9_25_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
P9_25_gpio_pd_pin: pinmux_P9_25_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
P9_25_gpio_input_pin: pinmux_P9_25_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE14) >; };
- P9_25_qep_pin: pinmux_P9_25_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE15) >; }; /* ?? eqep0_strobe */
+ DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
P9_25_pruout_pin: pinmux_P9_25_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* xref_clk0.pr2_pru1_gpo5 */
P9_25_pruin_pin: pinmux_P9_25_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE12) >; }; /* xref_clk0.pr2_pru1_gpi5 */
- /* P9_26a */
+ /* P9_26a (ball E21) gpio6_14 */
P9_26_default_pin: pinmux_P9_26_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
P9_26_gpio_pin: pinmux_P9_26_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
P9_26_gpio_pd_pin: pinmux_P9_26_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
P9_26_gpio_input_pin: pinmux_P9_26_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x3688, PIN_INPUT | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
P9_26_uart_pin: pinmux_P9_26_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; };
+ DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* gpio6_14.uart10_rxd */
P9_26_can_pin: pinmux_P9_26_can_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | MUX_MODE2) >; };
+ DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* gpio6_14.dcan2_tx */
P9_26_i2c_pin: pinmux_P9_26_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) >; };
- P9_26_pru_uart_pin: pinmux_P9_26_pru_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE15) >; }; /* ?? pr1_uart0_rxd */
+ DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) >; }; /* gpio6_14.i2c3_sda */
- /* P9_26b */
+ /* P9_26b (ball AE2) gpio3_24 */
P9_26_pruout_pin: pinmux_P9_26_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3544, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x3544, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d20.pr1_pru0_gpo17*/
P9_26_pruin_pin: pinmux_P9_26_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3544, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x3544, PIN_INPUT | MUX_MODE12) >; }; /* vin1a_d20.pr1_pru0_gpi17*/
- /* P9_27a */
+ /* P9_27a (ball C3) gpio4_15 */
P9_27_default_pin: pinmux_P9_27_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
P9_27_gpio_pin: pinmux_P9_27_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
P9_27_gpio_pu_pin: pinmux_P9_27_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
P9_27_gpio_pd_pin: pinmux_P9_27_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
P9_27_gpio_input_pin: pinmux_P9_27_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_INPUT | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x35A0, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
P9_27_qep_pin: pinmux_P9_27_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; };
+ DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d14.eQEP3B_in */
P9_27_pruout_pin: pinmux_P9_27_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d14.pr1_pru1_gpo11 */
P9_27_pruin_pin: pinmux_P9_27_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_INPUT | MUX_MODE12) >; };
- P9_27_pruout_pin: pinmux_P9_27_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
- P9_27_pruin_pin: pinmux_P9_27_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x35A0, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d14.pr1_pru1_gpi11 */
- /* P9_27b */
+ /* P9_27b (ball J14) gpio5_1 */
- /* P9_28 */
+ /* P9_28 (ball A12) gpio4_17 */
P9_28_default_pin: pinmux_P9_28_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
P9_28_gpio_pin: pinmux_P9_28_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
P9_28_gpio_input_pin: pinmux_P9_28_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_INPUT | MUX_MODE14) >; };
- P9_28_pwm_pin: pinmux_P9_28_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE15) >; }; /* ?? ehrpwm0_synci */
+ DRA7XX_CORE_IOPAD(0x36E0, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
P9_28_spi_cs_pin: pinmux_P9_28_spi_cs_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; };
- P9_28_pwm2_pin: pinmux_P9_28_pwm2_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE15) >; }; /* ?? ecap2_in_pwm2_out */
+ DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr11.spi3_cs0 */
P9_28_pruout_pin: pinmux_P9_28_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr11.pr2_pru1_gpo13 */
P9_28_pruin_pin: pinmux_P9_28_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x36E0, PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr11.pr2_pru1_gpi13 */
- /* P9_29a */
+ /* P9_29a (ball A11) gpio5_11*/
P9_29_default_pin: pinmux_P9_29_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
P9_29_gpio_pin: pinmux_P9_29_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
P9_29_gpio_pu_pin: pinmux_P9_29_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
P9_29_gpio_pd_pin: pinmux_P9_29_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
P9_29_gpio_input_pin: pinmux_P9_29_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_INPUT | MUX_MODE14) >; };
- P9_29_pwm_pin: pinmux_P9_29_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE15) >; }; /* ?? ehrpwm0b */
+ DRA7XX_CORE_IOPAD(0x36D8, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
P9_29_spi_pin: pinmux_P9_29_spi_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; };
+ DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr9.spi3_d1 */
P9_29_pruout_pin: pinmux_P9_29_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr9.pr2_pru1_gpo11 */
P9_29_pruin_pin: pinmux_P9_29_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x36D8, PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr9.pr2_pru1_gpi11 */
- /* P9_29b */
+ /* P9_29b (ball D14) gpio7_30 */
- /* P9_30 */
+ /* P9_30 (ball B13) gpio5_12*/
P9_30_default_pin: pinmux_P9_30_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
P9_30_gpio_pin: pinmux_P9_30_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
P9_30_gpio_pu_pin: pinmux_P9_30_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
P9_30_gpio_pd_pin: pinmux_P9_30_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
P9_30_gpio_input_pin: pinmux_P9_30_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_INPUT | MUX_MODE14) >; };
- P9_30_pwm_pin: pinmux_P9_30_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE15) >; }; /* ?? ehrpwm0_tripzone_input */
+ DRA7XX_CORE_IOPAD(0x36DC, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
P9_30_spi_pin: pinmux_P9_30_spi_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; };
+ DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr10.spi3_d0 */
P9_30_pruout_pin: pinmux_P9_30_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr10.pr2_pru1_gpo12 */
P9_30_pruin_pin: pinmux_P9_30_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x36DC, PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr10.pr2_pru1_gpi12 */
- /* P9_31b */
+ /* P9_31a (ball B12) gpio5_10 */
P9_31_default_pin: pinmux_P9_31_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
P9_31_gpio_pin: pinmux_P9_31_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
P9_31_gpio_pu_pin: pinmux_P9_31_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
P9_31_gpio_pd_pin: pinmux_P9_31_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
P9_31_gpio_input_pin: pinmux_P9_31_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_INPUT | MUX_MODE14) >; };
- P9_31_pwm_pin: pinmux_P9_31_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* ?? ehrpwm0a */
+ DRA7XX_CORE_IOPAD(0x36D4, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
P9_31_spi_sclk_pin: pinmux_P9_31_spi_sclk_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; };
+ DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr8.spi3_sclk */
P9_31_pruout_pin: pinmux_P9_31_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr8.pr2_pru1_gpo10 */
P9_31_pruin_pin: pinmux_P9_31_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x36D4, PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr8.pr2_pru1_gpi10 */
- /* P9_31b */
-
+ /* P9_31b (ball C14) gpio7_31*/
/* P9_32 VADC */
@@ -1903,53 +1826,43 @@
/* P9_40 AIN1*/
- /* P9_41a */
+ /* P9_41a (ball C23) gpio6_20 */
P9_41_default_pin: pinmux_P9_41_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
P9_41_gpio_pin: pinmux_P9_41_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
P9_41_gpio_pu_pin: pinmux_P9_41_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
P9_41_gpio_pd_pin: pinmux_P9_41_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
P9_41_gpio_input_pin: pinmux_P9_41_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36A0, PIN_INPUT | MUX_MODE14) >; };
- P9_41_timer_pin: pinmux_P9_41_timer_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* ?? timer7 */
+ DRA7XX_CORE_IOPAD(0x36A0, PIN_INPUT | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
- /* P9_41b */
+ /* P9_41b (ball C1) gpio4_7 */
P9_41_pruout_pin: pinmux_P9_41_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3580, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x3580, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d6.pr1_pru1_gpo3 */
P9_41_pruin_pin: pinmux_P9_41_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3580, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x3580, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d6.pr1_pru1_gpi3 */
- /* P9_42a */
+ /* P9_42a (ball E14) gpio4_18 */
P9_42_default_pin: pinmux_P9_42_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
P9_42_gpio_pin: pinmux_P9_42_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
P9_42_gpio_pu_pin: pinmux_P9_42_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
P9_42_gpio_pd_pin: pinmux_P9_42_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; };
+ DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
P9_42_gpio_input_pin: pinmux_P9_42_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_INPUT | MUX_MODE14) >; };
- P9_42_pwm_pin: pinmux_P9_42_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE15) >; }; /* ?? ecap0_in_pwm0_out */
- P9_42_uart_pin: pinmux_P9_42_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE15) >; }; /* ?? uart3_txd */
+ DRA7XX_CORE_IOPAD(0x36E4, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
P9_42_spi_cs_pin: pinmux_P9_42_spi_cs_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; };
- P9_42_pru_ecap_pin: pinmux_P9_42_pru_ecap_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE15) >; }; /* ?? pr1_ecap0_ecap_capin_apwm_o */
- P9_42_spi_sclk_pin: pinmux_P9_42_spi_sclk_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE15) >; }; /* ?? spi1_sclk */
+ DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr12.spi3_cs1 */
- /* P9_42b */
+ /* P9_42b (ball C2) gpio4_14*/
P9_42_pruout_pin: pinmux_P9_42_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x359C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; };
+ DRA7XX_CORE_IOPAD(0x359C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d13.pr1_pru1_gpo10 */
P9_42_pruin_pin: pinmux_P9_42_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x359C, PIN_INPUT | MUX_MODE12) >; };
+ DRA7XX_CORE_IOPAD(0x359C, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d13.pr1_pru1_gpi10 */
/* P9_43 GND */
--
GitLab
From f0192925a980ae2fafef9f04b89004504bfae330 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Sat, 20 Jun 2020 09:41:37 +0530
Subject: [PATCH 02/86] easy BBB pinmuxing
---
include/dt-bindings/board/am335x-bbb-pins.h | 82 +++++++++++++++++++++
1 file changed, 82 insertions(+)
create mode 100644 include/dt-bindings/board/am335x-bbb-pins.h
diff --git a/include/dt-bindings/board/am335x-bbb-pins.h b/include/dt-bindings/board/am335x-bbb-pins.h
new file mode 100644
index 00000000..bdadd93b
--- /dev/null
+++ b/include/dt-bindings/board/am335x-bbb-pins.h
@@ -0,0 +1,82 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * This program is free software you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _DT_BINDINGS_BOARD_AM335X_BBB_PINS_H
+#define _DT_BINDINGS_BOARD_AM335X_BBB_PINS_H
+
+#define P8_03(mode) AM33XX_IOPAD(0x0818, mode) /* gpmc_ad6 */
+#define P8_04(mode) AM33XX_IOPAD(0x081c, mode) /* gpmc_ad7 */
+#define P8_05(mode) AM33XX_IOPAD(0x0808, mode) /* gpmc_ad2 */
+#define P8_06(mode) AM33XX_IOPAD(0x080c, mode) /* gpmc_ad3 */
+#define P8_07(mode) AM33XX_IOPAD(0x0890, mode) /* gpmc_advn_ale */
+#define P8_08(mode) AM33XX_IOPAD(0x0894, mode) /* gpmc_oen_ren */
+#define P8_09(mode) AM33XX_IOPAD(0x089c, mode) /* gpmc_be0n_cle */
+#define P8_10(mode) AM33XX_IOPAD(0x0898, mode) /* gpmc_wen */
+#define P8_11(mode) AM33XX_IOPAD(0x0834, mode) /* gpmc_ad13 */
+#define P8_12(mode) AM33XX_IOPAD(0x0830, mode) /* gpmc_ad12 */
+#define P8_13(mode) AM33XX_IOPAD(0x0824, mode) /* gpmc_ad9 */
+#define P8_14(mode) AM33XX_IOPAD(0x0828, mode) /* gpmc_ad10 */
+#define P8_15(mode) AM33XX_IOPAD(0x083c, mode) /* gpmc_ad15 */
+#define P8_16(mode) AM33XX_IOPAD(0x0838, mode) /* gpmc_ad14 */
+#define P8_17(mode) AM33XX_IOPAD(0x082c, mode) /* gpmc_ad11 */
+#define P8_18(mode) AM33XX_IOPAD(0x088c, mode) /* gpmc_clk */
+#define P8_19(mode) AM33XX_IOPAD(0x0820, mode) /* gpmc_ad8 */
+#define P8_20(mode) AM33XX_IOPAD(0x0884, mode) /* gpmc_csn2 */
+#define P8_21(mode) AM33XX_IOPAD(0x0880, mode) /* gpmc_csn1 */
+#define P8_22(mode) AM33XX_IOPAD(0x0814, mode) /* gpmc_ad5 */
+#define P8_23(mode) AM33XX_IOPAD(0x0810, mode) /* gpmc_ad4 */
+#define P8_24(mode) AM33XX_IOPAD(0x0804, mode) /* gpmc_ad1 */
+#define P8_25(mode) AM33XX_IOPAD(0x0800, mode) /* gpmc_ad0 */
+#define P8_26(mode) AM33XX_IOPAD(0x087c, mode) /* gpmc_csn0 */
+#define P8_27(mode) AM33XX_IOPAD(0x08e0, mode) /* lcd_vsync */
+#define P8_28(mode) AM33XX_IOPAD(0x08e8, mode) /* lcd_pclk */
+#define P8_29(mode) AM33XX_IOPAD(0x08e4, mode) /* lcd_hsync */
+#define P8_30(mode) AM33XX_IOPAD(0x08ec, mode) /* lcd_ac_bias_en */
+#define P8_31(mode) AM33XX_IOPAD(0x08d8, mode) /* lcd_data14 */
+#define P8_32(mode) AM33XX_IOPAD(0x08dc, mode) /* lcd_data15 */
+#define P8_33(mode) AM33XX_IOPAD(0x08d4, mode) /* lcd_data13 */
+#define P8_34(mode) AM33XX_IOPAD(0x08cc, mode) /* lcd_data11 */
+#define P8_35(mode) AM33XX_IOPAD(0x08d0, mode) /* lcd_data12 */
+#define P8_36(mode) AM33XX_IOPAD(0x08c8, mode) /* lcd_data10 */
+#define P8_37(mode) AM33XX_IOPAD(0x08c0, mode) /* lcd_data8 */
+#define P8_38(mode) AM33XX_IOPAD(0x08c4, mode) /* lcd_data9 */
+#define P8_39(mode) AM33XX_IOPAD(0x08b8, mode) /* lcd_data6 */
+#define P8_40(mode) AM33XX_IOPAD(0x08bc, mode) /* lcd_data7 */
+#define P8_41(mode) AM33XX_IOPAD(0x08b0, mode) /* lcd_data4 */
+#define P8_42(mode) AM33XX_IOPAD(0x08b4, mode) /* lcd_data5 */
+#define P8_43(mode) AM33XX_IOPAD(0x08a8, mode) /* lcd_data2 */
+#define P8_44(mode) AM33XX_IOPAD(0x08ac, mode) /* lcd_data3 */
+#define P8_45(mode) AM33XX_IOPAD(0x08a0, mode) /* lcd_data0 */
+#define P8_46(mode) AM33XX_IOPAD(0x08a4, mode) /* lcd_data1 */
+#define P9_11(mode) AM33XX_IOPAD(0x0870, mode) /* gpmc_wait0 */
+#define P9_12(mode) AM33XX_IOPAD(0x0878, mode) /* gpmc_be1n */
+#define P9_13(mode) AM33XX_IOPAD(0x0874, mode) /* gpmc_wpn */
+#define P9_14(mode) AM33XX_IOPAD(0x0848, mode) /* gpmc_a2 */
+#define P9_15(mode) AM33XX_IOPAD(0x0840, mode) /* gpmc_a0 */
+#define P9_16(mode) AM33XX_IOPAD(0x084c, mode) /* gpmc_a3 */
+#define P9_17(mode) AM33XX_IOPAD(0x095c, mode) /* spi0_cs0 */
+#define P9_18(mode) AM33XX_IOPAD(0x0958, mode) /* spi0_d1 */
+#define P9_19(mode) AM33XX_IOPAD(0x097c, mode) /* uart1_rtsn */
+#define P9_20(mode) AM33XX_IOPAD(0x0978, mode) /* uart1_ctsn */
+#define P9_21(mode) AM33XX_IOPAD(0x0954, mode) /* spi0_d0 */
+#define P9_22(mode) AM33XX_IOPAD(0x0950, mode) /* spi0_sclk */
+#define P9_23(mode) AM33XX_IOPAD(0x0844, mode) /* gpmc_a1 */
+#define P9_24(mode) AM33XX_IOPAD(0x0984, mode) /* uart1_txd */
+#define P9_25(mode) AM33XX_IOPAD(0x09ac, mode) /* mcasp0_ahclkx */
+#define P9_26(mode) AM33XX_IOPAD(0x0980, mode) /* uart1_rxd */
+#define P9_27(mode) AM33XX_IOPAD(0x09a4, mode) /* mcasp0_fsr */
+#define P9_28(mode) AM33XX_IOPAD(0x099c, mode) /* mcasp0_ahclkr */
+#define P9_29(mode) AM33XX_IOPAD(0x0994, mode) /* mcasp0_fsx */
+#define P9_30(mode) AM33XX_IOPAD(0x0998, mode) /* mcasp0_axr0 */
+#define P9_31(mode) AM33XX_IOPAD(0x0990, mode) /* mcasp0_aclkx */
+#define P9_41A(mode) AM33XX_IOPAD(0x09b4, mode) /* xdma_event_intr1 */
+#define P9_41B(mode) AM33XX_IOPAD(0x09a8, mode) /* mcasp0_axr1 */
+#define P9_42A(mode) AM33XX_IOPAD(0x0964, mode) /* P0_in_PWM0_out */
+#define P9_42B(mode) AM33XX_IOPAD(0x09a0, mode) /* mcasp0_aclkr */
+
+#endif
\ No newline at end of file
--
GitLab
From 88ace58c26ec3f70fd1cb9c284beab993c22b3a5 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Sat, 20 Jun 2020 09:41:58 +0530
Subject: [PATCH 03/86] easy BBAI pinmuxing
---
include/dt-bindings/board/am572x-bbai-pins.h | 108 +++++++++++++++++++
1 file changed, 108 insertions(+)
create mode 100644 include/dt-bindings/board/am572x-bbai-pins.h
diff --git a/include/dt-bindings/board/am572x-bbai-pins.h b/include/dt-bindings/board/am572x-bbai-pins.h
new file mode 100644
index 00000000..bb7f3124
--- /dev/null
+++ b/include/dt-bindings/board/am572x-bbai-pins.h
@@ -0,0 +1,108 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _DT_BINDINGS_BOARD_AM5729_BBAI_PINS_H
+#define _DT_BINDINGS_BOARD_AM5729_BBAI_PINS_H
+
+#define P8_03(mode) DRA7XX_CORE_IOPAD(0x379C, mode) /* AB8: P8.3: mmc3_dat6 */
+#define P8_04(mode) DRA7XX_CORE_IOPAD(0x37A0, mode) /* AB5: P8.4: mmc3_dat7 */
+#define P8_05(mode) DRA7XX_CORE_IOPAD(0x378C, mode) /* AC9: P8.5: mmc3_dat2 */
+#define P8_06(mode) DRA7XX_CORE_IOPAD(0x3790, mode) /* AC3: P8.6: mmc3_dat3 */
+#define P8_07(mode) DRA7XX_CORE_IOPAD(0x36EC, mode) /* G14: P8.7: mcasp1_axr14 */
+#define P8_08(mode) DRA7XX_CORE_IOPAD(0x36F0, mode) /* F14: P8.8: mcasp1_axr15 */
+#define P8_09(mode) DRA7XX_CORE_IOPAD(0x3698, mode) /* E17: P8.9: xref_clk1 */
+#define P8_10(mode) DRA7XX_CORE_IOPAD(0x36E8, mode) /* A13: P8.10: mcasp1_axr13 */
+#define P8_11(mode) DRA7XX_CORE_IOPAD(0x3510, mode) /* AH4: P8.11: vin1a_d7 */
+#define P8_12(mode) DRA7XX_CORE_IOPAD(0x350C, mode) /* AG6: P8.12: vin1a_d6 */
+#define P8_13(mode) DRA7XX_CORE_IOPAD(0x3590, mode) /* D3: P8.13: vin2a_d10 */
+#define P8_14(mode) DRA7XX_CORE_IOPAD(0x3598, mode) /* D5: P8.14: vin2a_d12 */
+#define P8_15A(mode) DRA7XX_CORE_IOPAD(0x3570, mode) /* D1: P8.15a: vin2a_d2 */
+#define P8_15B(mode) DRA7XX_CORE_IOPAD(0x35B4, mode) /* A3: P8.15b: vin2a_d19 */
+#define P8_16(mode) DRA7XX_CORE_IOPAD(0x35BC, mode) /* B4: P8.16: vin2a_d21 */
+#define P8_17(mode) DRA7XX_CORE_IOPAD(0x3624, mode) /* A7: P8.17: vout1_d18 */
+#define P8_18(mode) DRA7XX_CORE_IOPAD(0x3588, mode) /* F5: P8.18: vin2a_d8 */
+#define P8_19(mode) DRA7XX_CORE_IOPAD(0x358C, mode) /* E6: P8.19: vin2a_d9 */
+#define P8_20(mode) DRA7XX_CORE_IOPAD(0x3780, mode) /* AC4: P8.20: mmc3_cmd */
+#define P8_21(mode) DRA7XX_CORE_IOPAD(0x377C, mode) /* AD4: P8.21: mmc3_clk */
+#define P8_22(mode) DRA7XX_CORE_IOPAD(0x3798, mode) /* AD6: P8.22: mmc3_dat5 */
+#define P8_23(mode) DRA7XX_CORE_IOPAD(0x3794, mode) /* AC8: P8.23: mmc3_dat4 */
+#define P8_24(mode) DRA7XX_CORE_IOPAD(0x3788, mode) /* AC6: P8.24: mmc3_dat1 */
+#define P8_25(mode) DRA7XX_CORE_IOPAD(0x3784, mode) /* AC7: P8.25: mmc3_dat0 */
+#define P8_26(mode) DRA7XX_CORE_IOPAD(0x35B8, mode) /* B3: P8.26: vin2a_d20 */
+#define P8_27A(mode) DRA7XX_CORE_IOPAD(0x35D8, mode) /* E11: P8.27a: vout1_vsync */
+#define P8_27B(mode) DRA7XX_CORE_IOPAD(0x3628, mode) /* A8: P8.27b: vout1_d19 */
+#define P8_28A(mode) DRA7XX_CORE_IOPAD(0x35C8, mode) /* D11: P8.28a: vout1_clk */
+#define P8_28B(mode) DRA7XX_CORE_IOPAD(0x362C, mode) /* C9: P8.28b: vout1_d20 */
+#define P8_29A(mode) DRA7XX_CORE_IOPAD(0x35D4, mode) /* C11: P8.29a: vout1_hsync */
+#define P8_29B(mode) DRA7XX_CORE_IOPAD(0x3630, mode) /* A9: P8.29b: vout1_d21 */
+#define P8_30A(mode) DRA7XX_CORE_IOPAD(0x35CC, mode) /* B10: P8.30a: vout1_de */
+#define P8_30B(mode) DRA7XX_CORE_IOPAD(0x3634, mode) /* B9: P8.30b: vout1_d22 */
+#define P8_31A(mode) DRA7XX_CORE_IOPAD(0x3614, mode) /* C8: P8.31a: vout1_d14 */
+#define P8_31B(mode) DRA7XX_CORE_IOPAD(0x373C, mode) /* G16: P8.31b: mcasp4_axr0 */
+#define P8_32A(mode) DRA7XX_CORE_IOPAD(0x3618, mode) /* C7: P8.32a: vout1_d15 */
+#define P8_32B(mode) DRA7XX_CORE_IOPAD(0x3740, mode) /* D17: P8.32b: mcasp4_axr1 */
+#define P8_33A(mode) DRA7XX_CORE_IOPAD(0x3610, mode) /* C6: P8.33a: vout1_d13 */
+#define P8_33B(mode) DRA7XX_CORE_IOPAD(0x34E8, mode) /* AF9: P8.33b: vin1a_fld0 */
+#define P8_34A(mode) DRA7XX_CORE_IOPAD(0x3608, mode) /* D8: P8.34a: vout1_d11 */
+#define P8_34B(mode) DRA7XX_CORE_IOPAD(0x3564, mode) /* G6: P8.34b: vin2a_vsync0 */
+#define P8_35A(mode) DRA7XX_CORE_IOPAD(0x360C, mode) /* A5: P8.35a: vout1_d12 */
+#define P8_35B(mode) DRA7XX_CORE_IOPAD(0x34E4, mode) /* AD9: P8.35b: vin1a_de0 */
+#define P8_36A(mode) DRA7XX_CORE_IOPAD(0x3604, mode) /* D7: P8.36a: vout1_d10 */
+#define P8_36B(mode) DRA7XX_CORE_IOPAD(0x3568, mode) /* F2: P8.36b: vin2a_d0 */
+#define P8_37A(mode) DRA7XX_CORE_IOPAD(0x35FC, mode) /* E8: P8.37a: vout1_d8 */
+#define P8_37B(mode) DRA7XX_CORE_IOPAD(0x3738, mode) /* A21: P8.37b: mcasp4_fsx */
+#define P8_38A(mode) DRA7XX_CORE_IOPAD(0x3600, mode) /* D9: P8.38a: vout1_d9 */
+#define P8_38B(mode) DRA7XX_CORE_IOPAD(0x3734, mode) /* C18: P8.38b: mcasp4_aclkx */
+#define P8_39(mode) DRA7XX_CORE_IOPAD(0x35F4, mode) /* F8: P8.39: vout1_d6 */
+#define P8_40(mode) DRA7XX_CORE_IOPAD(0x35F8, mode) /* E7: P8.40: vout1_d7 */
+#define P8_41(mode) DRA7XX_CORE_IOPAD(0x35EC, mode) /* E9: P8.41: vout1_d4 */
+#define P8_42(mode) DRA7XX_CORE_IOPAD(0x35F0, mode) /* F9: P8.42: vout1_d5 */
+#define P8_43(mode) DRA7XX_CORE_IOPAD(0x35E4, mode) /* F10: P8.43: vout1_d2 */
+#define P8_44(mode) DRA7XX_CORE_IOPAD(0x35E8, mode) /* G11: P8.44: vout1_d3 */
+#define P8_45A(mode) DRA7XX_CORE_IOPAD(0x35DC, mode) /* F11: P8.45a: vout1_d0 */
+#define P8_45B(mode) DRA7XX_CORE_IOPAD(0x361C, mode) /* B7: P8.45b: vout1_d16 */
+#define P8_46A(mode) DRA7XX_CORE_IOPAD(0x35E0, mode) /* G10: P8.46a: vout1_d1 */
+#define P8_46B(mode) DRA7XX_CORE_IOPAD(0x3638, mode) /* A10: P8.46b: vout1_d23 */
+#define P9_11A(mode) DRA7XX_CORE_IOPAD(0x372C, mode) /* B19: P9.11a: mcasp3_axr0 */
+#define P9_11B(mode) DRA7XX_CORE_IOPAD(0x3620, mode) /* B8: P9.11b: vout1_d17 */
+#define P9_12(mode) DRA7XX_CORE_IOPAD(0x36AC, mode) /* B14: P9.12: mcasp1_aclkr */
+#define P9_13(mode) DRA7XX_CORE_IOPAD(0x3730, mode) /* C17: P9.13: mcasp3_axr1 */
+#define P9_14(mode) DRA7XX_CORE_IOPAD(0x35AC, mode) /* D6: P9.14: vin2a_d17 */
+#define P9_15(mode) DRA7XX_CORE_IOPAD(0x3514, mode) /* AG4: P9.15: vin1a_d8 */
+#define P9_16(mode) DRA7XX_CORE_IOPAD(0x35B0, mode) /* C5: P9.16: vin2a_d18 */
+#define P9_17A(mode) DRA7XX_CORE_IOPAD(0x37CC, mode) /* B24: P9.17a: spi2_cs0 */
+#define P9_17B(mode) DRA7XX_CORE_IOPAD(0x36B8, mode) /* F12: P9.17b: mcasp1_axr1 */
+#define P9_18A(mode) DRA7XX_CORE_IOPAD(0x37C8, mode) /* G17: P9.18a: spi2_d0 */
+#define P9_18B(mode) DRA7XX_CORE_IOPAD(0x36B4, mode) /* G12: P9.18b: mcasp1_axr0 */
+#define P9_19A(mode) DRA7XX_CORE_IOPAD(0x3440, mode) /* R6: P9.19a: gpmc_a0.i2c4_scl */
+#define P9_19B(mode) DRA7XX_CORE_IOPAD(0x357C, mode) /* F4: P9.19b: vin2a_d5.pr1_pru1_gpi2 */
+#define P9_20A(mode) DRA7XX_CORE_IOPAD(0x3444, mode) /* T9: P9.20a: gpmc_a1.i2c4_sda */
+#define P9_20B(mode) DRA7XX_CORE_IOPAD(0x3578, mode) /* D2: P9.20b: vin2a_d4.pr1_pru1_gpi1 */
+#define P9_21A(mode) DRA7XX_CORE_IOPAD(0x34F0, mode) /* AF8: P9.21a: vin1a_vsync0 */
+#define P9_21B(mode) DRA7XX_CORE_IOPAD(0x37C4, mode) /* B22: P9.21b: spi2_d1 */
+#define P9_22A(mode) DRA7XX_CORE_IOPAD(0x369C, mode) /* B26: P9.22a: xref_clk2 */
+#define P9_22B(mode) DRA7XX_CORE_IOPAD(0x37C0, mode) /* A26: P9.22b: spi2_sclk */
+#define P9_23(mode) DRA7XX_CORE_IOPAD(0x37B4, mode) /* A22: P9.23: spi1_cs1 */
+#define P9_24(mode) DRA7XX_CORE_IOPAD(0x368C, mode) /* F20: P9.24: gpio6_15 */
+#define P9_25(mode) DRA7XX_CORE_IOPAD(0x3694, mode) /* D18: P9.25: xref_clk0 */
+#define P9_26A(mode) DRA7XX_CORE_IOPAD(0x3688, mode) /* E21: P9.26a: gpio6_14 */
+#define P9_26B(mode) DRA7XX_CORE_IOPAD(0x3544, mode) /* AE2: P9.26b: vin1a_d20 */
+#define P9_27A(mode) DRA7XX_CORE_IOPAD(0x35A0, mode) /* C3: P9.27a: vin2a_d14 */
+#define P9_27B(mode) DRA7XX_CORE_IOPAD(0x36B0, mode) /* J14: P9.27b: mcasp1_fsr */
+#define P9_28(mode) DRA7XX_CORE_IOPAD(0x36E0, mode) /* A12: P9.28: mcasp1_axr11 */
+#define P9_29A(mode) DRA7XX_CORE_IOPAD(0x36D8, mode) /* A11: P9.29a: mcasp1_axr9 */
+#define P9_29B(mode) DRA7XX_CORE_IOPAD(0x36A8, mode) /* D14: P9.29b: mcasp1_fsx */
+#define P9_30(mode) DRA7XX_CORE_IOPAD(0x36DC, mode) /* B13: P9.30: mcasp1_axr10 */
+#define P9_31A(mode) DRA7XX_CORE_IOPAD(0x36D4, mode) /* B12: P9.31a: mcasp1_axr8 */
+#define P9_31B(mode) DRA7XX_CORE_IOPAD(0x36A4, mode) /* C14: P9.31b: mcasp1_aclkx */
+#define P9_41A(mode) DRA7XX_CORE_IOPAD(0x36A0, mode) /* C23: P9.41a: xref_clk3 */
+#define P9_41B(mode) DRA7XX_CORE_IOPAD(0x3580, mode) /* C1: P9.41b: vin2a_d6 */
+#define P9_42A(mode) DRA7XX_CORE_IOPAD(0x36E4, mode) /* E14: P9.42a: mcasp1_axr12 */
+#define P9_42B(mode) DRA7XX_CORE_IOPAD(0x359C, mode) /* C2: P9.42b: vin2a_d13 */
+
+#endif
\ No newline at end of file
--
GitLab
From ef414f32180c0047144b412a10c43f76ed914609 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Sat, 20 Jun 2020 09:42:23 +0530
Subject: [PATCH 04/86] add bbb-bone-buses.dtsi
---
src/arm/am335x-boneblack-uboot-univ.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/arm/am335x-boneblack-uboot-univ.dts b/src/arm/am335x-boneblack-uboot-univ.dts
index 2dd94e62..71264fdc 100644
--- a/src/arm/am335x-boneblack-uboot-univ.dts
+++ b/src/arm/am335x-boneblack-uboot-univ.dts
@@ -7,6 +7,7 @@
#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
#include "am335x-bone-common-univ.dtsi"
+#include "bbb-bone-buses.dtsi"
/ {
model = "TI AM335x BeagleBone Black";
--
GitLab
From 369a2355901c69e983059dd156f7f9066840d386 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Sat, 20 Jun 2020 09:43:16 +0530
Subject: [PATCH 05/86] clean and add bbai-bone-buses.dtsi
---
src/arm/am5729-beagleboneai.dts | 1606 +------------------------------
1 file changed, 2 insertions(+), 1604 deletions(-)
diff --git a/src/arm/am5729-beagleboneai.dts b/src/arm/am5729-beagleboneai.dts
index 057f2f00..b8086f2c 100644
--- a/src/arm/am5729-beagleboneai.dts
+++ b/src/arm/am5729-beagleboneai.dts
@@ -12,6 +12,8 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/dra.h>
+#include "bbai-bone-buses.dtsi"
+#include "am572x-bone-common-univ.dtsi"
/ {
model = "BeagleBoard.org BeagleBone AI";
@@ -265,1613 +267,9 @@
compatible = "ti,pruss-shmem";
reg = <0x4b280000 0x020000>;
};
-
- cape-universal {
- compatible = "gpio-of-helper";
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <>;
-
- P8_03 {
- gpio-name = "P8_03";
- gpio = <&gpio1 24 0>;
- input;
- dir-changeable;
- };
-
- P8_04 {
- gpio-name = "P8_04";
- gpio = <&gpio1 25 0>;
- input;
- dir-changeable;
- };
-
- P8_05 {
- gpio-name = "P8_05";
- gpio = <&gpio7 1 0>;
- input;
- dir-changeable;
- };
-
- P8_06 {
- gpio-name = "P8_06";
- gpio = <&gpio7 2 0>;
- input;
- dir-changeable;
- };
-
- P8_07 {
- gpio-name = "P8_07";
- gpio = <&gpio6 5 0>;
- input;
- dir-changeable;
- };
-
- P8_08 {
- gpio-name = "P8_08";
- gpio = <&gpio6 6 0>;
- input;
- dir-changeable;
- };
-
- P8_09 {
- gpio-name = "P8_09";
- gpio = <&gpio6 18 0>;
- input;
- dir-changeable;
- };
-
- P8_10 {
- gpio-name = "P8_10";
- gpio = <&gpio6 4 0>;
- input;
- dir-changeable;
- };
-
- P8_11 {
- gpio-name = "P8_11";
- gpio = <&gpio3 11 0>;
- input;
- dir-changeable;
- };
-
- P8_12 {
- gpio-name = "P8_12";
- gpio = <&gpio3 10 0>;
- input;
- dir-changeable;
- };
-
- P8_13 {
- gpio-name = "P8_13";
- gpio = <&gpio4 11 0>;
- input;
- dir-changeable;
- };
-
- P8_14 {
- gpio-name = "P8_14";
- gpio = <&gpio4 13 0>;
- input;
- dir-changeable;
- };
-
- P8_15 {
- gpio-name = "P8_15";
- gpio = <&gpio4 3 0>;
- input;
- dir-changeable;
- };
-
- P8_16 {
- gpio-name = "P8_16";
- gpio = <&gpio4 29 0>;
- input;
- dir-changeable;
- };
-
- P8_17 {
- gpio-name = "P8_17";
- gpio = <&gpio8 18 0>;
- input;
- dir-changeable;
- };
-
- P8_18 {
- gpio-name = "P8_18";
- gpio = <&gpio4 9 0>;
- input;
- dir-changeable;
- };
-
- P8_19 {
- gpio-name = "P8_19";
- gpio = <&gpio4 10 0>;
- input;
- dir-changeable;
- };
-
- P8_20 {
- gpio-name = "P8_20";
- gpio = <&gpio6 30 0>;
- input;
- dir-changeable;
- };
-
- P8_21 {
- gpio-name = "P8_21";
- gpio = <&gpio6 29 0>;
- input;
- dir-changeable;
- };
-
- P8_22 {
- gpio-name = "P8_22";
- gpio = <&gpio1 23 0>;
- input;
- dir-changeable;
- };
-
- P8_23 {
- gpio-name = "P8_23";
- gpio = <&gpio1 22 0>;
- input;
- dir-changeable;
- };
-
- P8_24 {
- gpio-name = "P8_24";
- gpio = <&gpio7 0 0>;
- input;
- dir-changeable;
- };
-
- P8_25 {
- gpio-name = "P8_25";
- gpio = <&gpio6 31 0>;
- input;
- dir-changeable;
- };
-
- P8_26 {
- gpio-name = "P8_26";
- gpio = <&gpio4 28 0>;
- input;
- dir-changeable;
- };
-
- P8_27 {
- gpio-name = "P8_27";
- gpio = <&gpio4 23 0>;
- input;
- dir-changeable;
- };
-
- P8_28 {
- gpio-name = "P8_28";
- gpio = <&gpio4 19 0>;
- input;
- dir-changeable;
- };
-
- P8_29 {
- gpio-name = "P8_29";
- gpio = <&gpio4 22 0>;
- input;
- dir-changeable;
- };
-
- P8_30 {
- gpio-name = "P8_30";
- gpio = <&gpio4 20 0>;
- input;
- dir-changeable;
- };
-
- P8_31 {
- gpio-name = "P8_31";
- gpio = <&gpio8 14 0>;
- input;
- dir-changeable;
- };
-
- P8_32 {
- gpio-name = "P8_32";
- gpio = <&gpio8 15 0>;
- input;
- dir-changeable;
- };
-
- P8_33 {
- gpio-name = "P8_33";
- gpio = <&gpio8 13 0>;
- input;
- dir-changeable;
- };
-
- P8_34 {
- gpio-name = "P8_34";
- gpio = <&gpio8 11 0>;
- input;
- dir-changeable;
- };
-
- P8_35 {
- gpio-name = "P8_35";
- gpio = <&gpio8 12 0>;
- input;
- dir-changeable;
- };
-
- P8_36 {
- gpio-name = "P8_36";
- gpio = <&gpio8 10 0>;
- input;
- dir-changeable;
- };
-
- P8_37 {
- gpio-name = "P8_37";
- gpio = <&gpio8 8 0>;
- input;
- dir-changeable;
- };
-
- P8_38 {
- gpio-name = "P8_38";
- gpio = <&gpio8 9 0>;
- input;
- dir-changeable;
- };
-
- P8_39 {
- gpio-name = "P8_39";
- gpio = <&gpio8 6 0>;
- input;
- dir-changeable;
- };
-
- P8_40 {
- gpio-name = "P8_40";
- gpio = <&gpio8 7 0>;
- input;
- dir-changeable;
- };
-
- P8_41 {
- gpio-name = "P8_41";
- gpio = <&gpio8 4 0>;
- input;
- dir-changeable;
- };
-
- P8_42 {
- gpio-name = "P8_42";
- gpio = <&gpio8 5 0>;
- input;
- dir-changeable;
- };
-
- P8_43 {
- gpio-name = "P8_43";
- gpio = <&gpio8 2 0>;
- input;
- dir-changeable;
- };
-
- P8_44 {
- gpio-name = "P8_44";
- gpio = <&gpio8 3 0>;
- input;
- dir-changeable;
- };
-
- P8_45 {
- gpio-name = "P8_45";
- gpio = <&gpio8 0 0>;
- input;
- dir-changeable;
- };
-
- P8_46 {
- gpio-name = "P8_46";
- gpio = <&gpio8 1 0>;
- input;
- dir-changeable;
- };
-
- P9_11 {
- gpio-name = "P9_11";
- gpio = <&gpio8 17 0>;
- input;
- dir-changeable;
- };
-
- P9_12 {
- gpio-name = "P9_12";
- gpio = <&gpio5 0 0>;
- input;
- dir-changeable;
- };
-
- P9_13 {
- gpio-name = "P9_13";
- gpio = <&gpio6 12 0>;
- input;
- dir-changeable;
- };
-
- P9_14 {
- gpio-name = "P9_14";
- gpio = <&gpio4 25 0>;
- input;
- dir-changeable;
- };
-
- P9_15 {
- gpio-name = "P9_15";
- gpio = <&gpio3 12 0>;
- input;
- dir-changeable;
- };
-
- P9_16 {
- gpio-name = "P9_16";
- gpio = <&gpio4 26 0>;
- input;
- dir-changeable;
- };
-
- P9_17 {
- gpio-name = "P9_17";
- gpio = <&gpio7 17 0>;
- input;
- dir-changeable;
- };
-
- P9_18 {
- gpio-name = "P9_18";
- gpio = <&gpio7 16 0>;
- input;
- dir-changeable;
- };
-
- P9_19 {
- gpio-name = "P9_19";
- gpio = <&gpio7 3 0>;
- input;
- dir-changeable;
- };
-
- P9_20 {
- gpio-name = "P9_20";
- gpio = <&gpio7 4 0>;
- input;
- dir-changeable;
- };
-
- P9_21 {
- gpio-name = "P9_21";
- gpio = <&gpio3 3 0>;
- input;
- dir-changeable;
- };
-
- P9_22 {
- gpio-name = "P9_22";
- gpio = <&gpio6 19 0>;
- input;
- dir-changeable;
- };
-
- P9_23 {
- gpio-name = "P9_23";
- gpio = <&gpio7 11 0>;
- input;
- dir-changeable;
- };
-
- P9_24 {
- gpio-name = "P9_24";
- gpio = <&gpio6 15 0>;
- input;
- dir-changeable;
- };
-
- P9_25 {
- gpio-name = "P9_25";
- gpio = <&gpio6 17 0>;
- input;
- dir-changeable;
- };
-
- P9_26 {
- gpio-name = "P9_26";
- gpio = <&gpio6 14 0>;
- input;
- dir-changeable;
- };
-
- P9_27 {
- gpio-name = "P9_27";
- gpio = <&gpio6 15 0>;
- input;
- dir-changeable;
- };
-
- P9_28 {
- gpio-name = "P9_28";
- gpio = <&gpio4 17 0>;
- input;
- dir-changeable;
- };
-
- P9_29 {
- gpio-name = "P9_29";
- gpio = <&gpio5 11 0>;
- input;
- dir-changeable;
- };
-
- P9_30 {
- gpio-name = "P9_30";
- gpio = <&gpio5 12 0>;
- input;
- dir-changeable;
- };
-
- P9_31 {
- gpio-name = "P9_31";
- gpio = <&gpio5 10 0>;
- input;
- dir-changeable;
- };
-
- P9_41 {
- gpio-name = "P9_41";
- gpio = <&gpio6 20 0>;
- input;
- dir-changeable;
- };
-
- P9_42 {
- gpio-name = "P9_42";
- gpio = <&gpio4 18 0>;
- input;
- dir-changeable;
- };
- };
};
&dra7_pmx_core {
- /************************/
- /* P8 Header */
- /************************/
-
- /* P8_01 GND */
-
- /* P8_02 GND */
-
-
- /* P8_03 (ball AB8) gpio1_24 */
- P8_03_default_pin: pinmux_P8_03_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
- P8_03_gpio_pin: pinmux_P8_03_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
- P8_03_gpio_pu_pin: pinmux_P8_03_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
- P8_03_gpio_pd_pin: pinmux_P8_03_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
- P8_03_gpio_input_pin: pinmux_P8_03_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x379C, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
-
- /* P8_04 (ball AB5) gpio1_25 */
- P8_04_default_pin: pinmux_P8_04_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
- P8_04_gpio_pin: pinmux_P8_04_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
- P8_04_gpio_pu_pin: pinmux_P8_04_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
- P8_04_gpio_pd_pin: pinmux_P8_04_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
- P8_04_gpio_input_pin: pinmux_P8_04_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37A0, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
-
- /* P8_05 (ball AC9) gpio7_1 */
- P8_05_default_pin: pinmux_P8_05_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
- P8_05_gpio_pin: pinmux_P8_05_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
- P8_05_gpio_pu_pin: pinmux_P8_05_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
- P8_05_gpio_pd_pin: pinmux_P8_05_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
- P8_05_gpio_input_pin: pinmux_P8_05_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x378C, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
-
- /* P8_06 (ball AC3) gpio7_2 */
- P8_06_default_pin: pinmux_P8_06_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
- P8_06_gpio_pin: pinmux_P8_06_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
- P8_06_gpio_pu_pin: pinmux_P8_06_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
- P8_06_gpio_pd_pin: pinmux_P8_06_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
- P8_06_gpio_input_pin: pinmux_P8_06_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3790, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
-
- /* P8_07 (ball G14) gpio6_5*/
- P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
- P8_07_gpio_pin: pinmux_P8_07_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
- P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
- P8_07_gpio_pd_pin: pinmux_P8_07_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
- P8_07_gpio_input_pin: pinmux_P8_07_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36EC, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
- P8_07_timer_pin: pinmux_P8_07_timer_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr14.timer11 */
-
- /* P8_08 (ball F14) gpio6_6 */
- P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
- P8_08_gpio_pin: pinmux_P8_08_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
- P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
- P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
- P8_08_gpio_input_pin: pinmux_P8_08_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36F0, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
- P8_08_timer_pin: pinmux_P8_08_timer_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr15.timer12 */
-
- /* P8_09 (ball E17) gpio6_18 */
- P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
- P8_09_gpio_pin: pinmux_P8_09_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
- P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
- P8_09_gpio_pd_pin: pinmux_P8_09_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
- P8_09_gpio_input_pin: pinmux_P8_09_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3698, PIN_INPUT | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
- P8_09_timer_pin: pinmux_P8_09_timer_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* xref_clk1.timer14 */
-
- /* P8_10 (ball A13) gpio6_4 */
- P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
- P8_10_gpio_pin: pinmux_P8_10_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
- P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
- P8_10_gpio_pd_pin: pinmux_P8_10_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
- P8_10_gpio_input_pin: pinmux_P8_10_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E8, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
- P8_10_timer_pin: pinmux_P8_10_timer_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr13.timer10 */
-
- /* P8_11 (ball AH4) gpio3_11 */
- P8_11_default_pin: pinmux_P8_11_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
- P8_11_gpio_pin: pinmux_P8_11_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
- P8_11_gpio_pu_pin: pinmux_P8_11_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
- P8_11_gpio_pd_pin: pinmux_P8_11_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
- P8_11_gpio_input_pin: pinmux_P8_11_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
- P8_11_qep_pin: pinmux_P8_11_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_d7.eQEP2B_in */
- P8_11_pruout_pin: pinmux_P8_11_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d7.pr1_pru0_gpo4 */
-
- /* P8_12 (ball AG6) gpio3_10 */
- P8_12_default_pin: pinmux_P8_12_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
- P8_12_gpio_pin: pinmux_P8_12_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
- P8_12_gpio_pu_pin: pinmux_P8_12_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
- P8_12_gpio_pd_pin: pinmux_P8_12_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
- P8_12_gpio_input_pin: pinmux_P8_12_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
- P8_12_qep_pin: pinmux_P8_12_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_d6.eQEP2A_in */
- P8_12_pruout_pin: pinmux_P8_12_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d6.pr1_pru0_gpo3 */
-
- /* P8_13 (ball D3) gpio4_11 */
- P8_13_default_pin: pinmux_P8_13_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
- P8_13_gpio_pin: pinmux_P8_13_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
- P8_13_gpio_pu_pin: pinmux_P8_13_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
- P8_13_gpio_pd_pin: pinmux_P8_13_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
- P8_13_gpio_input_pin: pinmux_P8_13_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
- P8_13_pwm_pin: pinmux_P8_13_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d10.ehrpwm2B */
-
- /* P8_14 (ball D5) gpio4_13*/
- P8_14_default_pin: pinmux_P8_14_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
- P8_14_gpio_pin: pinmux_P8_14_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
- P8_14_gpio_pu_pin: pinmux_P8_14_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
- P8_14_gpio_pd_pin: pinmux_P8_14_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
- P8_14_gpio_input_pin: pinmux_P8_14_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
- P8_14_pwm_pin: pinmux_P8_14_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d12.eCAP2_in_PWM2_out */
-
- /* P8_15a (ball D1) gpio4_3*/
- P8_15_default_pin: pinmux_P8_15_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
- P8_15_gpio_pin: pinmux_P8_15_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
- P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
- P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
- P8_15_gpio_input_pin: pinmux_P8_15_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3570, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
- P8_15_pru_ecap_pin: pinmux_P8_15_pru_ecap_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE11) >; }; /* vin2a_d2.pr1_ecap0_ecap_capin_apwm_o */
-
- /* P8_15b (ball A3) gpio4_27 */
- P8_15_pruin_pin: pinmux_P8_15_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B4, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d19.pr1_pru1_gpi16*/
-
- /* P8_16 (ball B4) gpio4_29 */
- P8_16_default_pin: pinmux_P8_16_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
- P8_16_gpio_pin: pinmux_P8_16_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
- P8_16_gpio_pu_pin: pinmux_P8_16_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
- P8_16_gpio_pd_pin: pinmux_P8_16_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
- P8_16_gpio_input_pin: pinmux_P8_16_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35BC, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
- P8_16_pruin_pin: pinmux_P8_16_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35BC, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d21.pr1_pru1_gpi18 */
-
- /* P8_17 (ball A7) gpio8_18 */
- P8_17_default_pin: pinmux_P8_17_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
- P8_17_gpio_pin: pinmux_P8_17_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
- P8_17_gpio_pu_pin: pinmux_P8_17_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
- P8_17_gpio_pd_pin: pinmux_P8_17_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
- P8_17_gpio_input_pin: pinmux_P8_17_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3624, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
-
- /* P8_18 (ball F5) gpio4_9 */
- P8_18_default_pin: pinmux_P8_18_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
- P8_18_gpio_pin: pinmux_P8_18_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
- P8_18_gpio_pu_pin: pinmux_P8_18_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
- P8_18_gpio_pd_pin: pinmux_P8_18_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
- P8_18_gpio_input_pin: pinmux_P8_18_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3588, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
- P8_18_qep_pin: pinmux_P8_18_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d8.eQEP2_strobe */
-
- /* P8_19 (ball E6) gpio4_10 */
- P8_19_default_pin: pinmux_P8_19_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
- P8_19_gpio_pin: pinmux_P8_19_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
- P8_19_gpio_pu_pin: pinmux_P8_19_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
- P8_19_gpio_pd_pin: pinmux_P8_19_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
- P8_19_gpio_input_pin: pinmux_P8_19_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x358C, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
- P8_19_pwm_pin: pinmux_P8_19_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d9.ehrpwm2A */
-
- /* P8_20 (ball AC4) gpio6_30 */
- P8_20_default_pin: pinmux_P8_20_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
- P8_20_gpio_pin: pinmux_P8_20_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
- P8_20_gpio_pu_pin: pinmux_P8_20_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
- P8_20_gpio_pd_pin: pinmux_P8_20_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
- P8_20_gpio_input_pin: pinmux_P8_20_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
- P8_20_pruout_pin: pinmux_P8_20_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_cmd.pr2_pru0_gpo3 */
- P8_20_pruin_pin: pinmux_P8_20_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_INPUT | MUX_MODE12) >; }; /* mmc3_cmd.pr2_pru0_gpi3 */
-
- /* P8_21 (ball AD4) gpio6_29 */
- P8_21_default_pin: pinmux_P8_21_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
- P8_21_gpio_pin: pinmux_P8_21_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
- P8_21_gpio_pu_pin: pinmux_P8_21_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
- P8_21_gpio_pd_pin: pinmux_P8_21_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
- P8_21_gpio_input_pin: pinmux_P8_21_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
- P8_21_pruout_pin: pinmux_P8_21_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_clk.pr2_pru0_gpo2 */
- P8_21_pruin_pin: pinmux_P8_21_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_INPUT | MUX_MODE12) >; }; /* mmc3_clk.pr2_pru0_gpi2 */
-
- /* P8_22 (ball AD6) gpio1_23 */
- P8_22_default_pin: pinmux_P8_22_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
- P8_22_gpio_pin: pinmux_P8_22_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
- P8_22_gpio_pu_pin: pinmux_P8_22_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
- P8_22_gpio_pd_pin: pinmux_P8_22_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
- P8_22_gpio_input_pin: pinmux_P8_22_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3798, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
-
- /* P8_23 (ball AC8) gpio1_22 */
- P8_23_default_pin: pinmux_P8_23_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
- P8_23_gpio_pin: pinmux_P8_23_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
- P8_23_gpio_pu_pin: pinmux_P8_23_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
- P8_23_gpio_pd_pin: pinmux_P8_23_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
- P8_23_gpio_input_pin: pinmux_P8_23_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3794, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
-
- /* P8_24 (ball AC6) gpio7_0 */
- P8_24_default_pin: pinmux_P8_24_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
- P8_24_gpio_pin: pinmux_P8_24_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
- P8_24_gpio_pu_pin: pinmux_P8_24_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
- P8_24_gpio_pd_pin: pinmux_P8_24_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
- P8_24_gpio_input_pin: pinmux_P8_24_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3788, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
-
- /* P8_25 (ball AC7) gpio6_31 */
- P8_25_default_pin: pinmux_P8_25_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
- P8_25_gpio_pin: pinmux_P8_25_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
- P8_25_gpio_pu_pin: pinmux_P8_25_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
- P8_25_gpio_pd_pin: pinmux_P8_25_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
- P8_25_gpio_input_pin: pinmux_P8_25_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3784, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
-
- /* P8_26 (ball B3) gpio4_28 */
- P8_26_default_pin: pinmux_P8_26_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
- P8_26_gpio_pin: pinmux_P8_26_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
- P8_26_gpio_pu_pin: pinmux_P8_26_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
- P8_26_gpio_pd_pin: pinmux_P8_26_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
- P8_26_gpio_input_pin: pinmux_P8_26_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B8, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
-
- /* P8_27a (ball E11) gpio4_23 */
- P8_27_default_pin: pinmux_P8_27_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
- P8_27_gpio_pin: pinmux_P8_27_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
- P8_27_gpio_pu_pin: pinmux_P8_27_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
- P8_27_gpio_pd_pin: pinmux_P8_27_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
- P8_27_gpio_input_pin: pinmux_P8_27_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D8, PIN_INPUT | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
-
- /* P8_27b (ball A8) gpio8_19 */
- P8_27_pruout_pin: pinmux_P8_27_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3628, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d19.pr2_pru0_gpo16 */
- P8_27_pruin_pin: pinmux_P8_27_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3628, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d19.pr2_pru0_gpi16 */
-
- /* P8_28a (ball D11) gpio4_19 */
- P8_28_default_pin: pinmux_P8_28_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
- P8_28_gpio_pin: pinmux_P8_28_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
- P8_28_gpio_pu_pin: pinmux_P8_28_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
- P8_28_gpio_pd_pin: pinmux_P8_28_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
- P8_28_gpio_input_pin: pinmux_P8_28_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35C8, PIN_INPUT | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
-
- /* P8_28b (ball C9) gpio8_20 */
- P8_28_pruout_pin: pinmux_P8_28_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x362C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d20.pr2_pru0_gpo17 */
- P8_28_pruin_pin: pinmux_P8_28_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x362C, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d20.pr2_pru0_gpi17 */
-
- /* P8_29a (ball C11) gpio4_22 */
- P8_29_default_pin: pinmux_P8_29_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
- P8_29_gpio_pin: pinmux_P8_29_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
- P8_29_gpio_pu_pin: pinmux_P8_29_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
- P8_29_gpio_pd_pin: pinmux_P8_29_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
- P8_29_gpio_input_pin: pinmux_P8_29_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D4, PIN_INPUT | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
-
- /* P8_29b (ball A9) gpio8_21 */
- P8_29_pruout_pin: pinmux_P8_29_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3630, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d21.pr2_pru0_gpo18 */
- P8_29_pruin_pin: pinmux_P8_29_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3630, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d21.pr2_pru0_gpi18 */
-
- /* P8_30a (ball B10) gpio4_20 */
- P8_30_default_pin: pinmux_P8_30_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
- P8_30_gpio_pin: pinmux_P8_30_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
- P8_30_gpio_pu_pin: pinmux_P8_30_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
- P8_30_gpio_pd_pin: pinmux_P8_30_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
- P8_30_gpio_input_pin: pinmux_P8_30_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35CC, PIN_INPUT | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
-
- /* P8_30b (ball B9) gpio8_22 */
- P8_30_pruout_pin: pinmux_P8_30_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3634, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d22.pr2_pru0_gpo19 */
- P8_30_pruin_pin: pinmux_P8_30_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3634, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d22.pr2_pru0_gpi19 */
-
-
- /* P8_31a (ball C8) gpio8_14 */
- P8_31_default_pin: pinmux_P8_31_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
- P8_31_gpio_pin: pinmux_P8_31_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
- P8_31_gpio_pu_pin: pinmux_P8_31_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
- P8_31_gpio_pd_pin: pinmux_P8_31_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
- P8_31_gpio_input_pin: pinmux_P8_31_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3614, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
-
- /* P8_31b (ball G16) */
- P8_31_uart_pin: pinmux_P8_31_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x373C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp4_axr0.uart4_rxd */
-
- /* P8_32a (ball C7) gpio8_15 */
- P8_32_default_pin: pinmux_P8_32_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
- P8_32_gpio_pin: pinmux_P8_32_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
- P8_32_gpio_pu_pin: pinmux_P8_32_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
- P8_32_gpio_pd_pin: pinmux_P8_32_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
- P8_32_gpio_input_pin: pinmux_P8_32_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3618, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
-
- /* P8_32b (ball D17) */
- P8_32_uart_pin: pinmux_P8_32_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3740, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp4_axr1.uart4_txd */
-
- /* P8_33a (ball C6) gpio8_13 */
- P8_33_default_pin: pinmux_P8_33_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
- P8_33_gpio_pin: pinmux_P8_33_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
- P8_33_gpio_pu_pin: pinmux_P8_33_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
- P8_33_gpio_pd_pin: pinmux_P8_33_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
- P8_33_gpio_input_pin: pinmux_P8_33_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3610, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
-
- /* P8_33b (ball AF9) gpio3_1 */
- P8_33_qep_pin: pinmux_P8_33_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_fld0.eQEP1B_in */
-
-
- /* P8_34a (ball D8) gpio8_11 */
- P8_34_default_pin: pinmux_P8_34_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
- P8_34_gpio_pin: pinmux_P8_34_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
- P8_34_gpio_pu_pin: pinmux_P8_34_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
- P8_34_gpio_pd_pin: pinmux_P8_34_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
- P8_34_gpio_input_pin: pinmux_P8_34_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3608, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
-
- /* P8_34b (ball G6) gpio4_0 */
- P8_34_pwm_pin: pinmux_P8_34_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3564, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_vsync0.ehrpwm1A */
-
- /* P8_35a (ball A5) gpio8_12 */
- P8_35_default_pin: pinmux_P8_35_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
- P8_35_gpio_pin: pinmux_P8_35_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
- P8_35_gpio_pu_pin: pinmux_P8_35_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
- P8_35_gpio_pd_pin: pinmux_P8_35_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
- P8_35_gpio_input_pin: pinmux_P8_35_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x360C, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
-
- /* P8_35b (ball AD9) gpio3_0 */
- P8_35_qep_pin: pinmux_P8_35_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_de0.eQEP1A_in */
-
- /* P8_36a (ball D7) gpio8_10 */
- P8_36_default_pin: pinmux_P8_36_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
- P8_36_gpio_pin: pinmux_P8_36_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
- P8_36_gpio_pu_pin: pinmux_P8_36_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
- P8_36_gpio_pd_pin: pinmux_P8_36_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
- P8_36_gpio_input_pin: pinmux_P8_36_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3604, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
-
- /* P8_36b (ball F2) gpio4_1 */
- P8_36_pwm_pin: pinmux_P8_36_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3568, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d0.ehrpwm1B */
-
- /* P8_37a (ball E8) gpio8_8 */
- P8_37_default_pin: pinmux_P8_37_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
- P8_37_gpio_pin: pinmux_P8_37_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
- P8_37_gpio_pu_pin: pinmux_P8_37_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
- P8_37_gpio_pd_pin: pinmux_P8_37_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
- P8_37_gpio_input_pin: pinmux_P8_37_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35FC, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
-
- /* P8_37b (ball A21) */
- P8_37_uart_pin: pinmux_P8_37_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3738, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp4_fsx.uart8_txd */
-
- /* P8_38a (ball D9) gpio8_9 */
- P8_38_default_pin: pinmux_P8_38_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
- P8_38_gpio_pin: pinmux_P8_38_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
- P8_38_gpio_pu_pin: pinmux_P8_38_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
- P8_38_gpio_pd_pin: pinmux_P8_38_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
- P8_38_gpio_input_pin: pinmux_P8_38_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3600, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
-
- /* P8_38b (ball C18) */
- P8_38_uart_pin: pinmux_P8_38_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3734, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp4_aclkx.uart8_rxd */
-
- /* P8_39 (ball F8) gpio8_6 */
- P8_39_default_pin: pinmux_P8_39_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
- P8_39_gpio_pin: pinmux_P8_39_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
- P8_39_gpio_pu_pin: pinmux_P8_39_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
- P8_39_gpio_pd_pin: pinmux_P8_39_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
- P8_39_gpio_input_pin: pinmux_P8_39_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
- P8_39_pruout_pin: pinmux_P8_39_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d6.pr2_pru0_gpo3 */
- P8_39_pruin_pin: pinmux_P8_39_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d6.pr2_pru0_gpi3 */
-
- /* P8_40 (ball E7) gpio8_7 */
- P8_40_default_pin: pinmux_P8_40_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
- P8_40_gpio_pin: pinmux_P8_40_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
- P8_40_gpio_pu_pin: pinmux_P8_40_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
- P8_40_gpio_pd_pin: pinmux_P8_40_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
- P8_40_gpio_input_pin: pinmux_P8_40_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
- P8_40_pruout_pin: pinmux_P8_40_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d7.pr2_pru0_gpo4 */
- P8_40_pruin_pin: pinmux_P8_40_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d7.pr2_pru0_gpi4 */
-
- /* P8_41 (ball E9) gpio8_4 */
- P8_41_default_pin: pinmux_P8_41_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
- P8_41_gpio_pin: pinmux_P8_41_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
- P8_41_gpio_pu_pin: pinmux_P8_41_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
- P8_41_gpio_pd_pin: pinmux_P8_41_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
- P8_41_gpio_input_pin: pinmux_P8_41_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
- P8_41_pruout_pin: pinmux_P8_41_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d4.pr2_pru0_gpo1 */
- P8_41_pruin_pin: pinmux_P8_41_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d4.pr2_pru0_gpi1 */
-
- /* P8_42 (ball F9) gpio8_5 */
- P8_42_default_pin: pinmux_P8_42_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
- P8_42_gpio_pin: pinmux_P8_42_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
- P8_42_gpio_pu_pin: pinmux_P8_42_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
- P8_42_gpio_pd_pin: pinmux_P8_42_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
- P8_42_gpio_input_pin: pinmux_P8_42_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
- P8_42_pruout_pin: pinmux_P8_42_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d5.pr2_pru0_gpo2 */
- P8_42_pruin_pin: pinmux_P8_42_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d5.pr2_pru0_gpi2 */
-
- /* P8_43 (ball F10) gpio8_2 */
- P8_43_default_pin: pinmux_P8_43_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
- P8_43_gpio_pin: pinmux_P8_43_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
- P8_43_gpio_pu_pin: pinmux_P8_43_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
- P8_43_gpio_pd_pin: pinmux_P8_43_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
- P8_43_gpio_input_pin: pinmux_P8_43_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
- P8_43_pruout_pin: pinmux_P8_43_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d2.pr2_pru1_gpo20 */
- P8_43_pruin_pin: pinmux_P8_43_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d2.pr2_pru1_gpi20 */
-
- /* P8_44 (ball G11) gpio8_3 */
- P8_44_default_pin: pinmux_P8_44_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
- P8_44_gpio_pin: pinmux_P8_44_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
- P8_44_gpio_pu_pin: pinmux_P8_44_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
- P8_44_gpio_pd_pin: pinmux_P8_44_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
- P8_44_gpio_input_pin: pinmux_P8_44_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
- P8_44_pruout_pin: pinmux_P8_44_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d3.pr2_pru0_gpo0 */
- P8_44_pruin_pin: pinmux_P8_44_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d3.pr2_pru0_gpi0 */
-
- /* P8_45a (ball F11) gpio8_0 */
- P8_45_default_pin: pinmux_P8_45_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
- P8_45_gpio_pin: pinmux_P8_45_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
- P8_45_gpio_pu_pin: pinmux_P8_45_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
- P8_45_gpio_pd_pin: pinmux_P8_45_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
- P8_45_gpio_input_pin: pinmux_P8_45_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35DC, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
-
- /* P8_45b (ball B7) gpio8_16 */
- P8_45_pruout_pin: pinmux_P8_45_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x361C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d16.pr2_pru0_gpo13 */
- P8_45_pruin_pin: pinmux_P8_45_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x361C, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d16.pr2_pru0_gpi13 */
-
- /* P8_46a (ball G10) gpio8_1 */
- P8_46_default_pin: pinmux_P8_46_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
- P8_46_gpio_pin: pinmux_P8_46_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
- P8_46_gpio_pu_pin: pinmux_P8_46_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
- P8_46_gpio_pd_pin: pinmux_P8_46_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
- P8_46_gpio_input_pin: pinmux_P8_46_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E0, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
-
- /* P8_46b (ball A10) gpio8_23 */
- P8_46_pruout_pin: pinmux_P8_46_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3638, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d23.pr2_pru0_gpo20 */
- P8_46_pruin_pin: pinmux_P8_46_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3638, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d23.pr2_pru0_gpi20 */
-
- /************************/
- /* P9 Header */
- /************************/
-
- /* P9_01 GND */
-
- /* P9_02 GND */
-
- /* P9_03 3V3 */
-
- /* P9_04 3V3 */
-
- /* P9_05 VDD_5V */
-
- /* P9_06 VDD_5V */
-
- /* P9_07 SYS_5V */
-
- /* P9_08 SYS_5V */
-
- /* P9_09 PWR_BUT */
-
- /* P9_10 RSTn */
-
- /* P9_11a (ball B19) */
- P9_11_uart_pin: pinmux_P9_11_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x372C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp3_axr0.uart5_rxd */
-
- /* P9_11b (ball B8) gpio8_17 */
- P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
- P9_11_gpio_pin: pinmux_P9_11_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
- P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
- P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
- P9_11_gpio_input_pin: pinmux_P9_11_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3620, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
-
- /* P9_12 (ball B14) gpio5_0 */
- P9_12_default_pin: pinmux_P9_12_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
- P9_12_gpio_pin: pinmux_P9_12_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
- P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
- P9_12_gpio_pd_pin: pinmux_P9_12_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
- P9_12_gpio_input_pin: pinmux_P9_12_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36AC, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
-
- /* P9_13a (ball C17) */
- P9_13_uart_pin: pinmux_P9_13_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3730, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp3_axr1.uart5_txd */
-
- /* P9_13b (ball AB10) gpio6_12 */
- P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
- P9_13_gpio_pin: pinmux_P9_13_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
- P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
- P9_13_gpio_pd_pin: pinmux_P9_13_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
- P9_13_gpio_input_pin: pinmux_P9_13_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
-
-
- /* P9_14 (ball D6) gpio4_25 */
- P9_14_default_pin: pinmux_P9_14_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
- P9_14_gpio_pin: pinmux_P9_14_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
- P9_14_gpio_pu_pin: pinmux_P9_14_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
- P9_14_gpio_pd_pin: pinmux_P9_14_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
- P9_14_gpio_input_pin: pinmux_P9_14_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35AC, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
- P9_14_pwm_pin: pinmux_P9_14_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d17.ehrpwm3A */
-
- /* P9_15 (ball AG4) gpio3_12 */
- P9_15_default_pin: pinmux_P9_15_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
- P9_15_gpio_pin: pinmux_P9_15_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
- P9_15_gpio_pu_pin: pinmux_P9_15_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
- P9_15_gpio_pd_pin: pinmux_P9_15_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
- P9_15_gpio_input_pin: pinmux_P9_15_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3514, PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
-
- /* P9_16 (ball C5) gpio4_26 */
- P9_16_default_pin: pinmux_P9_16_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d18.gpio4_26 */
- P9_16_gpio_pin: pinmux_P9_16_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
- P9_16_gpio_pu_pin: pinmux_P9_16_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
- P9_16_gpio_pd_pin: pinmux_P9_16_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
- P9_16_gpio_input_pin: pinmux_P9_16_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B0, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
- P9_16_pwm_pin: pinmux_P9_16_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d18.ehrpwm3B */
-
- /* P9_17a (ball B24) gpio7_17 */
- P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
- P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
- P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
- P9_17_gpio_pd_pin: pinmux_P9_17_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
- P9_17_gpio_input_pin: pinmux_P9_17_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37CC, PIN_INPUT | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
- P9_17_spi_cs_pin: pinmux_P9_17_spi_cs_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_cs0.spi2_cs0 */
-
- /* P9_17b (ball F12) gpio5_3 */
- P9_17_i2c_pin: pinmux_P9_17_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr1.i2c5_scl */
- P9_17_uart_pin: pinmux_P9_17_pru_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr1.uart6_txd */
-
- /* P9_18a (ball G17) gpio7_16 */
- P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
- P9_18_gpio_pin: pinmux_P9_18_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
- P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
- P9_18_gpio_pd_pin: pinmux_P9_18_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
- P9_18_gpio_input_pin: pinmux_P9_18_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C8, PIN_INPUT | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
- P9_18_spi_pin: pinmux_P9_18_spi_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_d0.spi2_d0 */
-
- /* P9_18b (ball G12) gpio5_2 */
- P9_18_i2c_pin: pinmux_P9_18_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36B4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr0.i2c5_sda */
- P9_18_uart_pin: pinmux_P9_18_pru_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36B4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr0.uart6_rxd */
-
- /* P9_19a (ball R6) gpio7_3 */
- P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio7_3 */
- P9_19_gpio_pin: pinmux_P9_19_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
- P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
- P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
- P9_19_gpio_input_pin: pinmux_P9_19_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_INPUT | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
- P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.i2c4_scl */
-
- /* P9_19b (ball F4) gpio4_6 */
- P9_19_qep_pin: pinmux_P9_19_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x357C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d5.eQEP2A_in */
-
- /* P9_20a (ball T9) gpio7_4 */
- P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio7_4 */
- P9_20_gpio_pin: pinmux_P9_20_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
- P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
- P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
- P9_20_gpio_input_pin: pinmux_P9_20_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_INPUT | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
- P9_20_i2c_pin: pinmux_P9_20_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.i2c4_sda */
-
- /* P9_20b (ball D2) gpio4_5*/
- P9_20_pruout_pin: pinmux_P9_20_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3578, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d4.pr1_pru1_gpo1 */
- P9_20_pruin_pin: pinmux_P9_20_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3578, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d4.pr1_pru1_gpi1 */
-
- /* P9_21a (ball AF8) gpio3_3 */
- P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
- P9_21_gpio_pin: pinmux_P9_21_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
- P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
- P9_21_gpio_pd_pin: pinmux_P9_21_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
- P9_21_gpio_input_pin: pinmux_P9_21_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34F0, PIN_INPUT | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
- P9_21_qep_pin: pinmux_P9_21_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_vsync0.eQEP1_strobe */
-
- /* P9_21b (ball B22) gpio7_15 */
- P9_21_spi_pin: pinmux_P9_21_spi_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_d1.spi2_d1 */
- P9_21_uart_pin: pinmux_P9_21_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi2_d1.uart3_txd */
-
- /* P9_22a (ball B26) gpio6_19 */
- P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
- P9_22_gpio_pin: pinmux_P9_22_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
- P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
- P9_22_gpio_pd_pin: pinmux_P9_22_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
- P9_22_gpio_input_pin: pinmux_P9_22_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x369C, PIN_INPUT | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
-
- /* P9_22b (ball A26) gpio7_14 */
- P9_22_spi_sclk_pin: pinmux_P9_22_spi_sclk_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_sclk.spi2_sclk */
- P9_22_uart_pin: pinmux_P9_22_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi2_sclk.uart3_rxd */
-
- /* P9_23 (ball A22) gpio7_11 */
- P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
- P9_23_gpio_pin: pinmux_P9_23_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
- P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
- P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
- P9_23_gpio_input_pin: pinmux_P9_23_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37B4, PIN_INPUT | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
-
- /* P9_24 (ball F20) gpio6_15*/
- P9_24_default_pin: pinmux_P9_24_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
- P9_24_gpio_pin: pinmux_P9_24_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
- P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
- P9_24_gpio_pd_pin: pinmux_P9_24_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
- P9_24_gpio_input_pin: pinmux_P9_24_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_INPUT | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
- P9_24_uart_pin: pinmux_P9_24_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* gpio6_15.uart10_txd */
- P9_24_can_pin: pinmux_P9_24_can_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* gpio6_15.dcan2_rx */
- P9_24_i2c_pin: pinmux_P9_24_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) >; }; /* gpio6_15.i2c3_scl */
-
- /* P9_25 (ball D18) gpio6_17 */
- P9_25_default_pin: pinmux_P9_25_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
- P9_25_gpio_pin: pinmux_P9_25_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
- P9_25_gpio_pu_pin: pinmux_P9_25_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
- P9_25_gpio_pd_pin: pinmux_P9_25_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
- P9_25_gpio_input_pin: pinmux_P9_25_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
- P9_25_pruout_pin: pinmux_P9_25_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* xref_clk0.pr2_pru1_gpo5 */
- P9_25_pruin_pin: pinmux_P9_25_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE12) >; }; /* xref_clk0.pr2_pru1_gpi5 */
-
- /* P9_26a (ball E21) gpio6_14 */
- P9_26_default_pin: pinmux_P9_26_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
- P9_26_gpio_pin: pinmux_P9_26_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
- P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
- P9_26_gpio_pd_pin: pinmux_P9_26_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
- P9_26_gpio_input_pin: pinmux_P9_26_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_INPUT | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
- P9_26_uart_pin: pinmux_P9_26_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* gpio6_14.uart10_rxd */
- P9_26_can_pin: pinmux_P9_26_can_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* gpio6_14.dcan2_tx */
- P9_26_i2c_pin: pinmux_P9_26_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) >; }; /* gpio6_14.i2c3_sda */
-
- /* P9_26b (ball AE2) gpio3_24 */
- P9_26_pruout_pin: pinmux_P9_26_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3544, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d20.pr1_pru0_gpo17*/
- P9_26_pruin_pin: pinmux_P9_26_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3544, PIN_INPUT | MUX_MODE12) >; }; /* vin1a_d20.pr1_pru0_gpi17*/
-
- /* P9_27a (ball C3) gpio4_15 */
- P9_27_default_pin: pinmux_P9_27_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
- P9_27_gpio_pin: pinmux_P9_27_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
- P9_27_gpio_pu_pin: pinmux_P9_27_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
- P9_27_gpio_pd_pin: pinmux_P9_27_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
- P9_27_gpio_input_pin: pinmux_P9_27_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
- P9_27_qep_pin: pinmux_P9_27_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d14.eQEP3B_in */
- P9_27_pruout_pin: pinmux_P9_27_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d14.pr1_pru1_gpo11 */
- P9_27_pruin_pin: pinmux_P9_27_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d14.pr1_pru1_gpi11 */
-
- /* P9_27b (ball J14) gpio5_1 */
-
-
- /* P9_28 (ball A12) gpio4_17 */
- P9_28_default_pin: pinmux_P9_28_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
- P9_28_gpio_pin: pinmux_P9_28_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
- P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
- P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
- P9_28_gpio_input_pin: pinmux_P9_28_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
- P9_28_spi_cs_pin: pinmux_P9_28_spi_cs_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr11.spi3_cs0 */
- P9_28_pruout_pin: pinmux_P9_28_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr11.pr2_pru1_gpo13 */
- P9_28_pruin_pin: pinmux_P9_28_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr11.pr2_pru1_gpi13 */
-
- /* P9_29a (ball A11) gpio5_11*/
- P9_29_default_pin: pinmux_P9_29_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
- P9_29_gpio_pin: pinmux_P9_29_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
- P9_29_gpio_pu_pin: pinmux_P9_29_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
- P9_29_gpio_pd_pin: pinmux_P9_29_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
- P9_29_gpio_input_pin: pinmux_P9_29_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
- P9_29_spi_pin: pinmux_P9_29_spi_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr9.spi3_d1 */
- P9_29_pruout_pin: pinmux_P9_29_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr9.pr2_pru1_gpo11 */
- P9_29_pruin_pin: pinmux_P9_29_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr9.pr2_pru1_gpi11 */
-
- /* P9_29b (ball D14) gpio7_30 */
-
-
- /* P9_30 (ball B13) gpio5_12*/
- P9_30_default_pin: pinmux_P9_30_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
- P9_30_gpio_pin: pinmux_P9_30_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
- P9_30_gpio_pu_pin: pinmux_P9_30_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
- P9_30_gpio_pd_pin: pinmux_P9_30_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
- P9_30_gpio_input_pin: pinmux_P9_30_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
- P9_30_spi_pin: pinmux_P9_30_spi_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr10.spi3_d0 */
- P9_30_pruout_pin: pinmux_P9_30_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr10.pr2_pru1_gpo12 */
- P9_30_pruin_pin: pinmux_P9_30_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr10.pr2_pru1_gpi12 */
-
- /* P9_31a (ball B12) gpio5_10 */
- P9_31_default_pin: pinmux_P9_31_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
- P9_31_gpio_pin: pinmux_P9_31_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
- P9_31_gpio_pu_pin: pinmux_P9_31_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
- P9_31_gpio_pd_pin: pinmux_P9_31_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
- P9_31_gpio_input_pin: pinmux_P9_31_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
- P9_31_spi_sclk_pin: pinmux_P9_31_spi_sclk_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr8.spi3_sclk */
- P9_31_pruout_pin: pinmux_P9_31_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr8.pr2_pru1_gpo10 */
- P9_31_pruin_pin: pinmux_P9_31_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr8.pr2_pru1_gpi10 */
-
- /* P9_31b (ball C14) gpio7_31*/
-
- /* P9_32 VADC */
-
- /* P9_33 AIN4*/
-
- /* P9_34 AGND */
-
- /* P9_35 AIN6 */
-
- /* P9_36 AIN5 */
-
- /* P9_37 AIN2 */
-
- /* P9_38 AIN3*/
-
- /* P9_39 AIN0*/
-
- /* P9_40 AIN1*/
-
- /* P9_41a (ball C23) gpio6_20 */
- P9_41_default_pin: pinmux_P9_41_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
- P9_41_gpio_pin: pinmux_P9_41_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
- P9_41_gpio_pu_pin: pinmux_P9_41_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
- P9_41_gpio_pd_pin: pinmux_P9_41_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
- P9_41_gpio_input_pin: pinmux_P9_41_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36A0, PIN_INPUT | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
-
- /* P9_41b (ball C1) gpio4_7 */
- P9_41_pruout_pin: pinmux_P9_41_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3580, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d6.pr1_pru1_gpo3 */
- P9_41_pruin_pin: pinmux_P9_41_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3580, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d6.pr1_pru1_gpi3 */
-
- /* P9_42a (ball E14) gpio4_18 */
- P9_42_default_pin: pinmux_P9_42_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
- P9_42_gpio_pin: pinmux_P9_42_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
- P9_42_gpio_pu_pin: pinmux_P9_42_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
- P9_42_gpio_pd_pin: pinmux_P9_42_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
- P9_42_gpio_input_pin: pinmux_P9_42_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
- P9_42_spi_cs_pin: pinmux_P9_42_spi_cs_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr12.spi3_cs1 */
-
- /* P9_42b (ball C2) gpio4_14*/
- P9_42_pruout_pin: pinmux_P9_42_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x359C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d13.pr1_pru1_gpo10 */
- P9_42_pruin_pin: pinmux_P9_42_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x359C, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d13.pr1_pru1_gpi10 */
-
- /* P9_43 GND */
-
- /* P9_44 GND */
-
- /* P9_45 GND */
-
- /* P9_46 GND */
-
extcon_usb1_pins_default: extcon_usb1_pins_default {
pinctrl-single,pins = <
DRA7XX_CORE_IOPAD(0x3518, PIN_INPUT | MUX_MODE14) /* AG2: vin1a_d9.gpio3_13 - USR0 */
--
GitLab
From fcdd6842bf2696f1abb66c7682f90f87397b3d83 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Sat, 20 Jun 2020 09:43:42 +0530
Subject: [PATCH 06/86] add bone-pinmux-helper nodes
---
src/arm/am572x-bone-common-univ.dtsi | 2505 ++++++++++++++++++++++++++
1 file changed, 2505 insertions(+)
create mode 100644 src/arm/am572x-bone-common-univ.dtsi
diff --git a/src/arm/am572x-bone-common-univ.dtsi b/src/arm/am572x-bone-common-univ.dtsi
new file mode 100644
index 00000000..144e3f07
--- /dev/null
+++ b/src/arm/am572x-bone-common-univ.dtsi
@@ -0,0 +1,2505 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&dra7_pmx_core {
+ /************************/
+ /* P8 Header */
+ /************************/
+
+ /* P8_01 GND */
+
+ /* P8_02 GND */
+
+
+ /* P8_03 (ball AB8) gpio1_24 */
+ P8_03_default_pin: pinmux_P8_03_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03_gpio_pin: pinmux_P8_03_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03_gpio_pu_pin: pinmux_P8_03_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03_gpio_pd_pin: pinmux_P8_03_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03_gpio_input_pin: pinmux_P8_03_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x379C, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
+
+ /* P8_04 (ball AB5) gpio1_25 */
+ P8_04_default_pin: pinmux_P8_04_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04_gpio_pin: pinmux_P8_04_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04_gpio_pu_pin: pinmux_P8_04_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04_gpio_pd_pin: pinmux_P8_04_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04_gpio_input_pin: pinmux_P8_04_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37A0, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
+
+ /* P8_05 (ball AC9) gpio7_1 */
+ P8_05_default_pin: pinmux_P8_05_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05_gpio_pin: pinmux_P8_05_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05_gpio_pu_pin: pinmux_P8_05_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05_gpio_pd_pin: pinmux_P8_05_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05_gpio_input_pin: pinmux_P8_05_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x378C, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
+
+ /* P8_06 (ball AC3) gpio7_2 */
+ P8_06_default_pin: pinmux_P8_06_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06_gpio_pin: pinmux_P8_06_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06_gpio_pu_pin: pinmux_P8_06_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06_gpio_pd_pin: pinmux_P8_06_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06_gpio_input_pin: pinmux_P8_06_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3790, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
+
+ /* P8_07 (ball G14) gpio6_5*/
+ P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07_gpio_pin: pinmux_P8_07_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07_gpio_pd_pin: pinmux_P8_07_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07_gpio_input_pin: pinmux_P8_07_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36EC, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07_timer_pin: pinmux_P8_07_timer_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr14.timer11 */
+
+ /* P8_08 (ball F14) gpio6_6 */
+ P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08_gpio_pin: pinmux_P8_08_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08_gpio_input_pin: pinmux_P8_08_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36F0, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08_timer_pin: pinmux_P8_08_timer_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr15.timer12 */
+
+ /* P8_09 (ball E17) gpio6_18 */
+ P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
+ P8_09_gpio_pin: pinmux_P8_09_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
+ P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
+ P8_09_gpio_pd_pin: pinmux_P8_09_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
+ P8_09_gpio_input_pin: pinmux_P8_09_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3698, PIN_INPUT | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
+ P8_09_timer_pin: pinmux_P8_09_timer_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* xref_clk1.timer14 */
+
+ /* P8_10 (ball A13) gpio6_4 */
+ P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10_gpio_pin: pinmux_P8_10_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10_gpio_pd_pin: pinmux_P8_10_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10_gpio_input_pin: pinmux_P8_10_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E8, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10_timer_pin: pinmux_P8_10_timer_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr13.timer10 */
+
+ /* P8_11 (ball AH4) gpio3_11 */
+ P8_11_default_pin: pinmux_P8_11_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
+ P8_11_gpio_pin: pinmux_P8_11_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
+ P8_11_gpio_pu_pin: pinmux_P8_11_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
+ P8_11_gpio_pd_pin: pinmux_P8_11_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
+ P8_11_gpio_input_pin: pinmux_P8_11_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3510, PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
+ P8_11_qep_pin: pinmux_P8_11_qep_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_d7.eQEP2B_in */
+ P8_11_pruout_pin: pinmux_P8_11_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d7.pr1_pru0_gpo4 */
+
+ /* P8_12 (ball AG6) gpio3_10 */
+ P8_12_default_pin: pinmux_P8_12_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
+ P8_12_gpio_pin: pinmux_P8_12_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
+ P8_12_gpio_pu_pin: pinmux_P8_12_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
+ P8_12_gpio_pd_pin: pinmux_P8_12_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
+ P8_12_gpio_input_pin: pinmux_P8_12_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x350C, PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
+ P8_12_qep_pin: pinmux_P8_12_qep_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_d6.eQEP2A_in */
+ P8_12_pruout_pin: pinmux_P8_12_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d6.pr1_pru0_gpo3 */
+
+ /* P8_13 (ball D3) gpio4_11 */
+ P8_13_default_pin: pinmux_P8_13_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
+ P8_13_gpio_pin: pinmux_P8_13_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
+ P8_13_gpio_pu_pin: pinmux_P8_13_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
+ P8_13_gpio_pd_pin: pinmux_P8_13_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
+ P8_13_gpio_input_pin: pinmux_P8_13_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
+ P8_13_pwm_pin: pinmux_P8_13_pwm_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d10.ehrpwm2B */
+
+ /* P8_14 (ball D5) gpio4_13*/
+ P8_14_default_pin: pinmux_P8_14_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
+ P8_14_gpio_pin: pinmux_P8_14_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
+ P8_14_gpio_pu_pin: pinmux_P8_14_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
+ P8_14_gpio_pd_pin: pinmux_P8_14_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
+ P8_14_gpio_input_pin: pinmux_P8_14_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
+ P8_14_pwm_pin: pinmux_P8_14_pwm_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d12.eCAP2_in_PWM2_out */
+
+ /* P8_15a (ball D1) gpio4_3*/
+ P8_15_default_pin: pinmux_P8_15_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
+ P8_15_gpio_pin: pinmux_P8_15_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
+ P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
+ P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
+ P8_15_gpio_input_pin: pinmux_P8_15_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3570, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
+ P8_15_pru_ecap_pin: pinmux_P8_15_pru_ecap_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE11) >; }; /* vin2a_d2.pr1_ecap0_ecap_capin_apwm_o */
+
+ /* P8_15b (ball A3) gpio4_27 */
+ P8_15_pruin_pin: pinmux_P8_15_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35B4, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d19.pr1_pru1_gpi16*/
+
+ /* P8_16 (ball B4) gpio4_29 */
+ P8_16_default_pin: pinmux_P8_16_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
+ P8_16_gpio_pin: pinmux_P8_16_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
+ P8_16_gpio_pu_pin: pinmux_P8_16_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
+ P8_16_gpio_pd_pin: pinmux_P8_16_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
+ P8_16_gpio_input_pin: pinmux_P8_16_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35BC, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
+ P8_16_pruin_pin: pinmux_P8_16_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35BC, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d21.pr1_pru1_gpi18 */
+
+ /* P8_17 (ball A7) gpio8_18 */
+ P8_17_default_pin: pinmux_P8_17_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
+ P8_17_gpio_pin: pinmux_P8_17_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
+ P8_17_gpio_pu_pin: pinmux_P8_17_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
+ P8_17_gpio_pd_pin: pinmux_P8_17_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
+ P8_17_gpio_input_pin: pinmux_P8_17_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3624, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
+
+ /* P8_18 (ball F5) gpio4_9 */
+ P8_18_default_pin: pinmux_P8_18_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
+ P8_18_gpio_pin: pinmux_P8_18_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
+ P8_18_gpio_pu_pin: pinmux_P8_18_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
+ P8_18_gpio_pd_pin: pinmux_P8_18_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
+ P8_18_gpio_input_pin: pinmux_P8_18_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3588, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
+ P8_18_qep_pin: pinmux_P8_18_qep_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d8.eQEP2_strobe */
+
+ /* P8_19 (ball E6) gpio4_10 */
+ P8_19_default_pin: pinmux_P8_19_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
+ P8_19_gpio_pin: pinmux_P8_19_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
+ P8_19_gpio_pu_pin: pinmux_P8_19_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
+ P8_19_gpio_pd_pin: pinmux_P8_19_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
+ P8_19_gpio_input_pin: pinmux_P8_19_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x358C, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
+ P8_19_pwm_pin: pinmux_P8_19_pwm_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d9.ehrpwm2A */
+
+ /* P8_20 (ball AC4) gpio6_30 */
+ P8_20_default_pin: pinmux_P8_20_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20_gpio_pin: pinmux_P8_20_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20_gpio_pu_pin: pinmux_P8_20_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20_gpio_pd_pin: pinmux_P8_20_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20_gpio_input_pin: pinmux_P8_20_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3780, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20_pruout_pin: pinmux_P8_20_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_cmd.pr2_pru0_gpo3 */
+ P8_20_pruin_pin: pinmux_P8_20_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3780, PIN_INPUT | MUX_MODE12) >; }; /* mmc3_cmd.pr2_pru0_gpi3 */
+
+ /* P8_21 (ball AD4) gpio6_29 */
+ P8_21_default_pin: pinmux_P8_21_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
+ P8_21_gpio_pin: pinmux_P8_21_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
+ P8_21_gpio_pu_pin: pinmux_P8_21_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
+ P8_21_gpio_pd_pin: pinmux_P8_21_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
+ P8_21_gpio_input_pin: pinmux_P8_21_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x377C, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
+ P8_21_pruout_pin: pinmux_P8_21_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_clk.pr2_pru0_gpo2 */
+ P8_21_pruin_pin: pinmux_P8_21_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x377C, PIN_INPUT | MUX_MODE12) >; }; /* mmc3_clk.pr2_pru0_gpi2 */
+
+ /* P8_22 (ball AD6) gpio1_23 */
+ P8_22_default_pin: pinmux_P8_22_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22_gpio_pin: pinmux_P8_22_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22_gpio_pu_pin: pinmux_P8_22_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22_gpio_pd_pin: pinmux_P8_22_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22_gpio_input_pin: pinmux_P8_22_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3798, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
+
+ /* P8_23 (ball AC8) gpio1_22 */
+ P8_23_default_pin: pinmux_P8_23_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23_gpio_pin: pinmux_P8_23_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23_gpio_pu_pin: pinmux_P8_23_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23_gpio_pd_pin: pinmux_P8_23_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23_gpio_input_pin: pinmux_P8_23_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3794, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
+
+ /* P8_24 (ball AC6) gpio7_0 */
+ P8_24_default_pin: pinmux_P8_24_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24_gpio_pin: pinmux_P8_24_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24_gpio_pu_pin: pinmux_P8_24_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24_gpio_pd_pin: pinmux_P8_24_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24_gpio_input_pin: pinmux_P8_24_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3788, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
+
+ /* P8_25 (ball AC7) gpio6_31 */
+ P8_25_default_pin: pinmux_P8_25_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25_gpio_pin: pinmux_P8_25_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25_gpio_pu_pin: pinmux_P8_25_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25_gpio_pd_pin: pinmux_P8_25_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25_gpio_input_pin: pinmux_P8_25_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3784, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
+
+ /* P8_26 (ball B3) gpio4_28 */
+ P8_26_default_pin: pinmux_P8_26_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
+ P8_26_gpio_pin: pinmux_P8_26_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
+ P8_26_gpio_pu_pin: pinmux_P8_26_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
+ P8_26_gpio_pd_pin: pinmux_P8_26_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
+ P8_26_gpio_input_pin: pinmux_P8_26_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35B8, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
+
+ /* P8_27a (ball E11) gpio4_23 */
+ P8_27_default_pin: pinmux_P8_27_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
+ P8_27_gpio_pin: pinmux_P8_27_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
+ P8_27_gpio_pu_pin: pinmux_P8_27_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
+ P8_27_gpio_pd_pin: pinmux_P8_27_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
+ P8_27_gpio_input_pin: pinmux_P8_27_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35D8, PIN_INPUT | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
+
+ /* P8_27b (ball A8) gpio8_19 */
+ P8_27_pruout_pin: pinmux_P8_27_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3628, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d19.pr2_pru0_gpo16 */
+ P8_27_pruin_pin: pinmux_P8_27_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3628, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d19.pr2_pru0_gpi16 */
+
+ /* P8_28a (ball D11) gpio4_19 */
+ P8_28_default_pin: pinmux_P8_28_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
+ P8_28_gpio_pin: pinmux_P8_28_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
+ P8_28_gpio_pu_pin: pinmux_P8_28_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
+ P8_28_gpio_pd_pin: pinmux_P8_28_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
+ P8_28_gpio_input_pin: pinmux_P8_28_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35C8, PIN_INPUT | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
+
+ /* P8_28b (ball C9) gpio8_20 */
+ P8_28_pruout_pin: pinmux_P8_28_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x362C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d20.pr2_pru0_gpo17 */
+ P8_28_pruin_pin: pinmux_P8_28_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x362C, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d20.pr2_pru0_gpi17 */
+
+ /* P8_29a (ball C11) gpio4_22 */
+ P8_29_default_pin: pinmux_P8_29_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
+ P8_29_gpio_pin: pinmux_P8_29_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
+ P8_29_gpio_pu_pin: pinmux_P8_29_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
+ P8_29_gpio_pd_pin: pinmux_P8_29_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
+ P8_29_gpio_input_pin: pinmux_P8_29_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35D4, PIN_INPUT | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
+
+ /* P8_29b (ball A9) gpio8_21 */
+ P8_29_pruout_pin: pinmux_P8_29_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3630, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d21.pr2_pru0_gpo18 */
+ P8_29_pruin_pin: pinmux_P8_29_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3630, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d21.pr2_pru0_gpi18 */
+
+ /* P8_30a (ball B10) gpio4_20 */
+ P8_30_default_pin: pinmux_P8_30_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
+ P8_30_gpio_pin: pinmux_P8_30_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
+ P8_30_gpio_pu_pin: pinmux_P8_30_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
+ P8_30_gpio_pd_pin: pinmux_P8_30_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
+ P8_30_gpio_input_pin: pinmux_P8_30_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35CC, PIN_INPUT | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
+
+ /* P8_30b (ball B9) gpio8_22 */
+ P8_30_pruout_pin: pinmux_P8_30_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3634, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d22.pr2_pru0_gpo19 */
+ P8_30_pruin_pin: pinmux_P8_30_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3634, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d22.pr2_pru0_gpi19 */
+
+
+ /* P8_31a (ball C8) gpio8_14 */
+ P8_31_default_pin: pinmux_P8_31_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
+ P8_31_gpio_pin: pinmux_P8_31_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
+ P8_31_gpio_pu_pin: pinmux_P8_31_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
+ P8_31_gpio_pd_pin: pinmux_P8_31_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
+ P8_31_gpio_input_pin: pinmux_P8_31_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3614, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
+
+ /* P8_31b (ball G16) */
+ P8_31_uart_pin: pinmux_P8_31_uart_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x373C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp4_axr0.uart4_rxd */
+
+ /* P8_32a (ball C7) gpio8_15 */
+ P8_32_default_pin: pinmux_P8_32_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
+ P8_32_gpio_pin: pinmux_P8_32_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
+ P8_32_gpio_pu_pin: pinmux_P8_32_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
+ P8_32_gpio_pd_pin: pinmux_P8_32_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
+ P8_32_gpio_input_pin: pinmux_P8_32_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3618, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
+
+ /* P8_32b (ball D17) */
+ P8_32_uart_pin: pinmux_P8_32_uart_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3740, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp4_axr1.uart4_txd */
+
+ /* P8_33a (ball C6) gpio8_13 */
+ P8_33_default_pin: pinmux_P8_33_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
+ P8_33_gpio_pin: pinmux_P8_33_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
+ P8_33_gpio_pu_pin: pinmux_P8_33_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
+ P8_33_gpio_pd_pin: pinmux_P8_33_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
+ P8_33_gpio_input_pin: pinmux_P8_33_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3610, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
+
+ /* P8_33b (ball AF9) gpio3_1 */
+ P8_33_qep_pin: pinmux_P8_33_qep_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x34E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_fld0.eQEP1B_in */
+
+
+ /* P8_34a (ball D8) gpio8_11 */
+ P8_34_default_pin: pinmux_P8_34_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
+ P8_34_gpio_pin: pinmux_P8_34_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
+ P8_34_gpio_pu_pin: pinmux_P8_34_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
+ P8_34_gpio_pd_pin: pinmux_P8_34_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
+ P8_34_gpio_input_pin: pinmux_P8_34_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3608, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
+
+ /* P8_34b (ball G6) gpio4_0 */
+ P8_34_pwm_pin: pinmux_P8_34_pwm_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3564, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_vsync0.ehrpwm1A */
+
+ /* P8_35a (ball A5) gpio8_12 */
+ P8_35_default_pin: pinmux_P8_35_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
+ P8_35_gpio_pin: pinmux_P8_35_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
+ P8_35_gpio_pu_pin: pinmux_P8_35_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
+ P8_35_gpio_pd_pin: pinmux_P8_35_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
+ P8_35_gpio_input_pin: pinmux_P8_35_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x360C, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
+
+ /* P8_35b (ball AD9) gpio3_0 */
+ P8_35_qep_pin: pinmux_P8_35_qep_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x34E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_de0.eQEP1A_in */
+
+ /* P8_36a (ball D7) gpio8_10 */
+ P8_36_default_pin: pinmux_P8_36_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
+ P8_36_gpio_pin: pinmux_P8_36_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
+ P8_36_gpio_pu_pin: pinmux_P8_36_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
+ P8_36_gpio_pd_pin: pinmux_P8_36_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
+ P8_36_gpio_input_pin: pinmux_P8_36_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3604, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
+
+ /* P8_36b (ball F2) gpio4_1 */
+ P8_36_pwm_pin: pinmux_P8_36_pwm_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3568, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d0.ehrpwm1B */
+
+ /* P8_37a (ball E8) gpio8_8 */
+ P8_37_default_pin: pinmux_P8_37_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
+ P8_37_gpio_pin: pinmux_P8_37_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
+ P8_37_gpio_pu_pin: pinmux_P8_37_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
+ P8_37_gpio_pd_pin: pinmux_P8_37_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
+ P8_37_gpio_input_pin: pinmux_P8_37_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35FC, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
+
+ /* P8_37b (ball A21) */
+ P8_37_uart_pin: pinmux_P8_37_uart_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3738, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp4_fsx.uart8_txd */
+
+ /* P8_38a (ball D9) gpio8_9 */
+ P8_38_default_pin: pinmux_P8_38_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
+ P8_38_gpio_pin: pinmux_P8_38_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
+ P8_38_gpio_pu_pin: pinmux_P8_38_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
+ P8_38_gpio_pd_pin: pinmux_P8_38_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
+ P8_38_gpio_input_pin: pinmux_P8_38_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3600, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
+
+ /* P8_38b (ball C18) */
+ P8_38_uart_pin: pinmux_P8_38_uart_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3734, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp4_aclkx.uart8_rxd */
+
+ /* P8_39 (ball F8) gpio8_6 */
+ P8_39_default_pin: pinmux_P8_39_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
+ P8_39_gpio_pin: pinmux_P8_39_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
+ P8_39_gpio_pu_pin: pinmux_P8_39_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
+ P8_39_gpio_pd_pin: pinmux_P8_39_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
+ P8_39_gpio_input_pin: pinmux_P8_39_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F4, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
+ P8_39_pruout_pin: pinmux_P8_39_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d6.pr2_pru0_gpo3 */
+ P8_39_pruin_pin: pinmux_P8_39_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F4, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d6.pr2_pru0_gpi3 */
+
+ /* P8_40 (ball E7) gpio8_7 */
+ P8_40_default_pin: pinmux_P8_40_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
+ P8_40_gpio_pin: pinmux_P8_40_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
+ P8_40_gpio_pu_pin: pinmux_P8_40_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
+ P8_40_gpio_pd_pin: pinmux_P8_40_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
+ P8_40_gpio_input_pin: pinmux_P8_40_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F8, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
+ P8_40_pruout_pin: pinmux_P8_40_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d7.pr2_pru0_gpo4 */
+ P8_40_pruin_pin: pinmux_P8_40_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F8, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d7.pr2_pru0_gpi4 */
+
+ /* P8_41 (ball E9) gpio8_4 */
+ P8_41_default_pin: pinmux_P8_41_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
+ P8_41_gpio_pin: pinmux_P8_41_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
+ P8_41_gpio_pu_pin: pinmux_P8_41_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
+ P8_41_gpio_pd_pin: pinmux_P8_41_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
+ P8_41_gpio_input_pin: pinmux_P8_41_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35EC, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
+ P8_41_pruout_pin: pinmux_P8_41_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d4.pr2_pru0_gpo1 */
+ P8_41_pruin_pin: pinmux_P8_41_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35EC, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d4.pr2_pru0_gpi1 */
+
+ /* P8_42 (ball F9) gpio8_5 */
+ P8_42_default_pin: pinmux_P8_42_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
+ P8_42_gpio_pin: pinmux_P8_42_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
+ P8_42_gpio_pu_pin: pinmux_P8_42_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
+ P8_42_gpio_pd_pin: pinmux_P8_42_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
+ P8_42_gpio_input_pin: pinmux_P8_42_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F0, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
+ P8_42_pruout_pin: pinmux_P8_42_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d5.pr2_pru0_gpo2 */
+ P8_42_pruin_pin: pinmux_P8_42_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35F0, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d5.pr2_pru0_gpi2 */
+
+ /* P8_43 (ball F10) gpio8_2 */
+ P8_43_default_pin: pinmux_P8_43_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
+ P8_43_gpio_pin: pinmux_P8_43_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
+ P8_43_gpio_pu_pin: pinmux_P8_43_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
+ P8_43_gpio_pd_pin: pinmux_P8_43_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
+ P8_43_gpio_input_pin: pinmux_P8_43_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35E4, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
+ P8_43_pruout_pin: pinmux_P8_43_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d2.pr2_pru1_gpo20 */
+ P8_43_pruin_pin: pinmux_P8_43_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35E4, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d2.pr2_pru1_gpi20 */
+
+ /* P8_44 (ball G11) gpio8_3 */
+ P8_44_default_pin: pinmux_P8_44_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
+ P8_44_gpio_pin: pinmux_P8_44_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
+ P8_44_gpio_pu_pin: pinmux_P8_44_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
+ P8_44_gpio_pd_pin: pinmux_P8_44_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
+ P8_44_gpio_input_pin: pinmux_P8_44_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35E8, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
+ P8_44_pruout_pin: pinmux_P8_44_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d3.pr2_pru0_gpo0 */
+ P8_44_pruin_pin: pinmux_P8_44_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35E8, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d3.pr2_pru0_gpi0 */
+
+ /* P8_45a (ball F11) gpio8_0 */
+ P8_45_default_pin: pinmux_P8_45_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
+ P8_45_gpio_pin: pinmux_P8_45_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
+ P8_45_gpio_pu_pin: pinmux_P8_45_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
+ P8_45_gpio_pd_pin: pinmux_P8_45_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
+ P8_45_gpio_input_pin: pinmux_P8_45_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35DC, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
+
+ /* P8_45b (ball B7) gpio8_16 */
+ P8_45_pruout_pin: pinmux_P8_45_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x361C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d16.pr2_pru0_gpo13 */
+ P8_45_pruin_pin: pinmux_P8_45_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x361C, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d16.pr2_pru0_gpi13 */
+
+ /* P8_46a (ball G10) gpio8_1 */
+ P8_46_default_pin: pinmux_P8_46_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
+ P8_46_gpio_pin: pinmux_P8_46_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
+ P8_46_gpio_pu_pin: pinmux_P8_46_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
+ P8_46_gpio_pd_pin: pinmux_P8_46_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
+ P8_46_gpio_input_pin: pinmux_P8_46_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35E0, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
+
+ /* P8_46b (ball A10) gpio8_23 */
+ P8_46_pruout_pin: pinmux_P8_46_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3638, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d23.pr2_pru0_gpo20 */
+ P8_46_pruin_pin: pinmux_P8_46_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3638, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d23.pr2_pru0_gpi20 */
+
+ /************************/
+ /* P9 Header */
+ /************************/
+
+ /* P9_01 GND */
+
+ /* P9_02 GND */
+
+ /* P9_03 3V3 */
+
+ /* P9_04 3V3 */
+
+ /* P9_05 VDD_5V */
+
+ /* P9_06 VDD_5V */
+
+ /* P9_07 SYS_5V */
+
+ /* P9_08 SYS_5V */
+
+ /* P9_09 PWR_BUT */
+
+ /* P9_10 RSTn */
+
+ /* P9_11a (ball B19) */
+ P9_11_uart_pin: pinmux_P9_11_uart_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x372C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp3_axr0.uart5_rxd */
+
+ /* P9_11b (ball B8) gpio8_17 */
+ P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
+ P9_11_gpio_pin: pinmux_P9_11_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
+ P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
+ P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
+ P9_11_gpio_input_pin: pinmux_P9_11_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3620, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
+
+ /* P9_12 (ball B14) gpio5_0 */
+ P9_12_default_pin: pinmux_P9_12_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
+ P9_12_gpio_pin: pinmux_P9_12_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
+ P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
+ P9_12_gpio_pd_pin: pinmux_P9_12_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
+ P9_12_gpio_input_pin: pinmux_P9_12_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36AC, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
+
+ /* P9_13a (ball C17) */
+ P9_13_uart_pin: pinmux_P9_13_uart_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3730, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp3_axr1.uart5_txd */
+
+ /* P9_13b (ball AB10) gpio6_12 */
+ P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
+ P9_13_gpio_pin: pinmux_P9_13_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
+ P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
+ P9_13_gpio_pd_pin: pinmux_P9_13_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
+ P9_13_gpio_input_pin: pinmux_P9_13_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
+
+
+ /* P9_14 (ball D6) gpio4_25 */
+ P9_14_default_pin: pinmux_P9_14_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
+ P9_14_gpio_pin: pinmux_P9_14_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
+ P9_14_gpio_pu_pin: pinmux_P9_14_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
+ P9_14_gpio_pd_pin: pinmux_P9_14_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
+ P9_14_gpio_input_pin: pinmux_P9_14_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35AC, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
+ P9_14_pwm_pin: pinmux_P9_14_pwm_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d17.ehrpwm3A */
+
+ /* P9_15 (ball AG4) gpio3_12 */
+ P9_15_default_pin: pinmux_P9_15_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
+ P9_15_gpio_pin: pinmux_P9_15_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
+ P9_15_gpio_pu_pin: pinmux_P9_15_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
+ P9_15_gpio_pd_pin: pinmux_P9_15_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
+ P9_15_gpio_input_pin: pinmux_P9_15_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3514, PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
+
+ /* P9_16 (ball C5) gpio4_26 */
+ P9_16_default_pin: pinmux_P9_16_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d18.gpio4_26 */
+ P9_16_gpio_pin: pinmux_P9_16_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
+ P9_16_gpio_pu_pin: pinmux_P9_16_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
+ P9_16_gpio_pd_pin: pinmux_P9_16_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
+ P9_16_gpio_input_pin: pinmux_P9_16_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35B0, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
+ P9_16_pwm_pin: pinmux_P9_16_pwm_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d18.ehrpwm3B */
+
+ /* P9_17a (ball B24) gpio7_17 */
+ P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17_gpio_pd_pin: pinmux_P9_17_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17_gpio_input_pin: pinmux_P9_17_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37CC, PIN_INPUT | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17_spi_cs_pin: pinmux_P9_17_spi_cs_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_cs0.spi2_cs0 */
+
+ /* P9_17b (ball F12) gpio5_3 */
+ P9_17_i2c_pin: pinmux_P9_17_i2c_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr1.i2c5_scl */
+ P9_17_uart_pin: pinmux_P9_17_pru_uart_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr1.uart6_txd */
+
+ /* P9_18a (ball G17) gpio7_16 */
+ P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
+ P9_18_gpio_pin: pinmux_P9_18_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
+ P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
+ P9_18_gpio_pd_pin: pinmux_P9_18_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
+ P9_18_gpio_input_pin: pinmux_P9_18_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37C8, PIN_INPUT | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
+ P9_18_spi_pin: pinmux_P9_18_spi_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_d0.spi2_d0 */
+
+ /* P9_18b (ball G12) gpio5_2 */
+ P9_18_i2c_pin: pinmux_P9_18_i2c_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36B4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr0.i2c5_sda */
+ P9_18_uart_pin: pinmux_P9_18_pru_uart_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36B4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr0.uart6_rxd */
+
+ /* P9_19a (ball R6) gpio7_3 */
+ P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio7_3 */
+ P9_19_gpio_pin: pinmux_P9_19_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
+ P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
+ P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
+ P9_19_gpio_input_pin: pinmux_P9_19_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3440, PIN_INPUT | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
+ P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.i2c4_scl */
+
+ /* P9_19b (ball F4) gpio4_6 */
+ P9_19_qep_pin: pinmux_P9_19_qep_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x357C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d5.eQEP2A_in */
+
+ /* P9_20a (ball T9) gpio7_4 */
+ P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio7_4 */
+ P9_20_gpio_pin: pinmux_P9_20_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
+ P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
+ P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
+ P9_20_gpio_input_pin: pinmux_P9_20_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3444, PIN_INPUT | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
+ P9_20_i2c_pin: pinmux_P9_20_i2c_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.i2c4_sda */
+
+ /* P9_20b (ball D2) gpio4_5*/
+ P9_20_pruout_pin: pinmux_P9_20_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3578, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d4.pr1_pru1_gpo1 */
+ P9_20_pruin_pin: pinmux_P9_20_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3578, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d4.pr1_pru1_gpi1 */
+
+ /* P9_21a (ball AF8) gpio3_3 */
+ P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
+ P9_21_gpio_pin: pinmux_P9_21_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
+ P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
+ P9_21_gpio_pd_pin: pinmux_P9_21_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
+ P9_21_gpio_input_pin: pinmux_P9_21_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x34F0, PIN_INPUT | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
+ P9_21_qep_pin: pinmux_P9_21_qep_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_vsync0.eQEP1_strobe */
+
+ /* P9_21b (ball B22) gpio7_15 */
+ P9_21_spi_pin: pinmux_P9_21_spi_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37C4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_d1.spi2_d1 */
+ P9_21_uart_pin: pinmux_P9_21_uart_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37C4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi2_d1.uart3_txd */
+
+ /* P9_22a (ball B26) gpio6_19 */
+ P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
+ P9_22_gpio_pin: pinmux_P9_22_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
+ P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
+ P9_22_gpio_pd_pin: pinmux_P9_22_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
+ P9_22_gpio_input_pin: pinmux_P9_22_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x369C, PIN_INPUT | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
+
+ /* P9_22b (ball A26) gpio7_14 */
+ P9_22_spi_sclk_pin: pinmux_P9_22_spi_sclk_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37C0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_sclk.spi2_sclk */
+ P9_22_uart_pin: pinmux_P9_22_uart_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37C0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi2_sclk.uart3_rxd */
+
+ /* P9_23 (ball A22) gpio7_11 */
+ P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
+ P9_23_gpio_pin: pinmux_P9_23_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
+ P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
+ P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
+ P9_23_gpio_input_pin: pinmux_P9_23_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x37B4, PIN_INPUT | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
+
+ /* P9_24 (ball F20) gpio6_15*/
+ P9_24_default_pin: pinmux_P9_24_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
+ P9_24_gpio_pin: pinmux_P9_24_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
+ P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
+ P9_24_gpio_pd_pin: pinmux_P9_24_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
+ P9_24_gpio_input_pin: pinmux_P9_24_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x368C, PIN_INPUT | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
+ P9_24_uart_pin: pinmux_P9_24_uart_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* gpio6_15.uart10_txd */
+ P9_24_can_pin: pinmux_P9_24_can_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x368C, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* gpio6_15.dcan2_rx */
+ P9_24_i2c_pin: pinmux_P9_24_i2c_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) >; }; /* gpio6_15.i2c3_scl */
+
+ /* P9_25 (ball D18) gpio6_17 */
+ P9_25_default_pin: pinmux_P9_25_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
+ P9_25_gpio_pin: pinmux_P9_25_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
+ P9_25_gpio_pu_pin: pinmux_P9_25_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
+ P9_25_gpio_pd_pin: pinmux_P9_25_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
+ P9_25_gpio_input_pin: pinmux_P9_25_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
+ P9_25_pruout_pin: pinmux_P9_25_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* xref_clk0.pr2_pru1_gpo5 */
+ P9_25_pruin_pin: pinmux_P9_25_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE12) >; }; /* xref_clk0.pr2_pru1_gpi5 */
+
+ /* P9_26a (ball E21) gpio6_14 */
+ P9_26_default_pin: pinmux_P9_26_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
+ P9_26_gpio_pin: pinmux_P9_26_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
+ P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
+ P9_26_gpio_pd_pin: pinmux_P9_26_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
+ P9_26_gpio_input_pin: pinmux_P9_26_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3688, PIN_INPUT | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
+ P9_26_uart_pin: pinmux_P9_26_uart_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* gpio6_14.uart10_rxd */
+ P9_26_can_pin: pinmux_P9_26_can_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* gpio6_14.dcan2_tx */
+ P9_26_i2c_pin: pinmux_P9_26_i2c_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) >; }; /* gpio6_14.i2c3_sda */
+
+ /* P9_26b (ball AE2) gpio3_24 */
+ P9_26_pruout_pin: pinmux_P9_26_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3544, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d20.pr1_pru0_gpo17*/
+ P9_26_pruin_pin: pinmux_P9_26_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3544, PIN_INPUT | MUX_MODE12) >; }; /* vin1a_d20.pr1_pru0_gpi17*/
+
+ /* P9_27a (ball C3) gpio4_15 */
+ P9_27_default_pin: pinmux_P9_27_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
+ P9_27_gpio_pin: pinmux_P9_27_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
+ P9_27_gpio_pu_pin: pinmux_P9_27_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
+ P9_27_gpio_pd_pin: pinmux_P9_27_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
+ P9_27_gpio_input_pin: pinmux_P9_27_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35A0, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
+ P9_27_qep_pin: pinmux_P9_27_qep_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d14.eQEP3B_in */
+ P9_27_pruout_pin: pinmux_P9_27_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d14.pr1_pru1_gpo11 */
+ P9_27_pruin_pin: pinmux_P9_27_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x35A0, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d14.pr1_pru1_gpi11 */
+
+ /* P9_27b (ball J14) gpio5_1 */
+
+
+ /* P9_28 (ball A12) gpio4_17 */
+ P9_28_default_pin: pinmux_P9_28_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28_gpio_pin: pinmux_P9_28_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28_gpio_input_pin: pinmux_P9_28_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E0, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28_spi_cs_pin: pinmux_P9_28_spi_cs_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr11.spi3_cs0 */
+ P9_28_pruout_pin: pinmux_P9_28_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr11.pr2_pru1_gpo13 */
+ P9_28_pruin_pin: pinmux_P9_28_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E0, PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr11.pr2_pru1_gpi13 */
+
+ /* P9_29a (ball A11) gpio5_11*/
+ P9_29_default_pin: pinmux_P9_29_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
+ P9_29_gpio_pin: pinmux_P9_29_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
+ P9_29_gpio_pu_pin: pinmux_P9_29_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
+ P9_29_gpio_pd_pin: pinmux_P9_29_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
+ P9_29_gpio_input_pin: pinmux_P9_29_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36D8, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
+ P9_29_spi_pin: pinmux_P9_29_spi_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr9.spi3_d1 */
+ P9_29_pruout_pin: pinmux_P9_29_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr9.pr2_pru1_gpo11 */
+ P9_29_pruin_pin: pinmux_P9_29_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36D8, PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr9.pr2_pru1_gpi11 */
+
+ /* P9_29b (ball D14) gpio7_30 */
+
+
+ /* P9_30 (ball B13) gpio5_12*/
+ P9_30_default_pin: pinmux_P9_30_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30_gpio_pin: pinmux_P9_30_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30_gpio_pu_pin: pinmux_P9_30_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30_gpio_pd_pin: pinmux_P9_30_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30_gpio_input_pin: pinmux_P9_30_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36DC, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30_spi_pin: pinmux_P9_30_spi_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr10.spi3_d0 */
+ P9_30_pruout_pin: pinmux_P9_30_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr10.pr2_pru1_gpo12 */
+ P9_30_pruin_pin: pinmux_P9_30_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36DC, PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr10.pr2_pru1_gpi12 */
+
+ /* P9_31a (ball B12) gpio5_10 */
+ P9_31_default_pin: pinmux_P9_31_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
+ P9_31_gpio_pin: pinmux_P9_31_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
+ P9_31_gpio_pu_pin: pinmux_P9_31_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
+ P9_31_gpio_pd_pin: pinmux_P9_31_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
+ P9_31_gpio_input_pin: pinmux_P9_31_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36D4, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
+ P9_31_spi_sclk_pin: pinmux_P9_31_spi_sclk_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr8.spi3_sclk */
+ P9_31_pruout_pin: pinmux_P9_31_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr8.pr2_pru1_gpo10 */
+ P9_31_pruin_pin: pinmux_P9_31_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36D4, PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr8.pr2_pru1_gpi10 */
+
+ /* P9_31b (ball C14) gpio7_31*/
+
+ /* P9_32 VADC */
+
+ /* P9_33 AIN4*/
+
+ /* P9_34 AGND */
+
+ /* P9_35 AIN6 */
+
+ /* P9_36 AIN5 */
+
+ /* P9_37 AIN2 */
+
+ /* P9_38 AIN3*/
+
+ /* P9_39 AIN0*/
+
+ /* P9_40 AIN1*/
+
+ /* P9_41a (ball C23) gpio6_20 */
+ P9_41_default_pin: pinmux_P9_41_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
+ P9_41_gpio_pin: pinmux_P9_41_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
+ P9_41_gpio_pu_pin: pinmux_P9_41_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
+ P9_41_gpio_pd_pin: pinmux_P9_41_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
+ P9_41_gpio_input_pin: pinmux_P9_41_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36A0, PIN_INPUT | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
+
+ /* P9_41b (ball C1) gpio4_7 */
+ P9_41_pruout_pin: pinmux_P9_41_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3580, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d6.pr1_pru1_gpo3 */
+ P9_41_pruin_pin: pinmux_P9_41_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x3580, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d6.pr1_pru1_gpi3 */
+
+ /* P9_42a (ball E14) gpio4_18 */
+ P9_42_default_pin: pinmux_P9_42_default_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
+ P9_42_gpio_pin: pinmux_P9_42_gpio_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
+ P9_42_gpio_pu_pin: pinmux_P9_42_gpio_pu_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
+ P9_42_gpio_pd_pin: pinmux_P9_42_gpio_pd_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
+ P9_42_gpio_input_pin: pinmux_P9_42_gpio_input_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E4, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
+ P9_42_spi_cs_pin: pinmux_P9_42_spi_cs_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr12.spi3_cs1 */
+
+ /* P9_42b (ball C2) gpio4_14*/
+ P9_42_pruout_pin: pinmux_P9_42_pruout_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x359C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d13.pr1_pru1_gpo10 */
+ P9_42_pruin_pin: pinmux_P9_42_pruin_pin { pinctrl-single,pins = <
+ DRA7XX_CORE_IOPAD(0x359C, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d13.pr1_pru1_gpi10 */
+
+ /* P9_43 GND */
+
+ /* P9_44 GND */
+
+ /* P9_45 GND */
+
+ /* P9_46 GND */
+};
+
+/**********************************************************************/
+/* Pin Multiplex Helpers */
+/* */
+/* These provide userspace runtime pin configuration for the */
+/* BeagleBone cape expansion headers */
+/**********************************************************************/
+
+&ocp {
+ /************************/
+ /* P8 Header */
+ /************************/
+
+ /* P8_01 GND */
+
+ /* P8_02 GND */
+
+ P8_03_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_03_default_pin>;
+ pinctrl-1 = <&P8_03_gpio_pin>;
+ pinctrl-2 = <&P8_03_gpio_pu_pin>;
+ pinctrl-3 = <&P8_03_gpio_pd_pin>;
+ pinctrl-4 = <&P8_03_gpio_input_pin>;
+ };
+
+ P8_04_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_04_default_pin>;
+ pinctrl-1 = <&P8_04_gpio_pin>;
+ pinctrl-2 = <&P8_04_gpio_pu_pin>;
+ pinctrl-3 = <&P8_04_gpio_pd_pin>;
+ pinctrl-4 = <&P8_04_gpio_input_pin>;
+ };
+
+ P8_05_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_05_default_pin>;
+ pinctrl-1 = <&P8_05_gpio_pin>;
+ pinctrl-2 = <&P8_05_gpio_pu_pin>;
+ pinctrl-3 = <&P8_05_gpio_pd_pin>;
+ pinctrl-4 = <&P8_05_gpio_input_pin>;
+ };
+
+ P8_06_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_06_default_pin>;
+ pinctrl-1 = <&P8_06_gpio_pin>;
+ pinctrl-2 = <&P8_06_gpio_pu_pin>;
+ pinctrl-3 = <&P8_06_gpio_pd_pin>;
+ pinctrl-4 = <&P8_06_gpio_input_pin>;
+ };
+
+ P8_07_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_07_default_pin>;
+ pinctrl-1 = <&P8_07_gpio_pin>;
+ pinctrl-2 = <&P8_07_gpio_pu_pin>;
+ pinctrl-3 = <&P8_07_gpio_pd_pin>;
+ pinctrl-4 = <&P8_07_gpio_input_pin>;
+ pinctrl-5 = <&P8_07_timer_pin>;
+ };
+
+ P8_08_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_08_default_pin>;
+ pinctrl-1 = <&P8_08_gpio_pin>;
+ pinctrl-2 = <&P8_08_gpio_pu_pin>;
+ pinctrl-3 = <&P8_08_gpio_pd_pin>;
+ pinctrl-4 = <&P8_08_gpio_input_pin>;
+ pinctrl-5 = <&P8_08_timer_pin>;
+ };
+
+ P8_09_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_09_default_pin>;
+ pinctrl-1 = <&P8_09_gpio_pin>;
+ pinctrl-2 = <&P8_09_gpio_pu_pin>;
+ pinctrl-3 = <&P8_09_gpio_pd_pin>;
+ pinctrl-4 = <&P8_09_gpio_input_pin>;
+ pinctrl-5 = <&P8_09_timer_pin>;
+ };
+
+ P8_10_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_10_default_pin>;
+ pinctrl-1 = <&P8_10_gpio_pin>;
+ pinctrl-2 = <&P8_10_gpio_pu_pin>;
+ pinctrl-3 = <&P8_10_gpio_pd_pin>;
+ pinctrl-4 = <&P8_10_gpio_input_pin>;
+ pinctrl-5 = <&P8_10_timer_pin>;
+ };
+
+ P8_11_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
+ pinctrl-0 = <&P8_11_default_pin>;
+ pinctrl-1 = <&P8_11_gpio_pin>;
+ pinctrl-2 = <&P8_11_gpio_pu_pin>;
+ pinctrl-3 = <&P8_11_gpio_pd_pin>;
+ pinctrl-4 = <&P8_11_gpio_input_pin>;
+ pinctrl-5 = <&P8_11_qep_pin>;
+ pinctrl-6 = <&P8_11_pruout_pin>;
+ };
+
+ P8_12_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
+ pinctrl-0 = <&P8_12_default_pin>;
+ pinctrl-1 = <&P8_12_gpio_pin>;
+ pinctrl-2 = <&P8_12_gpio_pu_pin>;
+ pinctrl-3 = <&P8_12_gpio_pd_pin>;
+ pinctrl-4 = <&P8_12_gpio_input_pin>;
+ pinctrl-5 = <&P8_12_qep_pin>;
+ pinctrl-6 = <&P8_12_pruout_pin>;
+ };
+
+ P8_13_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_13_default_pin>;
+ pinctrl-1 = <&P8_13_gpio_pin>;
+ pinctrl-2 = <&P8_13_gpio_pu_pin>;
+ pinctrl-3 = <&P8_13_gpio_pd_pin>;
+ pinctrl-4 = <&P8_13_gpio_input_pin>;
+ pinctrl-5 = <&P8_13_pwm_pin>;
+ };
+
+ P8_14_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_14_default_pin>;
+ pinctrl-1 = <&P8_14_gpio_pin>;
+ pinctrl-2 = <&P8_14_gpio_pu_pin>;
+ pinctrl-3 = <&P8_14_gpio_pd_pin>;
+ pinctrl-4 = <&P8_14_gpio_input_pin>;
+ pinctrl-5 = <&P8_14_pwm_pin>;
+ };
+
+ P8_15_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pru_ecap", "pruin";
+ pinctrl-0 = <&P8_15_default_pin>;
+ pinctrl-1 = <&P8_15_gpio_pin>;
+ pinctrl-2 = <&P8_15_gpio_pu_pin>;
+ pinctrl-3 = <&P8_15_gpio_pd_pin>;
+ pinctrl-4 = <&P8_15_gpio_input_pin>;
+ pinctrl-5 = <&P8_15_pru_ecap_pin>;
+ pinctrl-6 = <&P8_15_pruin_pin>;
+ };
+
+ P8_16_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruin";
+ pinctrl-0 = <&P8_16_default_pin>;
+ pinctrl-1 = <&P8_16_gpio_pin>;
+ pinctrl-2 = <&P8_16_gpio_pu_pin>;
+ pinctrl-3 = <&P8_16_gpio_pd_pin>;
+ pinctrl-4 = <&P8_16_gpio_input_pin>;
+ pinctrl-5 = <&P8_16_pruin_pin>;
+ };
+
+ P8_17_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_17_default_pin>;
+ pinctrl-1 = <&P8_17_gpio_pin>;
+ pinctrl-2 = <&P8_17_gpio_pu_pin>;
+ pinctrl-3 = <&P8_17_gpio_pd_pin>;
+ pinctrl-4 = <&P8_17_gpio_input_pin>;
+ };
+
+ P8_18_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_18_default_pin>;
+ pinctrl-1 = <&P8_18_gpio_pin>;
+ pinctrl-2 = <&P8_18_gpio_pu_pin>;
+ pinctrl-3 = <&P8_18_gpio_pd_pin>;
+ pinctrl-4 = <&P8_18_gpio_input_pin>;
+ pinctrl-5 = <&P8_18_qep_pin>;
+ };
+
+ P8_19_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_19_default_pin>;
+ pinctrl-1 = <&P8_19_gpio_pin>;
+ pinctrl-2 = <&P8_19_gpio_pu_pin>;
+ pinctrl-3 = <&P8_19_gpio_pd_pin>;
+ pinctrl-4 = <&P8_19_gpio_input_pin>;
+ pinctrl-5 = <&P8_19_pwm_pin>;
+ };
+
+ P8_20_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_20_default_pin>;
+ pinctrl-1 = <&P8_20_gpio_pin>;
+ pinctrl-2 = <&P8_20_gpio_pu_pin>;
+ pinctrl-3 = <&P8_20_gpio_pd_pin>;
+ pinctrl-4 = <&P8_20_gpio_input_pin>;
+ pinctrl-5 = <&P8_20_pruout_pin>;
+ pinctrl-6 = <&P8_20_pruin_pin>;
+ };
+
+ P8_21_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_21_default_pin>;
+ pinctrl-1 = <&P8_21_gpio_pin>;
+ pinctrl-2 = <&P8_21_gpio_pu_pin>;
+ pinctrl-3 = <&P8_21_gpio_pd_pin>;
+ pinctrl-4 = <&P8_21_gpio_input_pin>;
+ pinctrl-5 = <&P8_21_pruout_pin>;
+ pinctrl-6 = <&P8_21_pruin_pin>;
+ };
+
+ P8_22_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_22_default_pin>;
+ pinctrl-1 = <&P8_22_gpio_pin>;
+ pinctrl-2 = <&P8_22_gpio_pu_pin>;
+ pinctrl-3 = <&P8_22_gpio_pd_pin>;
+ pinctrl-4 = <&P8_22_gpio_input_pin>;
+ };
+
+ P8_23_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_23_default_pin>;
+ pinctrl-1 = <&P8_23_gpio_pin>;
+ pinctrl-2 = <&P8_23_gpio_pu_pin>;
+ pinctrl-3 = <&P8_23_gpio_pd_pin>;
+ pinctrl-4 = <&P8_23_gpio_input_pin>;
+ };
+
+ P8_24_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_24_default_pin>;
+ pinctrl-1 = <&P8_24_gpio_pin>;
+ pinctrl-2 = <&P8_24_gpio_pu_pin>;
+ pinctrl-3 = <&P8_24_gpio_pd_pin>;
+ pinctrl-4 = <&P8_24_gpio_input_pin>;
+ };
+
+ P8_25_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_25_default_pin>;
+ pinctrl-1 = <&P8_25_gpio_pin>;
+ pinctrl-2 = <&P8_25_gpio_pu_pin>;
+ pinctrl-3 = <&P8_25_gpio_pd_pin>;
+ pinctrl-4 = <&P8_25_gpio_input_pin>;
+ };
+
+ P8_26_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_26_default_pin>;
+ pinctrl-1 = <&P8_26_gpio_pin>;
+ pinctrl-2 = <&P8_26_gpio_pu_pin>;
+ pinctrl-3 = <&P8_26_gpio_pd_pin>;
+ pinctrl-4 = <&P8_26_gpio_input_pin>;
+ };
+
+ P8_27_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_27_default_pin>;
+ pinctrl-1 = <&P8_27_gpio_pin>;
+ pinctrl-2 = <&P8_27_gpio_pu_pin>;
+ pinctrl-3 = <&P8_27_gpio_pd_pin>;
+ pinctrl-4 = <&P8_27_gpio_input_pin>;
+ pinctrl-5 = <&P8_27_pruout_pin>;
+ pinctrl-6 = <&P8_27_pruin_pin>;
+ };
+
+ P8_28_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_28_default_pin>;
+ pinctrl-1 = <&P8_28_gpio_pin>;
+ pinctrl-2 = <&P8_28_gpio_pu_pin>;
+ pinctrl-3 = <&P8_28_gpio_pd_pin>;
+ pinctrl-4 = <&P8_28_gpio_input_pin>;
+ pinctrl-5 = <&P8_28_pruout_pin>;
+ pinctrl-6 = <&P8_28_pruin_pin>;
+ };
+
+ P8_29_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_29_default_pin>;
+ pinctrl-1 = <&P8_29_gpio_pin>;
+ pinctrl-2 = <&P8_29_gpio_pu_pin>;
+ pinctrl-3 = <&P8_29_gpio_pd_pin>;
+ pinctrl-4 = <&P8_29_gpio_input_pin>;
+ pinctrl-5 = <&P8_29_pruout_pin>;
+ pinctrl-6 = <&P8_29_pruin_pin>;
+ };
+
+ P8_30_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_30_default_pin>;
+ pinctrl-1 = <&P8_30_gpio_pin>;
+ pinctrl-2 = <&P8_30_gpio_pu_pin>;
+ pinctrl-3 = <&P8_30_gpio_pd_pin>;
+ pinctrl-4 = <&P8_30_gpio_input_pin>;
+ pinctrl-5 = <&P8_30_pruout_pin>;
+ pinctrl-6 = <&P8_30_pruin_pin>;
+ };
+
+ P8_31_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
+ pinctrl-0 = <&P8_31_default_pin>;
+ pinctrl-1 = <&P8_31_gpio_pin>;
+ pinctrl-2 = <&P8_31_gpio_pu_pin>;
+ pinctrl-3 = <&P8_31_gpio_pd_pin>;
+ pinctrl-4 = <&P8_31_gpio_input_pin>;
+ pinctrl-5 = <&P8_31_uart_pin>;
+ };
+
+ P8_32_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_32_default_pin>;
+ pinctrl-1 = <&P8_32_gpio_pin>;
+ pinctrl-2 = <&P8_32_gpio_pu_pin>;
+ pinctrl-3 = <&P8_32_gpio_pd_pin>;
+ pinctrl-4 = <&P8_32_gpio_input_pin>;
+ };
+
+ P8_33_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
+ pinctrl-0 = <&P8_33_default_pin>;
+ pinctrl-1 = <&P8_33_gpio_pin>;
+ pinctrl-2 = <&P8_33_gpio_pu_pin>;
+ pinctrl-3 = <&P8_33_gpio_pd_pin>;
+ pinctrl-4 = <&P8_33_gpio_input_pin>;
+ pinctrl-5 = <&P8_33_qep_pin>;
+ };
+
+ P8_34_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_34_default_pin>;
+ pinctrl-1 = <&P8_34_gpio_pin>;
+ pinctrl-2 = <&P8_34_gpio_pu_pin>;
+ pinctrl-3 = <&P8_34_gpio_pd_pin>;
+ pinctrl-4 = <&P8_34_gpio_input_pin>;
+ pinctrl-5 = <&P8_34_pwm_pin>;
+ };
+
+ P8_35_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
+ pinctrl-0 = <&P8_35_default_pin>;
+ pinctrl-1 = <&P8_35_gpio_pin>;
+ pinctrl-2 = <&P8_35_gpio_pu_pin>;
+ pinctrl-3 = <&P8_35_gpio_pd_pin>;
+ pinctrl-4 = <&P8_35_gpio_input_pin>;
+ pinctrl-5 = <&P8_35_qep_pin>;
+ };
+
+ P8_36_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_36_default_pin>;
+ pinctrl-1 = <&P8_36_gpio_pin>;
+ pinctrl-2 = <&P8_36_gpio_pu_pin>;
+ pinctrl-3 = <&P8_36_gpio_pd_pin>;
+ pinctrl-4 = <&P8_36_gpio_input_pin>;
+ pinctrl-5 = <&P8_36_pwm_pin>;
+ };
+
+ P8_37_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
+ pinctrl-0 = <&P8_37_default_pin>;
+ pinctrl-1 = <&P8_37_gpio_pin>;
+ pinctrl-2 = <&P8_37_gpio_pu_pin>;
+ pinctrl-3 = <&P8_37_gpio_pd_pin>;
+ pinctrl-4 = <&P8_37_gpio_input_pin>;
+ pinctrl-5 = <&P8_37_uart_pin>;
+ };
+
+ P8_38_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
+ pinctrl-0 = <&P8_38_default_pin>;
+ pinctrl-1 = <&P8_38_gpio_pin>;
+ pinctrl-2 = <&P8_38_gpio_pu_pin>;
+ pinctrl-3 = <&P8_38_gpio_pd_pin>;
+ pinctrl-4 = <&P8_38_gpio_input_pin>;
+ pinctrl-5 = <&P8_38_uart_pin>;
+ };
+
+ P8_39_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_39_default_pin>;
+ pinctrl-1 = <&P8_39_gpio_pin>;
+ pinctrl-2 = <&P8_39_gpio_pu_pin>;
+ pinctrl-3 = <&P8_39_gpio_pd_pin>;
+ pinctrl-4 = <&P8_39_gpio_input_pin>;
+ pinctrl-5 = <&P8_39_pruout_pin>;
+ pinctrl-6 = <&P8_39_pruin_pin>;
+ };
+
+ P8_40_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_40_default_pin>;
+ pinctrl-1 = <&P8_40_gpio_pin>;
+ pinctrl-2 = <&P8_40_gpio_pu_pin>;
+ pinctrl-3 = <&P8_40_gpio_pd_pin>;
+ pinctrl-4 = <&P8_40_gpio_input_pin>;
+ pinctrl-5 = <&P8_40_pruout_pin>;
+ pinctrl-6 = <&P8_40_pruin_pin>;
+ };
+
+ P8_41_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_41_default_pin>;
+ pinctrl-1 = <&P8_41_gpio_pin>;
+ pinctrl-2 = <&P8_41_gpio_pu_pin>;
+ pinctrl-3 = <&P8_41_gpio_pd_pin>;
+ pinctrl-4 = <&P8_41_gpio_input_pin>;
+ pinctrl-5 = <&P8_41_pruout_pin>;
+ pinctrl-6 = <&P8_41_pruin_pin>;
+ };
+
+ P8_42_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_42_default_pin>;
+ pinctrl-1 = <&P8_42_gpio_pin>;
+ pinctrl-2 = <&P8_42_gpio_pu_pin>;
+ pinctrl-3 = <&P8_42_gpio_pd_pin>;
+ pinctrl-4 = <&P8_42_gpio_input_pin>;
+ pinctrl-5 = <&P8_42_pruout_pin>;
+ pinctrl-6 = <&P8_42_pruin_pin>;
+ };
+
+ P8_43_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_43_default_pin>;
+ pinctrl-1 = <&P8_43_gpio_pin>;
+ pinctrl-2 = <&P8_43_gpio_pu_pin>;
+ pinctrl-3 = <&P8_43_gpio_pd_pin>;
+ pinctrl-4 = <&P8_43_gpio_input_pin>;
+ pinctrl-5 = <&P8_43_pruout_pin>;
+ pinctrl-6 = <&P8_43_pruin_pin>;
+ };
+
+ P8_44_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_44_default_pin>;
+ pinctrl-1 = <&P8_44_gpio_pin>;
+ pinctrl-2 = <&P8_44_gpio_pu_pin>;
+ pinctrl-3 = <&P8_44_gpio_pd_pin>;
+ pinctrl-4 = <&P8_44_gpio_input_pin>;
+ pinctrl-5 = <&P8_44_pruout_pin>;
+ pinctrl-6 = <&P8_44_pruin_pin>;
+ };
+
+ P8_45_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_45_default_pin>;
+ pinctrl-1 = <&P8_45_gpio_pin>;
+ pinctrl-2 = <&P8_45_gpio_pu_pin>;
+ pinctrl-3 = <&P8_45_gpio_pd_pin>;
+ pinctrl-4 = <&P8_45_gpio_input_pin>;
+ pinctrl-5 = <&P8_45_pruout_pin>;
+ pinctrl-6 = <&P8_45_pruin_pin>;
+ };
+
+ P8_46_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_46_default_pin>;
+ pinctrl-1 = <&P8_46_gpio_pin>;
+ pinctrl-2 = <&P8_46_gpio_pu_pin>;
+ pinctrl-3 = <&P8_46_gpio_pd_pin>;
+ pinctrl-4 = <&P8_46_gpio_input_pin>;
+ pinctrl-5 = <&P8_46_pruout_pin>;
+ pinctrl-6 = <&P8_46_pruin_pin>;
+ };
+
+ /************************/
+ /* P9 Header */
+ /************************/
+
+ /* P9_01 GND */
+
+ /* P9_02 GND */
+
+ /* P9_03 3V3 */
+
+ /* P9_04 3V3 */
+
+ /* P9_05 VDD_5V */
+
+ /* P9_06 VDD_5V */
+
+ /* P9_07 SYS_5V */
+
+ /* P9_08 SYS_5V */
+
+ /* P9_09 PWR_BUT */
+
+ /* P9_10 RSTn */
+
+ P9_11_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
+ pinctrl-0 = <&P9_11_default_pin>;
+ pinctrl-1 = <&P9_11_gpio_pin>;
+ pinctrl-2 = <&P9_11_gpio_pu_pin>;
+ pinctrl-3 = <&P9_11_gpio_pd_pin>;
+ pinctrl-4 = <&P9_11_gpio_input_pin>;
+ pinctrl-5 = <&P9_11_uart_pin>;
+ };
+
+ P9_12_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P9_12_default_pin>;
+ pinctrl-1 = <&P9_12_gpio_pin>;
+ pinctrl-2 = <&P9_12_gpio_pu_pin>;
+ pinctrl-3 = <&P9_12_gpio_pd_pin>;
+ pinctrl-4 = <&P9_12_gpio_input_pin>;
+ };
+
+ P9_13_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
+ pinctrl-0 = <&P9_13_default_pin>;
+ pinctrl-1 = <&P9_13_gpio_pin>;
+ pinctrl-2 = <&P9_13_gpio_pu_pin>;
+ pinctrl-3 = <&P9_13_gpio_pd_pin>;
+ pinctrl-4 = <&P9_13_gpio_input_pin>;
+ pinctrl-5 = <&P9_13_uart_pin>;
+ };
+
+ P9_14_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P9_14_default_pin>;
+ pinctrl-1 = <&P9_14_gpio_pin>;
+ pinctrl-2 = <&P9_14_gpio_pu_pin>;
+ pinctrl-3 = <&P9_14_gpio_pd_pin>;
+ pinctrl-4 = <&P9_14_gpio_input_pin>;
+ pinctrl-5 = <&P9_14_pwm_pin>;
+ };
+
+ P9_15_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P9_15_default_pin>;
+ pinctrl-1 = <&P9_15_gpio_pin>;
+ pinctrl-2 = <&P9_15_gpio_pu_pin>;
+ pinctrl-3 = <&P9_15_gpio_pd_pin>;
+ pinctrl-4 = <&P9_15_gpio_input_pin>;
+ };
+
+ P9_16_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P9_16_default_pin>;
+ pinctrl-1 = <&P9_16_gpio_pin>;
+ pinctrl-2 = <&P9_16_gpio_pu_pin>;
+ pinctrl-3 = <&P9_16_gpio_pd_pin>;
+ pinctrl-4 = <&P9_16_gpio_input_pin>;
+ pinctrl-5 = <&P9_16_pwm_pin>;
+ };
+
+ P9_17_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "i2c";
+ pinctrl-0 = <&P9_17_default_pin>;
+ pinctrl-1 = <&P9_17_gpio_pin>;
+ pinctrl-2 = <&P9_17_gpio_pu_pin>;
+ pinctrl-3 = <&P9_17_gpio_pd_pin>;
+ pinctrl-4 = <&P9_17_gpio_input_pin>;
+ pinctrl-5 = <&P9_17_spi_cs_pin>;
+ pinctrl-6 = <&P9_17_i2c_pin>;
+ };
+
+ P9_18_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "i2c";
+ pinctrl-0 = <&P9_18_default_pin>;
+ pinctrl-1 = <&P9_18_gpio_pin>;
+ pinctrl-2 = <&P9_18_gpio_pu_pin>;
+ pinctrl-3 = <&P9_18_gpio_pd_pin>;
+ pinctrl-4 = <&P9_18_gpio_input_pin>;
+ pinctrl-5 = <&P9_18_spi_pin>;
+ pinctrl-6 = <&P9_18_i2c_pin>;
+ };
+
+ P9_19_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "i2c";
+ pinctrl-0 = <&P9_19_default_pin>;
+ pinctrl-1 = <&P9_19_gpio_pin>;
+ pinctrl-2 = <&P9_19_gpio_pu_pin>;
+ pinctrl-3 = <&P9_19_gpio_pd_pin>;
+ pinctrl-4 = <&P9_19_gpio_input_pin>;
+ pinctrl-5 = <&P9_19_i2c_pin>;
+ };
+
+ P9_20_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "i2c";
+ pinctrl-0 = <&P9_20_default_pin>;
+ pinctrl-1 = <&P9_20_gpio_pin>;
+ pinctrl-2 = <&P9_20_gpio_pu_pin>;
+ pinctrl-3 = <&P9_20_gpio_pd_pin>;
+ pinctrl-4 = <&P9_20_gpio_input_pin>;
+ pinctrl-5 = <&P9_20_i2c_pin>;
+ };
+
+ P9_21_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "uart";
+ pinctrl-0 = <&P9_21_default_pin>;
+ pinctrl-1 = <&P9_21_gpio_pin>;
+ pinctrl-2 = <&P9_21_gpio_pu_pin>;
+ pinctrl-3 = <&P9_21_gpio_pd_pin>;
+ pinctrl-4 = <&P9_21_gpio_input_pin>;
+ pinctrl-5 = <&P9_21_spi_pin>;
+ pinctrl-6 = <&P9_21_uart_pin>;
+ };
+
+ P9_22_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "uart";
+ pinctrl-0 = <&P9_22_default_pin>;
+ pinctrl-1 = <&P9_22_gpio_pin>;
+ pinctrl-2 = <&P9_22_gpio_pu_pin>;
+ pinctrl-3 = <&P9_22_gpio_pd_pin>;
+ pinctrl-4 = <&P9_22_gpio_input_pin>;
+ pinctrl-5 = <&P9_22_spi_sclk_pin>;
+ pinctrl-6 = <&P9_22_uart_pin>;
+ };
+
+ P9_23_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P9_23_default_pin>;
+ pinctrl-1 = <&P9_23_gpio_pin>;
+ pinctrl-2 = <&P9_23_gpio_pu_pin>;
+ pinctrl-3 = <&P9_23_gpio_pd_pin>;
+ pinctrl-4 = <&P9_23_gpio_input_pin>;
+ };
+
+ P9_24_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can";
+ pinctrl-0 = <&P9_24_default_pin>;
+ pinctrl-1 = <&P9_24_gpio_pin>;
+ pinctrl-2 = <&P9_24_gpio_pu_pin>;
+ pinctrl-3 = <&P9_24_gpio_pd_pin>;
+ pinctrl-4 = <&P9_24_gpio_input_pin>;
+ pinctrl-5 = <&P9_24_uart_pin>;
+ pinctrl-6 = <&P9_24_can_pin>;
+ };
+
+ P9_25_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P9_25_default_pin>;
+ pinctrl-1 = <&P9_25_gpio_pin>;
+ pinctrl-2 = <&P9_25_gpio_pu_pin>;
+ pinctrl-3 = <&P9_25_gpio_pd_pin>;
+ pinctrl-4 = <&P9_25_gpio_input_pin>;
+ pinctrl-5 = <&P9_25_pruout_pin>;
+ pinctrl-6 = <&P9_25_pruin_pin>;
+ };
+
+ P9_26_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pruin";
+ pinctrl-0 = <&P9_26_default_pin>;
+ pinctrl-1 = <&P9_26_gpio_pin>;
+ pinctrl-2 = <&P9_26_gpio_pu_pin>;
+ pinctrl-3 = <&P9_26_gpio_pd_pin>;
+ pinctrl-4 = <&P9_26_gpio_input_pin>;
+ pinctrl-5 = <&P9_26_uart_pin>;
+ pinctrl-6 = <&P9_26_can_pin>;
+ pinctrl-7 = <&P9_26_i2c_pin>;
+ pinctrl-8 = <&P9_26_pruin_pin>;
+ };
+
+ P9_27_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P9_27_default_pin>;
+ pinctrl-1 = <&P9_27_gpio_pin>;
+ pinctrl-2 = <&P9_27_gpio_pu_pin>;
+ pinctrl-3 = <&P9_27_gpio_pd_pin>;
+ pinctrl-4 = <&P9_27_gpio_input_pin>;
+ pinctrl-5 = <&P9_27_qep_pin>;
+ pinctrl-6 = <&P9_27_pruout_pin>;
+ pinctrl-7 = <&P9_27_pruin_pin>;
+ };
+
+ P9_28_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "pruout", "pruin";
+ pinctrl-0 = <&P9_28_default_pin>;
+ pinctrl-1 = <&P9_28_gpio_pin>;
+ pinctrl-2 = <&P9_28_gpio_pu_pin>;
+ pinctrl-3 = <&P9_28_gpio_pd_pin>;
+ pinctrl-4 = <&P9_28_gpio_input_pin>;
+ pinctrl-5 = <&P9_28_spi_cs_pin>;
+ pinctrl-8 = <&P9_28_pruout_pin>;
+ pinctrl-9 = <&P9_28_pruin_pin>;
+ };
+
+ P9_29_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pruout", "pruin";
+ pinctrl-0 = <&P9_29_default_pin>;
+ pinctrl-1 = <&P9_29_gpio_pin>;
+ pinctrl-2 = <&P9_29_gpio_pu_pin>;
+ pinctrl-3 = <&P9_29_gpio_pd_pin>;
+ pinctrl-4 = <&P9_29_gpio_input_pin>;
+ pinctrl-5 = <&P9_29_spi_pin>;
+ pinctrl-6 = <&P9_29_pruout_pin>;
+ pinctrl-7 = <&P9_29_pruin_pin>;
+ };
+
+ P9_30_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pruout", "pruin";
+ pinctrl-0 = <&P9_30_default_pin>;
+ pinctrl-1 = <&P9_30_gpio_pin>;
+ pinctrl-2 = <&P9_30_gpio_pu_pin>;
+ pinctrl-3 = <&P9_30_gpio_pd_pin>;
+ pinctrl-4 = <&P9_30_gpio_input_pin>;
+ pinctrl-5 = <&P9_30_spi_pin>;
+ pinctrl-6 = <&P9_30_pruout_pin>;
+ pinctrl-7 = <&P9_30_pruin_pin>;
+ };
+
+ P9_31_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "pruout", "pruin";
+ pinctrl-0 = <&P9_31_default_pin>;
+ pinctrl-1 = <&P9_31_gpio_pin>;
+ pinctrl-2 = <&P9_31_gpio_pu_pin>;
+ pinctrl-3 = <&P9_31_gpio_pd_pin>;
+ pinctrl-4 = <&P9_31_gpio_input_pin>;
+ pinctrl-5 = <&P9_31_spi_sclk_pin>;
+ pinctrl-6 = <&P9_31_pruout_pin>;
+ pinctrl-7 = <&P9_31_pruin_pin>;
+ };
+
+ /* P9_32 VADC */
+
+ /* P9_33 AIN4*/
+
+ /* P9_34 AGND */
+
+ /* P9_35 AIN6 */
+
+ /* P9_36 AIN5 */
+
+ /* P9_37 AIN2 */
+
+ /* P9_38 AIN3*/
+
+ /* P9_39 AIN0*/
+
+ /* P9_40 AIN1*/
+
+ P9_41_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruin";
+ pinctrl-0 = <&P9_41_default_pin>;
+ pinctrl-1 = <&P9_41_gpio_pin>;
+ pinctrl-2 = <&P9_41_gpio_pu_pin>;
+ pinctrl-3 = <&P9_41_gpio_pd_pin>;
+ pinctrl-4 = <&P9_41_gpio_input_pin>;
+ pinctrl-5 = <&P9_41_pruin_pin>;
+ };
+
+ P9_42_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P9_42_default_pin>;
+ pinctrl-1 = <&P9_42_gpio_pin>;
+ pinctrl-2 = <&P9_42_gpio_pu_pin>;
+ pinctrl-3 = <&P9_42_gpio_pd_pin>;
+ pinctrl-4 = <&P9_42_gpio_input_pin>;
+ };
+
+ /* P9_43 GND */
+
+ /* P9_44 GND */
+
+ /* P9_45 GND */
+
+ /* P9_46 GND */
+
+ cape-universal {
+ compatible = "gpio-of-helper";
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ P8_03 {
+ gpio-name = "P8_03";
+ gpio = <&gpio1 24 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_04 {
+ gpio-name = "P8_04";
+ gpio = <&gpio1 25 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_05 {
+ gpio-name = "P8_05";
+ gpio = <&gpio7 1 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_06 {
+ gpio-name = "P8_06";
+ gpio = <&gpio7 2 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_07 {
+ gpio-name = "P8_07";
+ gpio = <&gpio6 5 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_08 {
+ gpio-name = "P8_08";
+ gpio = <&gpio6 6 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_09 {
+ gpio-name = "P8_09";
+ gpio = <&gpio6 18 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_10 {
+ gpio-name = "P8_10";
+ gpio = <&gpio6 4 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_11 {
+ gpio-name = "P8_11";
+ gpio = <&gpio3 11 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_12 {
+ gpio-name = "P8_12";
+ gpio = <&gpio3 10 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_13 {
+ gpio-name = "P8_13";
+ gpio = <&gpio4 11 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_14 {
+ gpio-name = "P8_14";
+ gpio = <&gpio4 13 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_15 {
+ gpio-name = "P8_15";
+ gpio = <&gpio4 3 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_16 {
+ gpio-name = "P8_16";
+ gpio = <&gpio4 29 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_17 {
+ gpio-name = "P8_17";
+ gpio = <&gpio8 18 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_18 {
+ gpio-name = "P8_18";
+ gpio = <&gpio4 9 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_19 {
+ gpio-name = "P8_19";
+ gpio = <&gpio4 10 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_20 {
+ gpio-name = "P8_20";
+ gpio = <&gpio6 30 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_21 {
+ gpio-name = "P8_21";
+ gpio = <&gpio6 29 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_22 {
+ gpio-name = "P8_22";
+ gpio = <&gpio1 23 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_23 {
+ gpio-name = "P8_23";
+ gpio = <&gpio1 22 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_24 {
+ gpio-name = "P8_24";
+ gpio = <&gpio7 0 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_25 {
+ gpio-name = "P8_25";
+ gpio = <&gpio6 31 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_26 {
+ gpio-name = "P8_26";
+ gpio = <&gpio4 28 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_27 {
+ gpio-name = "P8_27";
+ gpio = <&gpio4 23 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_28 {
+ gpio-name = "P8_28";
+ gpio = <&gpio4 19 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_29 {
+ gpio-name = "P8_29";
+ gpio = <&gpio4 22 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_30 {
+ gpio-name = "P8_30";
+ gpio = <&gpio4 20 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_31 {
+ gpio-name = "P8_31";
+ gpio = <&gpio8 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_32 {
+ gpio-name = "P8_32";
+ gpio = <&gpio8 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_33 {
+ gpio-name = "P8_33";
+ gpio = <&gpio8 13 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_34 {
+ gpio-name = "P8_34";
+ gpio = <&gpio8 11 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_35 {
+ gpio-name = "P8_35";
+ gpio = <&gpio8 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_36 {
+ gpio-name = "P8_36";
+ gpio = <&gpio8 10 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_37 {
+ gpio-name = "P8_37";
+ gpio = <&gpio8 8 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_38 {
+ gpio-name = "P8_38";
+ gpio = <&gpio8 9 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_39 {
+ gpio-name = "P8_39";
+ gpio = <&gpio8 6 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_40 {
+ gpio-name = "P8_40";
+ gpio = <&gpio8 7 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_41 {
+ gpio-name = "P8_41";
+ gpio = <&gpio8 4 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_42 {
+ gpio-name = "P8_42";
+ gpio = <&gpio8 5 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_43 {
+ gpio-name = "P8_43";
+ gpio = <&gpio8 2 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_44 {
+ gpio-name = "P8_44";
+ gpio = <&gpio8 3 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_45 {
+ gpio-name = "P8_45";
+ gpio = <&gpio8 0 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_46 {
+ gpio-name = "P8_46";
+ gpio = <&gpio8 1 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_11 {
+ gpio-name = "P9_11";
+ gpio = <&gpio8 17 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_12 {
+ gpio-name = "P9_12";
+ gpio = <&gpio5 0 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_13 {
+ gpio-name = "P9_13";
+ gpio = <&gpio6 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_14 {
+ gpio-name = "P9_14";
+ gpio = <&gpio4 25 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_15 {
+ gpio-name = "P9_15";
+ gpio = <&gpio3 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_16 {
+ gpio-name = "P9_16";
+ gpio = <&gpio4 26 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_17 {
+ gpio-name = "P9_17";
+ gpio = <&gpio7 17 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_18 {
+ gpio-name = "P9_18";
+ gpio = <&gpio7 16 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_19 {
+ gpio-name = "P9_19";
+ gpio = <&gpio7 3 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_20 {
+ gpio-name = "P9_20";
+ gpio = <&gpio7 4 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_21 {
+ gpio-name = "P9_21";
+ gpio = <&gpio3 3 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_22 {
+ gpio-name = "P9_22";
+ gpio = <&gpio6 19 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_23 {
+ gpio-name = "P9_23";
+ gpio = <&gpio7 11 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_24 {
+ gpio-name = "P9_24";
+ gpio = <&gpio6 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_25 {
+ gpio-name = "P9_25";
+ gpio = <&gpio6 17 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_26 {
+ gpio-name = "P9_26";
+ gpio = <&gpio6 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_27 {
+ gpio-name = "P9_27";
+ gpio = <&gpio6 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_28 {
+ gpio-name = "P9_28";
+ gpio = <&gpio4 17 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_29 {
+ gpio-name = "P9_29";
+ gpio = <&gpio5 11 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_30 {
+ gpio-name = "P9_30";
+ gpio = <&gpio5 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_31 {
+ gpio-name = "P9_31";
+ gpio = <&gpio5 10 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_41 {
+ gpio-name = "P9_41";
+ gpio = <&gpio6 20 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_42 {
+ gpio-name = "P9_42";
+ gpio = <&gpio4 18 0>;
+ input;
+ dir-changeable;
+ };
+ };
+};
\ No newline at end of file
--
GitLab
From 07dc8493e786e568f74127ad342d24ddbb1677a5 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Sat, 20 Jun 2020 09:43:55 +0530
Subject: [PATCH 07/86] create BBAI /bone/<bus>/<#>
---
src/arm/bbai-bone-buses.dtsi | 81 ++++++++++++++++++++++++++++++++++++
1 file changed, 81 insertions(+)
create mode 100644 src/arm/bbai-bone-buses.dtsi
diff --git a/src/arm/bbai-bone-buses.dtsi b/src/arm/bbai-bone-buses.dtsi
new file mode 100644
index 00000000..e95d818a
--- /dev/null
+++ b/src/arm/bbai-bone-buses.dtsi
@@ -0,0 +1,81 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <dt-bindings/board/am572x-bbai-pins.h>
+
+&dra7_pmx_core {
+ bone_uart_1_pins: pinmux_bone_uart_1_pins {
+ pinctrl-single,pins = <
+ P9_24( PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpio6_15.uart10_txd */
+ P9_26A( PIN_INPUT_PULLUP | MUX_MODE3) /* gpio6_14.uart10_rxd */
+ /* unused pins */
+ P9_26B( PIN_OUTPUT | MUX_MODE15)
+ >;
+ };
+
+ bone_uart_2_pins: pinmux_bone_uart_2_pins {
+ pinctrl-single,pins = <
+ P9_21B( PIN_OUTPUT_PULLUP | MUX_MODE1) /* spi2_d1.uart3_txd */
+ P9_22B( PIN_INPUT_PULLUP | MUX_MODE1) /* spi2_sclk.uart3_rxd */
+ /* unused pins */
+ P9_21A( PIN_OUTPUT | MUX_MODE15)
+ P9_22A( PIN_OUTPUT | MUX_MODE15)
+ >;
+ };
+
+ bone_uart_4_pins: pinmux_bone_uart_4_pins {
+ pinctrl-single,pins = <
+ P9_13( PIN_OUTPUT_PULLUP | MUX_MODE4) /* mcasp3_axr1.uart5_txd */
+ P9_11A( PIN_INPUT_PULLUP | MUX_MODE4) /* mcasp3_axr0.uart5_rxd */
+ /* unused pins */
+ P9_11B( PIN_OUTPUT | MUX_MODE15)
+ >;
+ };
+
+ bone_uart_5_pins: pinmux_bone_uart_5_pins {
+ pinctrl-single,pins = <
+ P8_37B( PIN_OUTPUT_PULLUP | MUX_MODE3) /* uart8_txd */
+ P8_38B( PIN_INPUT_PULLUP | MUX_MODE3) /* uart8_rxd */
+ /* unused pins */
+ P8_37A( PIN_OUTPUT | MUX_MODE15)
+ P8_38A( PIN_OUTPUT | MUX_MODE15)
+ >;
+ };
+};
+
+bone_uart_1: &uart10 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_uart_1_pins>;
+ symlink = "bone/uart/1";
+};
+
+bone_uart_2: &uart3 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_uart_2_pins>;
+ symlink = "bone/uart/2";
+};
+
+bone_uart_3: &ocp{
+ // not available
+};
+
+bone_uart_4: &uart5 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_uart_4_pins>;
+ symlink = "bone/uart/4";
+};
+
+bone_uart_5: &uart8 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_uart_5_pins>;
+ symlink = "bone/uart/5";
+};
\ No newline at end of file
--
GitLab
From c42c59a704f6f9145ba056ea1e7d7347b867be25 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Sat, 20 Jun 2020 09:44:27 +0530
Subject: [PATCH 08/86] create BBB /bone/<bus>/<#>
---
src/arm/bbb-bone-buses.dtsi | 80 +++++++++++++++++++++++++++++++++++++
1 file changed, 80 insertions(+)
create mode 100644 src/arm/bbb-bone-buses.dtsi
diff --git a/src/arm/bbb-bone-buses.dtsi b/src/arm/bbb-bone-buses.dtsi
new file mode 100644
index 00000000..d80ef33f
--- /dev/null
+++ b/src/arm/bbb-bone-buses.dtsi
@@ -0,0 +1,80 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <dt-bindings/board/am335x-bbb-pins.h>
+
+&am33xx_pinmux {
+bone_uart_1_pins: pinmux_bone_uart_1_pins {
+ pinctrl-single,pins = <
+ P9_24( PIN_OUTPUT_PULLUP | MUX_MODE0)
+ P9_26( PIN_INPUT_PULLUP | MUX_MODE0)
+ >;
+ };
+
+ bone_uart_2_pins: pinmux_bone_uart_2_pins {
+ pinctrl-single,pins = <
+ P9_21( PIN_OUTPUT_PULLUP | MUX_MODE1)
+ P9_22( PIN_INPUT_PULLUP | MUX_MODE1)
+ >;
+ };
+
+ bone_uart_3_pins: pinmux_bone_uart_3_pins {
+ pinctrl-single,pins = <
+ P9_42A (PIN_OUTPUT_PULLUP | MUX_MODE1)
+ >;
+ };
+
+ bone_uart_4_pins: pinmux_bone_uart_4_pins {
+ pinctrl-single,pins = <
+ P9_13(PIN_OUTPUT_PULLUP | MUX_MODE6)
+ P9_11(PIN_OUTPUT_PULLUP | MUX_MODE6)
+ >;
+ };
+
+ bone_uart_5_pins: pinmux_bone_uart_5_pins {
+ pinctrl-single,pins = <
+ P8_37( PIN_OUTPUT_PULLUP | MUX_MODE4)
+ P8_38( PIN_INPUT_PULLUP | MUX_MODE4)
+ >;
+ };
+};
+
+bone_uart_1: &uart1 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_uart_1_pins>;
+ symlink = "bone/uart/1";
+};
+
+bone_uart_2: &uart2 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_uart_2_pins>;
+ symlink = "bone/uart/2";
+};
+
+bone_uart_3: &uart3 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_uart_3_pins>;
+ symlink = "bone/uart/3";
+};
+
+bone_uart_4: &uart4 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_uart_4_pins>;
+ symlink = "bone/uart/4";
+};
+
+bone_uart_5: &uart5 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_uart_5_pins>;
+ symlink = "bone/uart/5";
+};
\ No newline at end of file
--
GitLab
From 6280f4756805494d5dffe3e461b10c4fb9b9e6f0 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Thu, 25 Jun 2020 21:28:56 +0530
Subject: [PATCH 09/86] fix tabs
---
include/dt-bindings/board/am335x-bbb-pins.h | 138 ++++++++++----------
1 file changed, 69 insertions(+), 69 deletions(-)
diff --git a/include/dt-bindings/board/am335x-bbb-pins.h b/include/dt-bindings/board/am335x-bbb-pins.h
index bdadd93b..e3b94f9d 100644
--- a/include/dt-bindings/board/am335x-bbb-pins.h
+++ b/include/dt-bindings/board/am335x-bbb-pins.h
@@ -9,74 +9,74 @@
#ifndef _DT_BINDINGS_BOARD_AM335X_BBB_PINS_H
#define _DT_BINDINGS_BOARD_AM335X_BBB_PINS_H
-#define P8_03(mode) AM33XX_IOPAD(0x0818, mode) /* gpmc_ad6 */
-#define P8_04(mode) AM33XX_IOPAD(0x081c, mode) /* gpmc_ad7 */
-#define P8_05(mode) AM33XX_IOPAD(0x0808, mode) /* gpmc_ad2 */
-#define P8_06(mode) AM33XX_IOPAD(0x080c, mode) /* gpmc_ad3 */
-#define P8_07(mode) AM33XX_IOPAD(0x0890, mode) /* gpmc_advn_ale */
-#define P8_08(mode) AM33XX_IOPAD(0x0894, mode) /* gpmc_oen_ren */
-#define P8_09(mode) AM33XX_IOPAD(0x089c, mode) /* gpmc_be0n_cle */
-#define P8_10(mode) AM33XX_IOPAD(0x0898, mode) /* gpmc_wen */
-#define P8_11(mode) AM33XX_IOPAD(0x0834, mode) /* gpmc_ad13 */
-#define P8_12(mode) AM33XX_IOPAD(0x0830, mode) /* gpmc_ad12 */
-#define P8_13(mode) AM33XX_IOPAD(0x0824, mode) /* gpmc_ad9 */
-#define P8_14(mode) AM33XX_IOPAD(0x0828, mode) /* gpmc_ad10 */
-#define P8_15(mode) AM33XX_IOPAD(0x083c, mode) /* gpmc_ad15 */
-#define P8_16(mode) AM33XX_IOPAD(0x0838, mode) /* gpmc_ad14 */
-#define P8_17(mode) AM33XX_IOPAD(0x082c, mode) /* gpmc_ad11 */
-#define P8_18(mode) AM33XX_IOPAD(0x088c, mode) /* gpmc_clk */
-#define P8_19(mode) AM33XX_IOPAD(0x0820, mode) /* gpmc_ad8 */
-#define P8_20(mode) AM33XX_IOPAD(0x0884, mode) /* gpmc_csn2 */
-#define P8_21(mode) AM33XX_IOPAD(0x0880, mode) /* gpmc_csn1 */
-#define P8_22(mode) AM33XX_IOPAD(0x0814, mode) /* gpmc_ad5 */
-#define P8_23(mode) AM33XX_IOPAD(0x0810, mode) /* gpmc_ad4 */
-#define P8_24(mode) AM33XX_IOPAD(0x0804, mode) /* gpmc_ad1 */
-#define P8_25(mode) AM33XX_IOPAD(0x0800, mode) /* gpmc_ad0 */
-#define P8_26(mode) AM33XX_IOPAD(0x087c, mode) /* gpmc_csn0 */
-#define P8_27(mode) AM33XX_IOPAD(0x08e0, mode) /* lcd_vsync */
-#define P8_28(mode) AM33XX_IOPAD(0x08e8, mode) /* lcd_pclk */
-#define P8_29(mode) AM33XX_IOPAD(0x08e4, mode) /* lcd_hsync */
-#define P8_30(mode) AM33XX_IOPAD(0x08ec, mode) /* lcd_ac_bias_en */
-#define P8_31(mode) AM33XX_IOPAD(0x08d8, mode) /* lcd_data14 */
-#define P8_32(mode) AM33XX_IOPAD(0x08dc, mode) /* lcd_data15 */
-#define P8_33(mode) AM33XX_IOPAD(0x08d4, mode) /* lcd_data13 */
-#define P8_34(mode) AM33XX_IOPAD(0x08cc, mode) /* lcd_data11 */
-#define P8_35(mode) AM33XX_IOPAD(0x08d0, mode) /* lcd_data12 */
-#define P8_36(mode) AM33XX_IOPAD(0x08c8, mode) /* lcd_data10 */
-#define P8_37(mode) AM33XX_IOPAD(0x08c0, mode) /* lcd_data8 */
-#define P8_38(mode) AM33XX_IOPAD(0x08c4, mode) /* lcd_data9 */
-#define P8_39(mode) AM33XX_IOPAD(0x08b8, mode) /* lcd_data6 */
-#define P8_40(mode) AM33XX_IOPAD(0x08bc, mode) /* lcd_data7 */
-#define P8_41(mode) AM33XX_IOPAD(0x08b0, mode) /* lcd_data4 */
-#define P8_42(mode) AM33XX_IOPAD(0x08b4, mode) /* lcd_data5 */
-#define P8_43(mode) AM33XX_IOPAD(0x08a8, mode) /* lcd_data2 */
-#define P8_44(mode) AM33XX_IOPAD(0x08ac, mode) /* lcd_data3 */
-#define P8_45(mode) AM33XX_IOPAD(0x08a0, mode) /* lcd_data0 */
-#define P8_46(mode) AM33XX_IOPAD(0x08a4, mode) /* lcd_data1 */
-#define P9_11(mode) AM33XX_IOPAD(0x0870, mode) /* gpmc_wait0 */
-#define P9_12(mode) AM33XX_IOPAD(0x0878, mode) /* gpmc_be1n */
-#define P9_13(mode) AM33XX_IOPAD(0x0874, mode) /* gpmc_wpn */
-#define P9_14(mode) AM33XX_IOPAD(0x0848, mode) /* gpmc_a2 */
-#define P9_15(mode) AM33XX_IOPAD(0x0840, mode) /* gpmc_a0 */
-#define P9_16(mode) AM33XX_IOPAD(0x084c, mode) /* gpmc_a3 */
-#define P9_17(mode) AM33XX_IOPAD(0x095c, mode) /* spi0_cs0 */
-#define P9_18(mode) AM33XX_IOPAD(0x0958, mode) /* spi0_d1 */
-#define P9_19(mode) AM33XX_IOPAD(0x097c, mode) /* uart1_rtsn */
-#define P9_20(mode) AM33XX_IOPAD(0x0978, mode) /* uart1_ctsn */
-#define P9_21(mode) AM33XX_IOPAD(0x0954, mode) /* spi0_d0 */
-#define P9_22(mode) AM33XX_IOPAD(0x0950, mode) /* spi0_sclk */
-#define P9_23(mode) AM33XX_IOPAD(0x0844, mode) /* gpmc_a1 */
-#define P9_24(mode) AM33XX_IOPAD(0x0984, mode) /* uart1_txd */
-#define P9_25(mode) AM33XX_IOPAD(0x09ac, mode) /* mcasp0_ahclkx */
-#define P9_26(mode) AM33XX_IOPAD(0x0980, mode) /* uart1_rxd */
-#define P9_27(mode) AM33XX_IOPAD(0x09a4, mode) /* mcasp0_fsr */
-#define P9_28(mode) AM33XX_IOPAD(0x099c, mode) /* mcasp0_ahclkr */
-#define P9_29(mode) AM33XX_IOPAD(0x0994, mode) /* mcasp0_fsx */
-#define P9_30(mode) AM33XX_IOPAD(0x0998, mode) /* mcasp0_axr0 */
-#define P9_31(mode) AM33XX_IOPAD(0x0990, mode) /* mcasp0_aclkx */
-#define P9_41A(mode) AM33XX_IOPAD(0x09b4, mode) /* xdma_event_intr1 */
-#define P9_41B(mode) AM33XX_IOPAD(0x09a8, mode) /* mcasp0_axr1 */
-#define P9_42A(mode) AM33XX_IOPAD(0x0964, mode) /* P0_in_PWM0_out */
-#define P9_42B(mode) AM33XX_IOPAD(0x09a0, mode) /* mcasp0_aclkr */
+#define P8_03(mode) AM33XX_IOPAD(0x0818, mode) /* gpmc_ad6 */
+#define P8_04(mode) AM33XX_IOPAD(0x081c, mode) /* gpmc_ad7 */
+#define P8_05(mode) AM33XX_IOPAD(0x0808, mode) /* gpmc_ad2 */
+#define P8_06(mode) AM33XX_IOPAD(0x080c, mode) /* gpmc_ad3 */
+#define P8_07(mode) AM33XX_IOPAD(0x0890, mode) /* gpmc_advn_ale */
+#define P8_08(mode) AM33XX_IOPAD(0x0894, mode) /* gpmc_oen_ren */
+#define P8_09(mode) AM33XX_IOPAD(0x089c, mode) /* gpmc_be0n_cle */
+#define P8_10(mode) AM33XX_IOPAD(0x0898, mode) /* gpmc_wen */
+#define P8_11(mode) AM33XX_IOPAD(0x0834, mode) /* gpmc_ad13 */
+#define P8_12(mode) AM33XX_IOPAD(0x0830, mode) /* gpmc_ad12 */
+#define P8_13(mode) AM33XX_IOPAD(0x0824, mode) /* gpmc_ad9 */
+#define P8_14(mode) AM33XX_IOPAD(0x0828, mode) /* gpmc_ad10 */
+#define P8_15(mode) AM33XX_IOPAD(0x083c, mode) /* gpmc_ad15 */
+#define P8_16(mode) AM33XX_IOPAD(0x0838, mode) /* gpmc_ad14 */
+#define P8_17(mode) AM33XX_IOPAD(0x082c, mode) /* gpmc_ad11 */
+#define P8_18(mode) AM33XX_IOPAD(0x088c, mode) /* gpmc_clk */
+#define P8_19(mode) AM33XX_IOPAD(0x0820, mode) /* gpmc_ad8 */
+#define P8_20(mode) AM33XX_IOPAD(0x0884, mode) /* gpmc_csn2 */
+#define P8_21(mode) AM33XX_IOPAD(0x0880, mode) /* gpmc_csn1 */
+#define P8_22(mode) AM33XX_IOPAD(0x0814, mode) /* gpmc_ad5 */
+#define P8_23(mode) AM33XX_IOPAD(0x0810, mode) /* gpmc_ad4 */
+#define P8_24(mode) AM33XX_IOPAD(0x0804, mode) /* gpmc_ad1 */
+#define P8_25(mode) AM33XX_IOPAD(0x0800, mode) /* gpmc_ad0 */
+#define P8_26(mode) AM33XX_IOPAD(0x087c, mode) /* gpmc_csn0 */
+#define P8_27(mode) AM33XX_IOPAD(0x08e0, mode) /* lcd_vsync */
+#define P8_28(mode) AM33XX_IOPAD(0x08e8, mode) /* lcd_pclk */
+#define P8_29(mode) AM33XX_IOPAD(0x08e4, mode) /* lcd_hsync */
+#define P8_30(mode) AM33XX_IOPAD(0x08ec, mode) /* lcd_ac_bias_en */
+#define P8_31(mode) AM33XX_IOPAD(0x08d8, mode) /* lcd_data14 */
+#define P8_32(mode) AM33XX_IOPAD(0x08dc, mode) /* lcd_data15 */
+#define P8_33(mode) AM33XX_IOPAD(0x08d4, mode) /* lcd_data13 */
+#define P8_34(mode) AM33XX_IOPAD(0x08cc, mode) /* lcd_data11 */
+#define P8_35(mode) AM33XX_IOPAD(0x08d0, mode) /* lcd_data12 */
+#define P8_36(mode) AM33XX_IOPAD(0x08c8, mode) /* lcd_data10 */
+#define P8_37(mode) AM33XX_IOPAD(0x08c0, mode) /* lcd_data8 */
+#define P8_38(mode) AM33XX_IOPAD(0x08c4, mode) /* lcd_data9 */
+#define P8_39(mode) AM33XX_IOPAD(0x08b8, mode) /* lcd_data6 */
+#define P8_40(mode) AM33XX_IOPAD(0x08bc, mode) /* lcd_data7 */
+#define P8_41(mode) AM33XX_IOPAD(0x08b0, mode) /* lcd_data4 */
+#define P8_42(mode) AM33XX_IOPAD(0x08b4, mode) /* lcd_data5 */
+#define P8_43(mode) AM33XX_IOPAD(0x08a8, mode) /* lcd_data2 */
+#define P8_44(mode) AM33XX_IOPAD(0x08ac, mode) /* lcd_data3 */
+#define P8_45(mode) AM33XX_IOPAD(0x08a0, mode) /* lcd_data0 */
+#define P8_46(mode) AM33XX_IOPAD(0x08a4, mode) /* lcd_data1 */
+#define P9_11(mode) AM33XX_IOPAD(0x0870, mode) /* gpmc_wait0 */
+#define P9_12(mode) AM33XX_IOPAD(0x0878, mode) /* gpmc_be1n */
+#define P9_13(mode) AM33XX_IOPAD(0x0874, mode) /* gpmc_wpn */
+#define P9_14(mode) AM33XX_IOPAD(0x0848, mode) /* gpmc_a2 */
+#define P9_15(mode) AM33XX_IOPAD(0x0840, mode) /* gpmc_a0 */
+#define P9_16(mode) AM33XX_IOPAD(0x084c, mode) /* gpmc_a3 */
+#define P9_17(mode) AM33XX_IOPAD(0x095c, mode) /* spi0_cs0 */
+#define P9_18(mode) AM33XX_IOPAD(0x0958, mode) /* spi0_d1 */
+#define P9_19(mode) AM33XX_IOPAD(0x097c, mode) /* uart1_rtsn */
+#define P9_20(mode) AM33XX_IOPAD(0x0978, mode) /* uart1_ctsn */
+#define P9_21(mode) AM33XX_IOPAD(0x0954, mode) /* spi0_d0 */
+#define P9_22(mode) AM33XX_IOPAD(0x0950, mode) /* spi0_sclk */
+#define P9_23(mode) AM33XX_IOPAD(0x0844, mode) /* gpmc_a1 */
+#define P9_24(mode) AM33XX_IOPAD(0x0984, mode) /* uart1_txd */
+#define P9_25(mode) AM33XX_IOPAD(0x09ac, mode) /* mcasp0_ahclkx */
+#define P9_26(mode) AM33XX_IOPAD(0x0980, mode) /* uart1_rxd */
+#define P9_27(mode) AM33XX_IOPAD(0x09a4, mode) /* mcasp0_fsr */
+#define P9_28(mode) AM33XX_IOPAD(0x099c, mode) /* mcasp0_ahclkr */
+#define P9_29(mode) AM33XX_IOPAD(0x0994, mode) /* mcasp0_fsx */
+#define P9_30(mode) AM33XX_IOPAD(0x0998, mode) /* mcasp0_axr0 */
+#define P9_31(mode) AM33XX_IOPAD(0x0990, mode) /* mcasp0_aclkx */
+#define P9_41A(mode) AM33XX_IOPAD(0x09b4, mode) /* xdma_event_intr1 */
+#define P9_41B(mode) AM33XX_IOPAD(0x09a8, mode) /* mcasp0_axr1 */
+#define P9_42A(mode) AM33XX_IOPAD(0x0964, mode) /* P0_in_PWM0_out */
+#define P9_42B(mode) AM33XX_IOPAD(0x09a0, mode) /* mcasp0_aclkr */
#endif
\ No newline at end of file
--
GitLab
From 2a7f9ee126823d43715dbb0ad7198fa1887269fd Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Thu, 25 Jun 2020 21:29:09 +0530
Subject: [PATCH 10/86] fix spacing
---
include/dt-bindings/board/am572x-bbai-pins.h | 192 +++++++++----------
1 file changed, 96 insertions(+), 96 deletions(-)
diff --git a/include/dt-bindings/board/am572x-bbai-pins.h b/include/dt-bindings/board/am572x-bbai-pins.h
index bb7f3124..8dc647e5 100644
--- a/include/dt-bindings/board/am572x-bbai-pins.h
+++ b/include/dt-bindings/board/am572x-bbai-pins.h
@@ -7,102 +7,102 @@
*/
#ifndef _DT_BINDINGS_BOARD_AM5729_BBAI_PINS_H
-#define _DT_BINDINGS_BOARD_AM5729_BBAI_PINS_H
+#define _DT_BINDINGS_BOARD_AM5729_BBAI_PINS_H
-#define P8_03(mode) DRA7XX_CORE_IOPAD(0x379C, mode) /* AB8: P8.3: mmc3_dat6 */
-#define P8_04(mode) DRA7XX_CORE_IOPAD(0x37A0, mode) /* AB5: P8.4: mmc3_dat7 */
-#define P8_05(mode) DRA7XX_CORE_IOPAD(0x378C, mode) /* AC9: P8.5: mmc3_dat2 */
-#define P8_06(mode) DRA7XX_CORE_IOPAD(0x3790, mode) /* AC3: P8.6: mmc3_dat3 */
-#define P8_07(mode) DRA7XX_CORE_IOPAD(0x36EC, mode) /* G14: P8.7: mcasp1_axr14 */
-#define P8_08(mode) DRA7XX_CORE_IOPAD(0x36F0, mode) /* F14: P8.8: mcasp1_axr15 */
-#define P8_09(mode) DRA7XX_CORE_IOPAD(0x3698, mode) /* E17: P8.9: xref_clk1 */
-#define P8_10(mode) DRA7XX_CORE_IOPAD(0x36E8, mode) /* A13: P8.10: mcasp1_axr13 */
-#define P8_11(mode) DRA7XX_CORE_IOPAD(0x3510, mode) /* AH4: P8.11: vin1a_d7 */
-#define P8_12(mode) DRA7XX_CORE_IOPAD(0x350C, mode) /* AG6: P8.12: vin1a_d6 */
-#define P8_13(mode) DRA7XX_CORE_IOPAD(0x3590, mode) /* D3: P8.13: vin2a_d10 */
-#define P8_14(mode) DRA7XX_CORE_IOPAD(0x3598, mode) /* D5: P8.14: vin2a_d12 */
-#define P8_15A(mode) DRA7XX_CORE_IOPAD(0x3570, mode) /* D1: P8.15a: vin2a_d2 */
-#define P8_15B(mode) DRA7XX_CORE_IOPAD(0x35B4, mode) /* A3: P8.15b: vin2a_d19 */
-#define P8_16(mode) DRA7XX_CORE_IOPAD(0x35BC, mode) /* B4: P8.16: vin2a_d21 */
-#define P8_17(mode) DRA7XX_CORE_IOPAD(0x3624, mode) /* A7: P8.17: vout1_d18 */
-#define P8_18(mode) DRA7XX_CORE_IOPAD(0x3588, mode) /* F5: P8.18: vin2a_d8 */
-#define P8_19(mode) DRA7XX_CORE_IOPAD(0x358C, mode) /* E6: P8.19: vin2a_d9 */
-#define P8_20(mode) DRA7XX_CORE_IOPAD(0x3780, mode) /* AC4: P8.20: mmc3_cmd */
-#define P8_21(mode) DRA7XX_CORE_IOPAD(0x377C, mode) /* AD4: P8.21: mmc3_clk */
-#define P8_22(mode) DRA7XX_CORE_IOPAD(0x3798, mode) /* AD6: P8.22: mmc3_dat5 */
-#define P8_23(mode) DRA7XX_CORE_IOPAD(0x3794, mode) /* AC8: P8.23: mmc3_dat4 */
-#define P8_24(mode) DRA7XX_CORE_IOPAD(0x3788, mode) /* AC6: P8.24: mmc3_dat1 */
-#define P8_25(mode) DRA7XX_CORE_IOPAD(0x3784, mode) /* AC7: P8.25: mmc3_dat0 */
-#define P8_26(mode) DRA7XX_CORE_IOPAD(0x35B8, mode) /* B3: P8.26: vin2a_d20 */
-#define P8_27A(mode) DRA7XX_CORE_IOPAD(0x35D8, mode) /* E11: P8.27a: vout1_vsync */
-#define P8_27B(mode) DRA7XX_CORE_IOPAD(0x3628, mode) /* A8: P8.27b: vout1_d19 */
-#define P8_28A(mode) DRA7XX_CORE_IOPAD(0x35C8, mode) /* D11: P8.28a: vout1_clk */
-#define P8_28B(mode) DRA7XX_CORE_IOPAD(0x362C, mode) /* C9: P8.28b: vout1_d20 */
-#define P8_29A(mode) DRA7XX_CORE_IOPAD(0x35D4, mode) /* C11: P8.29a: vout1_hsync */
-#define P8_29B(mode) DRA7XX_CORE_IOPAD(0x3630, mode) /* A9: P8.29b: vout1_d21 */
-#define P8_30A(mode) DRA7XX_CORE_IOPAD(0x35CC, mode) /* B10: P8.30a: vout1_de */
-#define P8_30B(mode) DRA7XX_CORE_IOPAD(0x3634, mode) /* B9: P8.30b: vout1_d22 */
-#define P8_31A(mode) DRA7XX_CORE_IOPAD(0x3614, mode) /* C8: P8.31a: vout1_d14 */
-#define P8_31B(mode) DRA7XX_CORE_IOPAD(0x373C, mode) /* G16: P8.31b: mcasp4_axr0 */
-#define P8_32A(mode) DRA7XX_CORE_IOPAD(0x3618, mode) /* C7: P8.32a: vout1_d15 */
-#define P8_32B(mode) DRA7XX_CORE_IOPAD(0x3740, mode) /* D17: P8.32b: mcasp4_axr1 */
-#define P8_33A(mode) DRA7XX_CORE_IOPAD(0x3610, mode) /* C6: P8.33a: vout1_d13 */
-#define P8_33B(mode) DRA7XX_CORE_IOPAD(0x34E8, mode) /* AF9: P8.33b: vin1a_fld0 */
-#define P8_34A(mode) DRA7XX_CORE_IOPAD(0x3608, mode) /* D8: P8.34a: vout1_d11 */
-#define P8_34B(mode) DRA7XX_CORE_IOPAD(0x3564, mode) /* G6: P8.34b: vin2a_vsync0 */
-#define P8_35A(mode) DRA7XX_CORE_IOPAD(0x360C, mode) /* A5: P8.35a: vout1_d12 */
-#define P8_35B(mode) DRA7XX_CORE_IOPAD(0x34E4, mode) /* AD9: P8.35b: vin1a_de0 */
-#define P8_36A(mode) DRA7XX_CORE_IOPAD(0x3604, mode) /* D7: P8.36a: vout1_d10 */
-#define P8_36B(mode) DRA7XX_CORE_IOPAD(0x3568, mode) /* F2: P8.36b: vin2a_d0 */
-#define P8_37A(mode) DRA7XX_CORE_IOPAD(0x35FC, mode) /* E8: P8.37a: vout1_d8 */
-#define P8_37B(mode) DRA7XX_CORE_IOPAD(0x3738, mode) /* A21: P8.37b: mcasp4_fsx */
-#define P8_38A(mode) DRA7XX_CORE_IOPAD(0x3600, mode) /* D9: P8.38a: vout1_d9 */
-#define P8_38B(mode) DRA7XX_CORE_IOPAD(0x3734, mode) /* C18: P8.38b: mcasp4_aclkx */
-#define P8_39(mode) DRA7XX_CORE_IOPAD(0x35F4, mode) /* F8: P8.39: vout1_d6 */
-#define P8_40(mode) DRA7XX_CORE_IOPAD(0x35F8, mode) /* E7: P8.40: vout1_d7 */
-#define P8_41(mode) DRA7XX_CORE_IOPAD(0x35EC, mode) /* E9: P8.41: vout1_d4 */
-#define P8_42(mode) DRA7XX_CORE_IOPAD(0x35F0, mode) /* F9: P8.42: vout1_d5 */
-#define P8_43(mode) DRA7XX_CORE_IOPAD(0x35E4, mode) /* F10: P8.43: vout1_d2 */
-#define P8_44(mode) DRA7XX_CORE_IOPAD(0x35E8, mode) /* G11: P8.44: vout1_d3 */
-#define P8_45A(mode) DRA7XX_CORE_IOPAD(0x35DC, mode) /* F11: P8.45a: vout1_d0 */
-#define P8_45B(mode) DRA7XX_CORE_IOPAD(0x361C, mode) /* B7: P8.45b: vout1_d16 */
-#define P8_46A(mode) DRA7XX_CORE_IOPAD(0x35E0, mode) /* G10: P8.46a: vout1_d1 */
-#define P8_46B(mode) DRA7XX_CORE_IOPAD(0x3638, mode) /* A10: P8.46b: vout1_d23 */
-#define P9_11A(mode) DRA7XX_CORE_IOPAD(0x372C, mode) /* B19: P9.11a: mcasp3_axr0 */
-#define P9_11B(mode) DRA7XX_CORE_IOPAD(0x3620, mode) /* B8: P9.11b: vout1_d17 */
-#define P9_12(mode) DRA7XX_CORE_IOPAD(0x36AC, mode) /* B14: P9.12: mcasp1_aclkr */
-#define P9_13(mode) DRA7XX_CORE_IOPAD(0x3730, mode) /* C17: P9.13: mcasp3_axr1 */
-#define P9_14(mode) DRA7XX_CORE_IOPAD(0x35AC, mode) /* D6: P9.14: vin2a_d17 */
-#define P9_15(mode) DRA7XX_CORE_IOPAD(0x3514, mode) /* AG4: P9.15: vin1a_d8 */
-#define P9_16(mode) DRA7XX_CORE_IOPAD(0x35B0, mode) /* C5: P9.16: vin2a_d18 */
-#define P9_17A(mode) DRA7XX_CORE_IOPAD(0x37CC, mode) /* B24: P9.17a: spi2_cs0 */
-#define P9_17B(mode) DRA7XX_CORE_IOPAD(0x36B8, mode) /* F12: P9.17b: mcasp1_axr1 */
-#define P9_18A(mode) DRA7XX_CORE_IOPAD(0x37C8, mode) /* G17: P9.18a: spi2_d0 */
-#define P9_18B(mode) DRA7XX_CORE_IOPAD(0x36B4, mode) /* G12: P9.18b: mcasp1_axr0 */
-#define P9_19A(mode) DRA7XX_CORE_IOPAD(0x3440, mode) /* R6: P9.19a: gpmc_a0.i2c4_scl */
-#define P9_19B(mode) DRA7XX_CORE_IOPAD(0x357C, mode) /* F4: P9.19b: vin2a_d5.pr1_pru1_gpi2 */
-#define P9_20A(mode) DRA7XX_CORE_IOPAD(0x3444, mode) /* T9: P9.20a: gpmc_a1.i2c4_sda */
-#define P9_20B(mode) DRA7XX_CORE_IOPAD(0x3578, mode) /* D2: P9.20b: vin2a_d4.pr1_pru1_gpi1 */
-#define P9_21A(mode) DRA7XX_CORE_IOPAD(0x34F0, mode) /* AF8: P9.21a: vin1a_vsync0 */
-#define P9_21B(mode) DRA7XX_CORE_IOPAD(0x37C4, mode) /* B22: P9.21b: spi2_d1 */
-#define P9_22A(mode) DRA7XX_CORE_IOPAD(0x369C, mode) /* B26: P9.22a: xref_clk2 */
-#define P9_22B(mode) DRA7XX_CORE_IOPAD(0x37C0, mode) /* A26: P9.22b: spi2_sclk */
-#define P9_23(mode) DRA7XX_CORE_IOPAD(0x37B4, mode) /* A22: P9.23: spi1_cs1 */
-#define P9_24(mode) DRA7XX_CORE_IOPAD(0x368C, mode) /* F20: P9.24: gpio6_15 */
-#define P9_25(mode) DRA7XX_CORE_IOPAD(0x3694, mode) /* D18: P9.25: xref_clk0 */
-#define P9_26A(mode) DRA7XX_CORE_IOPAD(0x3688, mode) /* E21: P9.26a: gpio6_14 */
-#define P9_26B(mode) DRA7XX_CORE_IOPAD(0x3544, mode) /* AE2: P9.26b: vin1a_d20 */
-#define P9_27A(mode) DRA7XX_CORE_IOPAD(0x35A0, mode) /* C3: P9.27a: vin2a_d14 */
-#define P9_27B(mode) DRA7XX_CORE_IOPAD(0x36B0, mode) /* J14: P9.27b: mcasp1_fsr */
-#define P9_28(mode) DRA7XX_CORE_IOPAD(0x36E0, mode) /* A12: P9.28: mcasp1_axr11 */
-#define P9_29A(mode) DRA7XX_CORE_IOPAD(0x36D8, mode) /* A11: P9.29a: mcasp1_axr9 */
-#define P9_29B(mode) DRA7XX_CORE_IOPAD(0x36A8, mode) /* D14: P9.29b: mcasp1_fsx */
-#define P9_30(mode) DRA7XX_CORE_IOPAD(0x36DC, mode) /* B13: P9.30: mcasp1_axr10 */
-#define P9_31A(mode) DRA7XX_CORE_IOPAD(0x36D4, mode) /* B12: P9.31a: mcasp1_axr8 */
-#define P9_31B(mode) DRA7XX_CORE_IOPAD(0x36A4, mode) /* C14: P9.31b: mcasp1_aclkx */
-#define P9_41A(mode) DRA7XX_CORE_IOPAD(0x36A0, mode) /* C23: P9.41a: xref_clk3 */
-#define P9_41B(mode) DRA7XX_CORE_IOPAD(0x3580, mode) /* C1: P9.41b: vin2a_d6 */
-#define P9_42A(mode) DRA7XX_CORE_IOPAD(0x36E4, mode) /* E14: P9.42a: mcasp1_axr12 */
-#define P9_42B(mode) DRA7XX_CORE_IOPAD(0x359C, mode) /* C2: P9.42b: vin2a_d13 */
+#define P8_03(mode) DRA7XX_CORE_IOPAD(0x379C, mode) /* AB8: P8.3: mmc3_dat6 */
+#define P8_04(mode) DRA7XX_CORE_IOPAD(0x37A0, mode) /* AB5: P8.4: mmc3_dat7 */
+#define P8_05(mode) DRA7XX_CORE_IOPAD(0x378C, mode) /* AC9: P8.5: mmc3_dat2 */
+#define P8_06(mode) DRA7XX_CORE_IOPAD(0x3790, mode) /* AC3: P8.6: mmc3_dat3 */
+#define P8_07(mode) DRA7XX_CORE_IOPAD(0x36EC, mode) /* G14: P8.7: mcasp1_axr14 */
+#define P8_08(mode) DRA7XX_CORE_IOPAD(0x36F0, mode) /* F14: P8.8: mcasp1_axr15 */
+#define P8_09(mode) DRA7XX_CORE_IOPAD(0x3698, mode) /* E17: P8.9: xref_clk1 */
+#define P8_10(mode) DRA7XX_CORE_IOPAD(0x36E8, mode) /* A13: P8.10: mcasp1_axr13 */
+#define P8_11(mode) DRA7XX_CORE_IOPAD(0x3510, mode) /* AH4: P8.11: vin1a_d7 */
+#define P8_12(mode) DRA7XX_CORE_IOPAD(0x350C, mode) /* AG6: P8.12: vin1a_d6 */
+#define P8_13(mode) DRA7XX_CORE_IOPAD(0x3590, mode) /* D3: P8.13: vin2a_d10 */
+#define P8_14(mode) DRA7XX_CORE_IOPAD(0x3598, mode) /* D5: P8.14: vin2a_d12 */
+#define P8_15A(mode) DRA7XX_CORE_IOPAD(0x3570, mode) /* D1: P8.15a: vin2a_d2 */
+#define P8_15B(mode) DRA7XX_CORE_IOPAD(0x35B4, mode) /* A3: P8.15b: vin2a_d19 */
+#define P8_16(mode) DRA7XX_CORE_IOPAD(0x35BC, mode) /* B4: P8.16: vin2a_d21 */
+#define P8_17(mode) DRA7XX_CORE_IOPAD(0x3624, mode) /* A7: P8.17: vout1_d18 */
+#define P8_18(mode) DRA7XX_CORE_IOPAD(0x3588, mode) /* F5: P8.18: vin2a_d8 */
+#define P8_19(mode) DRA7XX_CORE_IOPAD(0x358C, mode) /* E6: P8.19: vin2a_d9 */
+#define P8_20(mode) DRA7XX_CORE_IOPAD(0x3780, mode) /* AC4: P8.20: mmc3_cmd */
+#define P8_21(mode) DRA7XX_CORE_IOPAD(0x377C, mode) /* AD4: P8.21: mmc3_clk */
+#define P8_22(mode) DRA7XX_CORE_IOPAD(0x3798, mode) /* AD6: P8.22: mmc3_dat5 */
+#define P8_23(mode) DRA7XX_CORE_IOPAD(0x3794, mode) /* AC8: P8.23: mmc3_dat4 */
+#define P8_24(mode) DRA7XX_CORE_IOPAD(0x3788, mode) /* AC6: P8.24: mmc3_dat1 */
+#define P8_25(mode) DRA7XX_CORE_IOPAD(0x3784, mode) /* AC7: P8.25: mmc3_dat0 */
+#define P8_26(mode) DRA7XX_CORE_IOPAD(0x35B8, mode) /* B3: P8.26: vin2a_d20 */
+#define P8_27A(mode) DRA7XX_CORE_IOPAD(0x35D8, mode) /* E11: P8.27a: vout1_vsync */
+#define P8_27B(mode) DRA7XX_CORE_IOPAD(0x3628, mode) /* A8: P8.27b: vout1_d19 */
+#define P8_28A(mode) DRA7XX_CORE_IOPAD(0x35C8, mode) /* D11: P8.28a: vout1_clk */
+#define P8_28B(mode) DRA7XX_CORE_IOPAD(0x362C, mode) /* C9: P8.28b: vout1_d20 */
+#define P8_29A(mode) DRA7XX_CORE_IOPAD(0x35D4, mode) /* C11: P8.29a: vout1_hsync */
+#define P8_29B(mode) DRA7XX_CORE_IOPAD(0x3630, mode) /* A9: P8.29b: vout1_d21 */
+#define P8_30A(mode) DRA7XX_CORE_IOPAD(0x35CC, mode) /* B10: P8.30a: vout1_de */
+#define P8_30B(mode) DRA7XX_CORE_IOPAD(0x3634, mode) /* B9: P8.30b: vout1_d22 */
+#define P8_31A(mode) DRA7XX_CORE_IOPAD(0x3614, mode) /* C8: P8.31a: vout1_d14 */
+#define P8_31B(mode) DRA7XX_CORE_IOPAD(0x373C, mode) /* G16: P8.31b: mcasp4_axr0 */
+#define P8_32A(mode) DRA7XX_CORE_IOPAD(0x3618, mode) /* C7: P8.32a: vout1_d15 */
+#define P8_32B(mode) DRA7XX_CORE_IOPAD(0x3740, mode) /* D17: P8.32b: mcasp4_axr1 */
+#define P8_33A(mode) DRA7XX_CORE_IOPAD(0x3610, mode) /* C6: P8.33a: vout1_d13 */
+#define P8_33B(mode) DRA7XX_CORE_IOPAD(0x34E8, mode) /* AF9: P8.33b: vin1a_fld0 */
+#define P8_34A(mode) DRA7XX_CORE_IOPAD(0x3608, mode) /* D8: P8.34a: vout1_d11 */
+#define P8_34B(mode) DRA7XX_CORE_IOPAD(0x3564, mode) /* G6: P8.34b: vin2a_vsync0 */
+#define P8_35A(mode) DRA7XX_CORE_IOPAD(0x360C, mode) /* A5: P8.35a: vout1_d12 */
+#define P8_35B(mode) DRA7XX_CORE_IOPAD(0x34E4, mode) /* AD9: P8.35b: vin1a_de0 */
+#define P8_36A(mode) DRA7XX_CORE_IOPAD(0x3604, mode) /* D7: P8.36a: vout1_d10 */
+#define P8_36B(mode) DRA7XX_CORE_IOPAD(0x3568, mode) /* F2: P8.36b: vin2a_d0 */
+#define P8_37A(mode) DRA7XX_CORE_IOPAD(0x35FC, mode) /* E8: P8.37a: vout1_d8 */
+#define P8_37B(mode) DRA7XX_CORE_IOPAD(0x3738, mode) /* A21: P8.37b: mcasp4_fsx */
+#define P8_38A(mode) DRA7XX_CORE_IOPAD(0x3600, mode) /* D9: P8.38a: vout1_d9 */
+#define P8_38B(mode) DRA7XX_CORE_IOPAD(0x3734, mode) /* C18: P8.38b: mcasp4_aclkx */
+#define P8_39(mode) DRA7XX_CORE_IOPAD(0x35F4, mode) /* F8: P8.39: vout1_d6 */
+#define P8_40(mode) DRA7XX_CORE_IOPAD(0x35F8, mode) /* E7: P8.40: vout1_d7 */
+#define P8_41(mode) DRA7XX_CORE_IOPAD(0x35EC, mode) /* E9: P8.41: vout1_d4 */
+#define P8_42(mode) DRA7XX_CORE_IOPAD(0x35F0, mode) /* F9: P8.42: vout1_d5 */
+#define P8_43(mode) DRA7XX_CORE_IOPAD(0x35E4, mode) /* F10: P8.43: vout1_d2 */
+#define P8_44(mode) DRA7XX_CORE_IOPAD(0x35E8, mode) /* G11: P8.44: vout1_d3 */
+#define P8_45A(mode) DRA7XX_CORE_IOPAD(0x35DC, mode) /* F11: P8.45a: vout1_d0 */
+#define P8_45B(mode) DRA7XX_CORE_IOPAD(0x361C, mode) /* B7: P8.45b: vout1_d16 */
+#define P8_46A(mode) DRA7XX_CORE_IOPAD(0x35E0, mode) /* G10: P8.46a: vout1_d1 */
+#define P8_46B(mode) DRA7XX_CORE_IOPAD(0x3638, mode) /* A10: P8.46b: vout1_d23 */
+#define P9_11A(mode) DRA7XX_CORE_IOPAD(0x372C, mode) /* B19: P9.11a: mcasp3_axr0 */
+#define P9_11B(mode) DRA7XX_CORE_IOPAD(0x3620, mode) /* B8: P9.11b: vout1_d17 */
+#define P9_12(mode) DRA7XX_CORE_IOPAD(0x36AC, mode) /* B14: P9.12: mcasp1_aclkr */
+#define P9_13(mode) DRA7XX_CORE_IOPAD(0x3730, mode) /* C17: P9.13: mcasp3_axr1 */
+#define P9_14(mode) DRA7XX_CORE_IOPAD(0x35AC, mode) /* D6: P9.14: vin2a_d17 */
+#define P9_15(mode) DRA7XX_CORE_IOPAD(0x3514, mode) /* AG4: P9.15: vin1a_d8 */
+#define P9_16(mode) DRA7XX_CORE_IOPAD(0x35B0, mode) /* C5: P9.16: vin2a_d18 */
+#define P9_17A(mode) DRA7XX_CORE_IOPAD(0x37CC, mode) /* B24: P9.17a: spi2_cs0 */
+#define P9_17B(mode) DRA7XX_CORE_IOPAD(0x36B8, mode) /* F12: P9.17b: mcasp1_axr1 */
+#define P9_18A(mode) DRA7XX_CORE_IOPAD(0x37C8, mode) /* G17: P9.18a: spi2_d0 */
+#define P9_18B(mode) DRA7XX_CORE_IOPAD(0x36B4, mode) /* G12: P9.18b: mcasp1_axr0 */
+#define P9_19A(mode) DRA7XX_CORE_IOPAD(0x3440, mode) /* R6: P9.19a: gpmc_a0.i2c4_scl */
+#define P9_19B(mode) DRA7XX_CORE_IOPAD(0x357C, mode) /* F4: P9.19b: vin2a_d5.pr1_pru1_gpi2 */
+#define P9_20A(mode) DRA7XX_CORE_IOPAD(0x3444, mode) /* T9: P9.20a: gpmc_a1.i2c4_sda */
+#define P9_20B(mode) DRA7XX_CORE_IOPAD(0x3578, mode) /* D2: P9.20b: vin2a_d4.pr1_pru1_gpi1 */
+#define P9_21A(mode) DRA7XX_CORE_IOPAD(0x34F0, mode) /* AF8: P9.21a: vin1a_vsync0 */
+#define P9_21B(mode) DRA7XX_CORE_IOPAD(0x37C4, mode) /* B22: P9.21b: spi2_d1 */
+#define P9_22A(mode) DRA7XX_CORE_IOPAD(0x369C, mode) /* B26: P9.22a: xref_clk2 */
+#define P9_22B(mode) DRA7XX_CORE_IOPAD(0x37C0, mode) /* A26: P9.22b: spi2_sclk */
+#define P9_23(mode) DRA7XX_CORE_IOPAD(0x37B4, mode) /* A22: P9.23: spi1_cs1 */
+#define P9_24(mode) DRA7XX_CORE_IOPAD(0x368C, mode) /* F20: P9.24: gpio6_15 */
+#define P9_25(mode) DRA7XX_CORE_IOPAD(0x3694, mode) /* D18: P9.25: xref_clk0 */
+#define P9_26A(mode) DRA7XX_CORE_IOPAD(0x3688, mode) /* E21: P9.26a: gpio6_14 */
+#define P9_26B(mode) DRA7XX_CORE_IOPAD(0x3544, mode) /* AE2: P9.26b: vin1a_d20 */
+#define P9_27A(mode) DRA7XX_CORE_IOPAD(0x35A0, mode) /* C3: P9.27a: vin2a_d14 */
+#define P9_27B(mode) DRA7XX_CORE_IOPAD(0x36B0, mode) /* J14: P9.27b: mcasp1_fsr */
+#define P9_28(mode) DRA7XX_CORE_IOPAD(0x36E0, mode) /* A12: P9.28: mcasp1_axr11 */
+#define P9_29A(mode) DRA7XX_CORE_IOPAD(0x36D8, mode) /* A11: P9.29a: mcasp1_axr9 */
+#define P9_29B(mode) DRA7XX_CORE_IOPAD(0x36A8, mode) /* D14: P9.29b: mcasp1_fsx */
+#define P9_30(mode) DRA7XX_CORE_IOPAD(0x36DC, mode) /* B13: P9.30: mcasp1_axr10 */
+#define P9_31A(mode) DRA7XX_CORE_IOPAD(0x36D4, mode) /* B12: P9.31a: mcasp1_axr8 */
+#define P9_31B(mode) DRA7XX_CORE_IOPAD(0x36A4, mode) /* C14: P9.31b: mcasp1_aclkx */
+#define P9_41A(mode) DRA7XX_CORE_IOPAD(0x36A0, mode) /* C23: P9.41a: xref_clk3 */
+#define P9_41B(mode) DRA7XX_CORE_IOPAD(0x3580, mode) /* C1: P9.41b: vin2a_d6 */
+#define P9_42A(mode) DRA7XX_CORE_IOPAD(0x36E4, mode) /* E14: P9.42a: mcasp1_axr12 */
+#define P9_42B(mode) DRA7XX_CORE_IOPAD(0x359C, mode) /* C2: P9.42b: vin2a_d13 */
#endif
\ No newline at end of file
--
GitLab
From 558c2c31dcb1e69a79177f7c9564010323c9a5fc Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Thu, 25 Jun 2020 21:29:18 +0530
Subject: [PATCH 11/86] fix tabs
---
src/arm/am572x-bone-common-univ.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/arm/am572x-bone-common-univ.dtsi b/src/arm/am572x-bone-common-univ.dtsi
index 144e3f07..c7a41103 100644
--- a/src/arm/am572x-bone-common-univ.dtsi
+++ b/src/arm/am572x-bone-common-univ.dtsi
@@ -7,7 +7,7 @@
*/
&dra7_pmx_core {
- /************************/
+ /************************/
/* P8 Header */
/************************/
@@ -2502,4 +2502,4 @@
dir-changeable;
};
};
-};
\ No newline at end of file
+};
--
GitLab
From 86f270ca40b50b25732815a596189b82a4f2b301 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Thu, 25 Jun 2020 21:45:04 +0530
Subject: [PATCH 12/86] add comments and fix tabs
---
src/arm/bbai-bone-buses.dtsi | 38 ++++++++++++++++++------------------
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/src/arm/bbai-bone-buses.dtsi b/src/arm/bbai-bone-buses.dtsi
index e95d818a..aa05d6a1 100644
--- a/src/arm/bbai-bone-buses.dtsi
+++ b/src/arm/bbai-bone-buses.dtsi
@@ -14,7 +14,7 @@
P9_24( PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpio6_15.uart10_txd */
P9_26A( PIN_INPUT_PULLUP | MUX_MODE3) /* gpio6_14.uart10_rxd */
/* unused pins */
- P9_26B( PIN_OUTPUT | MUX_MODE15)
+ P9_26B( PIN_OUTPUT | MUX_MODE15) /* vin1a_d20.off */
>;
};
@@ -23,36 +23,36 @@
P9_21B( PIN_OUTPUT_PULLUP | MUX_MODE1) /* spi2_d1.uart3_txd */
P9_22B( PIN_INPUT_PULLUP | MUX_MODE1) /* spi2_sclk.uart3_rxd */
/* unused pins */
- P9_21A( PIN_OUTPUT | MUX_MODE15)
- P9_22A( PIN_OUTPUT | MUX_MODE15)
+ P9_21A( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.off */
+ P9_22A( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.off */
>;
};
bone_uart_4_pins: pinmux_bone_uart_4_pins {
- pinctrl-single,pins = <
- P9_13( PIN_OUTPUT_PULLUP | MUX_MODE4) /* mcasp3_axr1.uart5_txd */
- P9_11A( PIN_INPUT_PULLUP | MUX_MODE4) /* mcasp3_axr0.uart5_rxd */
- /* unused pins */
- P9_11B( PIN_OUTPUT | MUX_MODE15)
- >;
- };
+ pinctrl-single,pins = <
+ P9_13( PIN_OUTPUT_PULLUP | MUX_MODE4) /* mcasp3_axr1.uart5_txd */
+ P9_11A( PIN_INPUT_PULLUP | MUX_MODE4) /* mcasp3_axr0.uart5_rxd */
+ /* unused pins */
+ P9_11B( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.off */
+ >;
+ };
bone_uart_5_pins: pinmux_bone_uart_5_pins {
pinctrl-single,pins = <
P8_37B( PIN_OUTPUT_PULLUP | MUX_MODE3) /* uart8_txd */
P8_38B( PIN_INPUT_PULLUP | MUX_MODE3) /* uart8_rxd */
/* unused pins */
- P8_37A( PIN_OUTPUT | MUX_MODE15)
- P8_38A( PIN_OUTPUT | MUX_MODE15)
+ P8_37A( PIN_OUTPUT | MUX_MODE15) /* vout1_d8.off */
+ P8_38A( PIN_OUTPUT | MUX_MODE15) /* vout1_d9.off */
>;
};
};
bone_uart_1: &uart10 {
status = "disabled";
- pinctrl-names = "default";
- pinctrl-0 = <&bone_uart_1_pins>;
- symlink = "bone/uart/1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_uart_1_pins>;
+ symlink = "bone/uart/1";
};
bone_uart_2: &uart3 {
@@ -67,10 +67,10 @@ bone_uart_3: &ocp{
};
bone_uart_4: &uart5 {
- status = "disabled";
- pinctrl-names = "default";
- pinctrl-0 = <&bone_uart_4_pins>;
- symlink = "bone/uart/4";
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_uart_4_pins>;
+ symlink = "bone/uart/4";
};
bone_uart_5: &uart8 {
--
GitLab
From 2c22378fbc327580f8bb31e6b43c1fa341795bef Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Thu, 25 Jun 2020 21:45:12 +0530
Subject: [PATCH 13/86] add comments and fix tabs
---
src/arm/bbb-bone-buses.dtsi | 42 ++++++++++++++++++-------------------
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/src/arm/bbb-bone-buses.dtsi b/src/arm/bbb-bone-buses.dtsi
index d80ef33f..15ad68b7 100644
--- a/src/arm/bbb-bone-buses.dtsi
+++ b/src/arm/bbb-bone-buses.dtsi
@@ -11,44 +11,44 @@
&am33xx_pinmux {
bone_uart_1_pins: pinmux_bone_uart_1_pins {
pinctrl-single,pins = <
- P9_24( PIN_OUTPUT_PULLUP | MUX_MODE0)
- P9_26( PIN_INPUT_PULLUP | MUX_MODE0)
+ P9_24( PIN_OUTPUT_PULLUP | MUX_MODE0) /* uart1_txd */
+ P9_26( PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd */
>;
};
bone_uart_2_pins: pinmux_bone_uart_2_pins {
pinctrl-single,pins = <
- P9_21( PIN_OUTPUT_PULLUP | MUX_MODE1)
- P9_22( PIN_INPUT_PULLUP | MUX_MODE1)
+ P9_21( PIN_OUTPUT_PULLUP | MUX_MODE1) /* spi0_d0 */
+ P9_22( PIN_INPUT_PULLUP | MUX_MODE1) /* spi0_sclk */
>;
};
- bone_uart_3_pins: pinmux_bone_uart_3_pins {
+ bone_uart_3_pins: pinmux_bone_uart_3_pins {
pinctrl-single,pins = <
- P9_42A (PIN_OUTPUT_PULLUP | MUX_MODE1)
+ P9_42A (PIN_OUTPUT_PULLUP | MUX_MODE1) /* P0_in_PWM0_out */
>;
};
bone_uart_4_pins: pinmux_bone_uart_4_pins {
- pinctrl-single,pins = <
- P9_13(PIN_OUTPUT_PULLUP | MUX_MODE6)
- P9_11(PIN_OUTPUT_PULLUP | MUX_MODE6)
- >;
- };
+ pinctrl-single,pins = <
+ P9_13(PIN_OUTPUT_PULLUP | MUX_MODE6) /* gpmc_wpn */
+ P9_11(PIN_OUTPUT_PULLUP | MUX_MODE6) /* gpmc_wait0 */
+ >;
+ };
bone_uart_5_pins: pinmux_bone_uart_5_pins {
pinctrl-single,pins = <
- P8_37( PIN_OUTPUT_PULLUP | MUX_MODE4)
- P8_38( PIN_INPUT_PULLUP | MUX_MODE4)
+ P8_37( PIN_OUTPUT_PULLUP | MUX_MODE4) /* lcd_data8 */
+ P8_38( PIN_INPUT_PULLUP | MUX_MODE4) /* lcd_data9 */
>;
};
};
bone_uart_1: &uart1 {
status = "disabled";
- pinctrl-names = "default";
- pinctrl-0 = <&bone_uart_1_pins>;
- symlink = "bone/uart/1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_uart_1_pins>;
+ symlink = "bone/uart/1";
};
bone_uart_2: &uart2 {
@@ -66,10 +66,10 @@ bone_uart_3: &uart3 {
};
bone_uart_4: &uart4 {
- status = "disabled";
- pinctrl-names = "default";
- pinctrl-0 = <&bone_uart_4_pins>;
- symlink = "bone/uart/4";
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_uart_4_pins>;
+ symlink = "bone/uart/4";
};
bone_uart_5: &uart5 {
@@ -77,4 +77,4 @@ bone_uart_5: &uart5 {
pinctrl-names = "default";
pinctrl-0 = <&bone_uart_5_pins>;
symlink = "bone/uart/5";
-};
\ No newline at end of file
+};
--
GitLab
From 83a5b91151211b26cf574aac40ed4d4cbdac1832 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Sat, 27 Jun 2020 12:00:19 +0530
Subject: [PATCH 14/86] fix symlink
---
src/arm/am5729-beagleboneai.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/arm/am5729-beagleboneai.dts b/src/arm/am5729-beagleboneai.dts
index b8086f2c..4136aac6 100644
--- a/src/arm/am5729-beagleboneai.dts
+++ b/src/arm/am5729-beagleboneai.dts
@@ -1177,7 +1177,7 @@
&i2c4 {
status = "okay";
clock-frequency = <100000>;
- symlink = "bone-i2c2";
+ symlink = "bone/i2c/2";
};
/* thermal hacks */
--
GitLab
From ab7d9bf38aa7c9fe058f0c72b4f47718df566640 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Sat, 27 Jun 2020 12:00:51 +0530
Subject: [PATCH 15/86] add BBAI /bone/i2c
---
src/arm/bbai-bone-buses.dtsi | 58 ++++++++++++++++++++++++++++++++++++
1 file changed, 58 insertions(+)
diff --git a/src/arm/bbai-bone-buses.dtsi b/src/arm/bbai-bone-buses.dtsi
index aa05d6a1..649d1bd0 100644
--- a/src/arm/bbai-bone-buses.dtsi
+++ b/src/arm/bbai-bone-buses.dtsi
@@ -9,6 +9,7 @@
#include <dt-bindings/board/am572x-bbai-pins.h>
&dra7_pmx_core {
+ // Uarts
bone_uart_1_pins: pinmux_bone_uart_1_pins {
pinctrl-single,pins = <
P9_24( PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpio6_15.uart10_txd */
@@ -46,8 +47,39 @@
P8_38A( PIN_OUTPUT | MUX_MODE15) /* vout1_d9.off */
>;
};
+
+ // I2Cs
+ bone_i2c_1_pins: pinmux_bone_i2c_1_pins {
+ pinctrl-single,pins = <
+ P9_18B( PIN_INPUT_PULLUP | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
+ P9_17B( PIN_INPUT_PULLUP | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
+ /* unused pins */
+ P9_18A( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.off */
+ P9_17A( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.off */
+ >;
+ };
+
+ bone_i2c_2_pins: pinmux_bone_i2c_2_pins {
+ pinctrl-single,pins = <
+ P9_20A( PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a1.i2c4_sda */
+ P9_19A( PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a0.i2c4_scl */
+ /* unused pins */
+ P9_20B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d4.off */
+ P9_19B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d5.off */
+ >;
+ };
+
+ bone_i2c_3_pins: pinmux_bone_i2c_3_pins {
+ pinctrl-single,pins = <
+ P9_26A( PIN_INPUT_PULLUP | MUX_MODE9) /* gpio6_14.i2c3_sda */
+ P9_24( PIN_INPUT_PULLUP | MUX_MODE9) /* gpio6_15.i2c3_scl */
+ /* unused pins*/
+ P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.off */
+ >;
+ };
};
+// UARTs
bone_uart_1: &uart10 {
status = "disabled";
pinctrl-names = "default";
@@ -78,4 +110,30 @@ bone_uart_5: &uart8 {
pinctrl-names = "default";
pinctrl-0 = <&bone_uart_5_pins>;
symlink = "bone/uart/5";
+};
+
+// I2Cs
+bone_i2c_1: &i2c5 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_i2c_1_pins>;
+ symlink = "bone/i2c/1";
+};
+
+bone_i2c_2: &i2c4 {
+ // status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_i2c_2_pins>;
+ // symlink = "bone/i2c/2";
+};
+
+bone_i2c_2a: &ocp {
+ // Not available
+};
+
+bone_i2c_3: &i2c3 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_i2c_3_pins>;
+ symlink = "bone/i2c/3";
};
\ No newline at end of file
--
GitLab
From 161efeed9f8fd6b475fc1d8a75ff6ee9be050c7d Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Sat, 27 Jun 2020 12:01:01 +0530
Subject: [PATCH 16/86] add BBB /bone/i2c
---
src/arm/bbb-bone-buses.dtsi | 66 ++++++++++++++++++++++++++++++++++++-
1 file changed, 65 insertions(+), 1 deletion(-)
diff --git a/src/arm/bbb-bone-buses.dtsi b/src/arm/bbb-bone-buses.dtsi
index 15ad68b7..c510ebf7 100644
--- a/src/arm/bbb-bone-buses.dtsi
+++ b/src/arm/bbb-bone-buses.dtsi
@@ -9,7 +9,8 @@
#include <dt-bindings/board/am335x-bbb-pins.h>
&am33xx_pinmux {
-bone_uart_1_pins: pinmux_bone_uart_1_pins {
+ // UARTs
+ bone_uart_1_pins: pinmux_bone_uart_1_pins {
pinctrl-single,pins = <
P9_24( PIN_OUTPUT_PULLUP | MUX_MODE0) /* uart1_txd */
P9_26( PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd */
@@ -42,8 +43,40 @@ bone_uart_1_pins: pinmux_bone_uart_1_pins {
P8_38( PIN_INPUT_PULLUP | MUX_MODE4) /* lcd_data9 */
>;
};
+
+ // I2Cs
+ bone_i2c_1_pins: pinmux_bone_i2c_1_pins {
+ pinctrl-single,pins = <
+ P9_18( SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
+ P9_17( SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
+ >;
+ };
+
+ bone_i2c_2_pins: pinmux_bone_i2c_2_pins {
+ pinctrl-single,pins = <
+ P9_20( SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
+ P9_19( SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
+ >;
+ };
+
+ // use only when bone_i2c_2 is not in use
+ bone_i2c_2a_pins: pinmux_bone_i2c_2a_pins {
+ pinctrl-single,pins = <
+ P9_22( SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_sclk.i2c2_sda */
+ P9_21( SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d0.i2c2_scl */
+ >;
+ };
+
+ // use only when bone_i2c_1 is not in use
+ bone_i2c_3_pins: pinmux_bone_i2c_3_pins {
+ pinctrl-single,pins = <
+ P9_26( SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rxd.i2c1_sda */
+ P9_24( SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_txd.i2c1_scl */
+ >;
+ };
};
+// UARTs
bone_uart_1: &uart1 {
status = "disabled";
pinctrl-names = "default";
@@ -78,3 +111,34 @@ bone_uart_5: &uart5 {
pinctrl-0 = <&bone_uart_5_pins>;
symlink = "bone/uart/5";
};
+
+// I2Cs
+bone_i2c_1: &i2c1 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_i2c_1_pins>;
+ symlink = "bone/i2c/1";
+};
+
+bone_i2c_2: &i2c2 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_i2c_2_pins>;
+ symlink = "bone/i2c/2";
+};
+
+// use only when bone_i2c_2 is not in use
+bone_i2c_2a: &i2c2 {
+ // status = "disabled";
+ // pinctrl-names = "default";
+ // pinctrl-0 = <&bone_i2c_2a_pins>;
+ // symlink = "bone/i2c/2a";
+};
+
+// use only when bone_i2c_1 is not in use
+bone_i2c_3: &i2c1 {
+ // status = "disabled";
+ // pinctrl-names = "default";
+ // pinctrl-0 = <&bone_i2c_3_pins>;
+ // symlink = "bone/i2c/3";
+};
\ No newline at end of file
--
GitLab
From d4caaff2cf855ebde0dbf2e319220c7767c6b9c8 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Tue, 30 Jun 2020 07:13:34 +0530
Subject: [PATCH 17/86] add BBAI /bone/spi
---
src/arm/bbai-bone-buses.dtsi | 98 ++++++++++++++++++++++++++++++++++--
1 file changed, 93 insertions(+), 5 deletions(-)
diff --git a/src/arm/bbai-bone-buses.dtsi b/src/arm/bbai-bone-buses.dtsi
index 649d1bd0..c7a0c20b 100644
--- a/src/arm/bbai-bone-buses.dtsi
+++ b/src/arm/bbai-bone-buses.dtsi
@@ -54,8 +54,8 @@
P9_18B( PIN_INPUT_PULLUP | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
P9_17B( PIN_INPUT_PULLUP | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
/* unused pins */
- P9_18A( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.off */
- P9_17A( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.off */
+ P9_18A( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.off */
+ P9_17A( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.off */
>;
};
@@ -64,8 +64,8 @@
P9_20A( PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a1.i2c4_sda */
P9_19A( PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a0.i2c4_scl */
/* unused pins */
- P9_20B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d4.off */
- P9_19B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d5.off */
+ P9_20B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d4.off */
+ P9_19B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d5.off */
>;
};
@@ -74,7 +74,40 @@
P9_26A( PIN_INPUT_PULLUP | MUX_MODE9) /* gpio6_14.i2c3_sda */
P9_24( PIN_INPUT_PULLUP | MUX_MODE9) /* gpio6_15.i2c3_scl */
/* unused pins*/
- P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.off */
+ P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.off */
+ >;
+ };
+
+ // SPIs
+ bone_spi_0_pins: pinmux_bone_spi_0_pins {
+ pinctrl-single,pins = <
+ P9_22B( PIN_INPUT | MUX_MODE0) /* spi2_sclk.spi2_sclk */
+ P9_21B( PIN_INPUT | MUX_MODE0) /* spi2_d1.spi2_d1 */
+ P9_18A( PIN_INPUT | MUX_MODE0) /* spi2_d0.spi2_d0 */
+ P9_17A( PIN_INPUT | MUX_MODE0) /* spi2_cs0.spi2_cs0 */
+ /* unused pins */
+ P9_22A( PIN_INPUT | MUX_MODE15) /* xref_clk2.off */
+ P9_21A( PIN_INPUT | MUX_MODE15) /* vin1a_vsync0.off */
+ P9_18B( PIN_INPUT | MUX_MODE15) /* mcasp1_axr0.off */
+ P9_17B( PIN_INPUT | MUX_MODE15) /* mcasp1_axr1.off */
+ >;
+ };
+
+ bone_spi_1_pins: pinmux_bone_spi_1_pins {
+ pinctrl-single,pins = <
+ P9_31A( PIN_INPUT | MUX_MODE3) /* mcasp1_axr8.spi3_sclk */
+ P9_29A( PIN_INPUT | MUX_MODE3) /* mcasp1_axr9.spi3_d1 */
+ P9_30( PIN_INPUT | MUX_MODE3) /* mcasp1_axr10.spi3_d0 */
+ P9_28( PIN_INPUT | MUX_MODE3) /* mcasp1_axr11.spi3_cs0 */
+ P9_42A( PIN_INPUT | MUX_MODE3) /* mcasp1_axr12.spi3_cs1 */
+ // P8_45A( PIN_INPUT | MUX_MODE8) /* vout1_d0.spi3_cs2 */
+ // P8_46B( PIN_INPUT | MUX_MODE8) /* vout1_d23.spi3_cs3 */
+ /* unused pins */
+ P9_31B( PIN_INPUT | MUX_MODE15) /* mcasp1_axr8.off */
+ P9_29B( PIN_INPUT | MUX_MODE15) /* mcasp1_axr9.off */
+ P9_42B( PIN_INPUT | MUX_MODE15) /* vin2a_d13.off */
+ // P8_45B( PIN_INPUT | MUX_MODE8) /* vout1_d16.off */
+ // P8_46A( PIN_INPUT | MUX_MODE8) /* vout1_d1.off */
>;
};
};
@@ -136,4 +169,59 @@ bone_i2c_3: &i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&bone_i2c_3_pins>;
symlink = "bone/i2c/3";
+};
+
+// SPIs
+bone_spi_0: &mcspi2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_spi_0_pins>;
+
+ channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+ symlink = "/bone/spi/0.0";
+
+ reg = <0>;
+ spi-max-frequency = <16000000>;
+ spi-cpha;
+ };
+};
+
+bone_spi_1: &mcspi3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_spi_1_pins>;
+ ti,pio-mode; /* disable dma when used as an overlay, dma gets stuck at 160 bits... */
+
+ channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+ symlink = "/bone/spi/1.0";
+
+ reg = <0>;
+ spi-max-frequency = <16000000>;
+ spi-cpha;
+ };
+
+ channel@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+ symlink = "/bone/spi/1.1";
+
+ reg = <1>;
+ spi-max-frequency = <16000000>;
+ };
};
\ No newline at end of file
--
GitLab
From 325f881dc6196442e0d31ae158f62fcad868980c Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Tue, 30 Jun 2020 07:13:54 +0530
Subject: [PATCH 18/86] add BBB /bone/spi
---
src/arm/bbb-bone-buses.dtsi | 76 +++++++++++++++++++++++++++++++++++++
1 file changed, 76 insertions(+)
diff --git a/src/arm/bbb-bone-buses.dtsi b/src/arm/bbb-bone-buses.dtsi
index c510ebf7..3288fd67 100644
--- a/src/arm/bbb-bone-buses.dtsi
+++ b/src/arm/bbb-bone-buses.dtsi
@@ -74,6 +74,27 @@
P9_24( SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_txd.i2c1_scl */
>;
};
+
+ // SPIs
+ bone_spi_0_pins: pinmux_bone_spi_0_pins {
+ pinctrl-single,pins = <
+ P9_22( PIN_INPUT | MUX_MODE0) /* spi0_sclk.spi0_sclk */
+ P9_21( PIN_INPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */
+ P9_18( PIN_INPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */
+ P9_17( PIN_INPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
+ >;
+ };
+
+ bone_spi_1_pins: pinmux_bone_spi_1_pins {
+ pinctrl-single,pins = <
+ P9_31( PIN_INPUT | MUX_MODE3) /* mcasp0_aclkx.spi1_sclk */
+ P9_29( PIN_INPUT | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */
+ P9_30( PIN_INPUT | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */
+ P9_28( PIN_INPUT | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */
+ P9_42A( PIN_INPUT | MUX_MODE2) /* eCAP0_in_PWM0_out.spi1_cs1 */
+ >;
+ };
+
};
// UARTs
@@ -141,4 +162,59 @@ bone_i2c_3: &i2c1 {
// pinctrl-names = "default";
// pinctrl-0 = <&bone_i2c_3_pins>;
// symlink = "bone/i2c/3";
+};
+
+// SPIs
+bone_spi_0: &spi0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_spi_0_pins>;
+
+ channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+ symlink = "/bone/spi/0.0";
+
+ reg = <0>;
+ spi-max-frequency = <16000000>;
+ spi-cpha;
+ };
+};
+
+bone_spi_1: &spi1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bone_spi_1_pins>;
+ ti,pio-mode; /* disable dma when used as an overlay, dma gets stuck at 160 bits... */
+
+ channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+ symlink = "/bone/spi/1.0";
+
+ reg = <0>;
+ spi-max-frequency = <16000000>;
+ spi-cpha;
+ };
+
+ channel@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+ symlink = "/bone/spi/1.1";
+
+ reg = <1>;
+ spi-max-frequency = <16000000>;
+ };
};
\ No newline at end of file
--
GitLab
From 6eeb08558746a96317c2391a851f0782738a90f5 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Mon, 6 Jul 2020 18:36:54 +0530
Subject: [PATCH 19/86] add P9_13B pin
---
include/dt-bindings/board/am572x-bbai-pins.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/dt-bindings/board/am572x-bbai-pins.h b/include/dt-bindings/board/am572x-bbai-pins.h
index 8dc647e5..c2639592 100644
--- a/include/dt-bindings/board/am572x-bbai-pins.h
+++ b/include/dt-bindings/board/am572x-bbai-pins.h
@@ -71,7 +71,8 @@
#define P9_11A(mode) DRA7XX_CORE_IOPAD(0x372C, mode) /* B19: P9.11a: mcasp3_axr0 */
#define P9_11B(mode) DRA7XX_CORE_IOPAD(0x3620, mode) /* B8: P9.11b: vout1_d17 */
#define P9_12(mode) DRA7XX_CORE_IOPAD(0x36AC, mode) /* B14: P9.12: mcasp1_aclkr */
-#define P9_13(mode) DRA7XX_CORE_IOPAD(0x3730, mode) /* C17: P9.13: mcasp3_axr1 */
+#define P9_13A(mode) DRA7XX_CORE_IOPAD(0x3730, mode) /* C17: P9.13a: mcasp3_axr1 */
+#define P9_13B(mode) DRA7XX_CORE_IOPAD(0x3680, mode) /* AB10: P9.13b: usb1_drvvbus */
#define P9_14(mode) DRA7XX_CORE_IOPAD(0x35AC, mode) /* D6: P9.14: vin2a_d17 */
#define P9_15(mode) DRA7XX_CORE_IOPAD(0x3514, mode) /* AG4: P9.15: vin1a_d8 */
#define P9_16(mode) DRA7XX_CORE_IOPAD(0x35B0, mode) /* C5: P9.16: vin2a_d18 */
--
GitLab
From 857630e6e4718e4f4dfab10082913cce79b2cf0b Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Mon, 6 Jul 2020 18:37:47 +0530
Subject: [PATCH 20/86] update nodes to use new easy pinmuxing MACROs
---
src/arm/am572x-bone-common-univ.dtsi | 874 ++++++++++++++-------------
1 file changed, 438 insertions(+), 436 deletions(-)
diff --git a/src/arm/am572x-bone-common-univ.dtsi b/src/arm/am572x-bone-common-univ.dtsi
index c7a41103..dc109547 100644
--- a/src/arm/am572x-bone-common-univ.dtsi
+++ b/src/arm/am572x-bone-common-univ.dtsi
@@ -6,6 +6,8 @@
* published by the Free Software Foundation.
*/
+#include <dt-bindings/board/am572x-bbai-pins.h>
+
&dra7_pmx_core {
/************************/
/* P8 Header */
@@ -18,665 +20,665 @@
/* P8_03 (ball AB8) gpio1_24 */
P8_03_default_pin: pinmux_P8_03_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
P8_03_gpio_pin: pinmux_P8_03_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
P8_03_gpio_pu_pin: pinmux_P8_03_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
P8_03_gpio_pd_pin: pinmux_P8_03_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x379C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
P8_03_gpio_input_pin: pinmux_P8_03_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x379C, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
/* P8_04 (ball AB5) gpio1_25 */
P8_04_default_pin: pinmux_P8_04_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
P8_04_gpio_pin: pinmux_P8_04_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
P8_04_gpio_pu_pin: pinmux_P8_04_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
P8_04_gpio_pd_pin: pinmux_P8_04_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
P8_04_gpio_input_pin: pinmux_P8_04_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37A0, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
/* P8_05 (ball AC9) gpio7_1 */
P8_05_default_pin: pinmux_P8_05_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
P8_05_gpio_pin: pinmux_P8_05_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
P8_05_gpio_pu_pin: pinmux_P8_05_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
P8_05_gpio_pd_pin: pinmux_P8_05_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x378C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
P8_05_gpio_input_pin: pinmux_P8_05_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x378C, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
/* P8_06 (ball AC3) gpio7_2 */
P8_06_default_pin: pinmux_P8_06_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
P8_06_gpio_pin: pinmux_P8_06_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
P8_06_gpio_pu_pin: pinmux_P8_06_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
P8_06_gpio_pd_pin: pinmux_P8_06_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3790, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
P8_06_gpio_input_pin: pinmux_P8_06_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3790, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
/* P8_07 (ball G14) gpio6_5*/
P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
P8_07_gpio_pin: pinmux_P8_07_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
P8_07_gpio_pd_pin: pinmux_P8_07_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
P8_07_gpio_input_pin: pinmux_P8_07_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36EC, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
P8_07_timer_pin: pinmux_P8_07_timer_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr14.timer11 */
+ P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr14.timer11 */
/* P8_08 (ball F14) gpio6_6 */
P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
P8_08_gpio_pin: pinmux_P8_08_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
P8_08_gpio_input_pin: pinmux_P8_08_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36F0, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
P8_08_timer_pin: pinmux_P8_08_timer_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr15.timer12 */
+ P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr15.timer12 */
/* P8_09 (ball E17) gpio6_18 */
P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
+ P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
P8_09_gpio_pin: pinmux_P8_09_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
+ P8_09( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
+ P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
P8_09_gpio_pd_pin: pinmux_P8_09_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
+ P8_09( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
P8_09_gpio_input_pin: pinmux_P8_09_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3698, PIN_INPUT | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
+ P8_09( PIN_INPUT | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
P8_09_timer_pin: pinmux_P8_09_timer_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* xref_clk1.timer14 */
+ P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* xref_clk1.timer14 */
/* P8_10 (ball A13) gpio6_4 */
P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
P8_10_gpio_pin: pinmux_P8_10_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
P8_10_gpio_pd_pin: pinmux_P8_10_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
P8_10_gpio_input_pin: pinmux_P8_10_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E8, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
P8_10_timer_pin: pinmux_P8_10_timer_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr13.timer10 */
+ P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr13.timer10 */
/* P8_11 (ball AH4) gpio3_11 */
P8_11_default_pin: pinmux_P8_11_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
+ P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
P8_11_gpio_pin: pinmux_P8_11_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
+ P8_11( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
P8_11_gpio_pu_pin: pinmux_P8_11_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
+ P8_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
P8_11_gpio_pd_pin: pinmux_P8_11_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
+ P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
P8_11_gpio_input_pin: pinmux_P8_11_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
+ P8_11( PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
P8_11_qep_pin: pinmux_P8_11_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_d7.eQEP2B_in */
+ P8_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_d7.eQEP2B_in */
P8_11_pruout_pin: pinmux_P8_11_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3510, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d7.pr1_pru0_gpo4 */
+ P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d7.pr1_pru0_gpo4 */
/* P8_12 (ball AG6) gpio3_10 */
P8_12_default_pin: pinmux_P8_12_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
+ P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
P8_12_gpio_pin: pinmux_P8_12_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
+ P8_12( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
P8_12_gpio_pu_pin: pinmux_P8_12_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
+ P8_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
P8_12_gpio_pd_pin: pinmux_P8_12_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
+ P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
P8_12_gpio_input_pin: pinmux_P8_12_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
+ P8_12( PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
P8_12_qep_pin: pinmux_P8_12_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_d6.eQEP2A_in */
+ P8_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_d6.eQEP2A_in */
P8_12_pruout_pin: pinmux_P8_12_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x350C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d6.pr1_pru0_gpo3 */
+ P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d6.pr1_pru0_gpo3 */
/* P8_13 (ball D3) gpio4_11 */
P8_13_default_pin: pinmux_P8_13_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
+ P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
P8_13_gpio_pin: pinmux_P8_13_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
+ P8_13( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
P8_13_gpio_pu_pin: pinmux_P8_13_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
+ P8_13( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
P8_13_gpio_pd_pin: pinmux_P8_13_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
+ P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
P8_13_gpio_input_pin: pinmux_P8_13_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
+ P8_13( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
P8_13_pwm_pin: pinmux_P8_13_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3590, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d10.ehrpwm2B */
+ P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d10.ehrpwm2B */
/* P8_14 (ball D5) gpio4_13*/
P8_14_default_pin: pinmux_P8_14_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
+ P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
P8_14_gpio_pin: pinmux_P8_14_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
+ P8_14( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
P8_14_gpio_pu_pin: pinmux_P8_14_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
+ P8_14( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
P8_14_gpio_pd_pin: pinmux_P8_14_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
+ P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
P8_14_gpio_input_pin: pinmux_P8_14_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
+ P8_14( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
P8_14_pwm_pin: pinmux_P8_14_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d12.eCAP2_in_PWM2_out */
+ P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d12.eCAP2_in_PWM2_out */
/* P8_15a (ball D1) gpio4_3*/
P8_15_default_pin: pinmux_P8_15_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
+ P8_15A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
P8_15_gpio_pin: pinmux_P8_15_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
+ P8_15A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
+ P8_15A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
+ P8_15A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
P8_15_gpio_input_pin: pinmux_P8_15_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3570, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
+ P8_15A( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
P8_15_pru_ecap_pin: pinmux_P8_15_pru_ecap_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3570, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE11) >; }; /* vin2a_d2.pr1_ecap0_ecap_capin_apwm_o */
+ P8_15A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE11) >; }; /* vin2a_d2.pr1_ecap0_ecap_capin_apwm_o */
/* P8_15b (ball A3) gpio4_27 */
P8_15_pruin_pin: pinmux_P8_15_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B4, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d19.pr1_pru1_gpi16*/
+ P8_15B( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d19.pr1_pru1_gpi16*/
/* P8_16 (ball B4) gpio4_29 */
P8_16_default_pin: pinmux_P8_16_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
+ P8_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
P8_16_gpio_pin: pinmux_P8_16_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
+ P8_16( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
P8_16_gpio_pu_pin: pinmux_P8_16_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
+ P8_16( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
P8_16_gpio_pd_pin: pinmux_P8_16_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35BC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
+ P8_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
P8_16_gpio_input_pin: pinmux_P8_16_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35BC, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
+ P8_16( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
P8_16_pruin_pin: pinmux_P8_16_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35BC, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d21.pr1_pru1_gpi18 */
+ P8_16( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d21.pr1_pru1_gpi18 */
/* P8_17 (ball A7) gpio8_18 */
P8_17_default_pin: pinmux_P8_17_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
+ P8_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
P8_17_gpio_pin: pinmux_P8_17_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
+ P8_17( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
P8_17_gpio_pu_pin: pinmux_P8_17_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
+ P8_17( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
P8_17_gpio_pd_pin: pinmux_P8_17_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3624, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
+ P8_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
P8_17_gpio_input_pin: pinmux_P8_17_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3624, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
+ P8_17( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
/* P8_18 (ball F5) gpio4_9 */
P8_18_default_pin: pinmux_P8_18_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
+ P8_18( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
P8_18_gpio_pin: pinmux_P8_18_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
+ P8_18( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
P8_18_gpio_pu_pin: pinmux_P8_18_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
+ P8_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
P8_18_gpio_pd_pin: pinmux_P8_18_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
+ P8_18( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
P8_18_gpio_input_pin: pinmux_P8_18_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3588, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
+ P8_18( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
P8_18_qep_pin: pinmux_P8_18_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3588, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d8.eQEP2_strobe */
+ P8_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d8.eQEP2_strobe */
/* P8_19 (ball E6) gpio4_10 */
P8_19_default_pin: pinmux_P8_19_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
+ P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
P8_19_gpio_pin: pinmux_P8_19_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
+ P8_19( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
P8_19_gpio_pu_pin: pinmux_P8_19_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
+ P8_19( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
P8_19_gpio_pd_pin: pinmux_P8_19_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
+ P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
P8_19_gpio_input_pin: pinmux_P8_19_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x358C, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
+ P8_19( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
P8_19_pwm_pin: pinmux_P8_19_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x358C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d9.ehrpwm2A */
+ P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d9.ehrpwm2A */
/* P8_20 (ball AC4) gpio6_30 */
P8_20_default_pin: pinmux_P8_20_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
P8_20_gpio_pin: pinmux_P8_20_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
P8_20_gpio_pu_pin: pinmux_P8_20_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
P8_20_gpio_pd_pin: pinmux_P8_20_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
P8_20_gpio_input_pin: pinmux_P8_20_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
P8_20_pruout_pin: pinmux_P8_20_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_cmd.pr2_pru0_gpo3 */
+ P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_cmd.pr2_pru0_gpo3 */
P8_20_pruin_pin: pinmux_P8_20_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3780, PIN_INPUT | MUX_MODE12) >; }; /* mmc3_cmd.pr2_pru0_gpi3 */
+ P8_20( PIN_INPUT | MUX_MODE12) >; }; /* mmc3_cmd.pr2_pru0_gpi3 */
/* P8_21 (ball AD4) gpio6_29 */
P8_21_default_pin: pinmux_P8_21_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
+ P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
P8_21_gpio_pin: pinmux_P8_21_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
+ P8_21( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
P8_21_gpio_pu_pin: pinmux_P8_21_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
+ P8_21( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
P8_21_gpio_pd_pin: pinmux_P8_21_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
+ P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
P8_21_gpio_input_pin: pinmux_P8_21_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
+ P8_21( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
P8_21_pruout_pin: pinmux_P8_21_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_clk.pr2_pru0_gpo2 */
+ P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_clk.pr2_pru0_gpo2 */
P8_21_pruin_pin: pinmux_P8_21_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x377C, PIN_INPUT | MUX_MODE12) >; }; /* mmc3_clk.pr2_pru0_gpi2 */
+ P8_21( PIN_INPUT | MUX_MODE12) >; }; /* mmc3_clk.pr2_pru0_gpi2 */
/* P8_22 (ball AD6) gpio1_23 */
P8_22_default_pin: pinmux_P8_22_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
P8_22_gpio_pin: pinmux_P8_22_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
P8_22_gpio_pu_pin: pinmux_P8_22_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
P8_22_gpio_pd_pin: pinmux_P8_22_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3798, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
P8_22_gpio_input_pin: pinmux_P8_22_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3798, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
/* P8_23 (ball AC8) gpio1_22 */
P8_23_default_pin: pinmux_P8_23_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
P8_23_gpio_pin: pinmux_P8_23_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
P8_23_gpio_pu_pin: pinmux_P8_23_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
P8_23_gpio_pd_pin: pinmux_P8_23_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3794, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
P8_23_gpio_input_pin: pinmux_P8_23_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3794, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
/* P8_24 (ball AC6) gpio7_0 */
P8_24_default_pin: pinmux_P8_24_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
P8_24_gpio_pin: pinmux_P8_24_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
P8_24_gpio_pu_pin: pinmux_P8_24_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
P8_24_gpio_pd_pin: pinmux_P8_24_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3788, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
P8_24_gpio_input_pin: pinmux_P8_24_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3788, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
/* P8_25 (ball AC7) gpio6_31 */
P8_25_default_pin: pinmux_P8_25_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
P8_25_gpio_pin: pinmux_P8_25_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
P8_25_gpio_pu_pin: pinmux_P8_25_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
P8_25_gpio_pd_pin: pinmux_P8_25_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3784, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
P8_25_gpio_input_pin: pinmux_P8_25_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3784, PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
/* P8_26 (ball B3) gpio4_28 */
P8_26_default_pin: pinmux_P8_26_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
+ P8_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
P8_26_gpio_pin: pinmux_P8_26_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
+ P8_26( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
P8_26_gpio_pu_pin: pinmux_P8_26_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
+ P8_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
P8_26_gpio_pd_pin: pinmux_P8_26_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
+ P8_26( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
P8_26_gpio_input_pin: pinmux_P8_26_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B8, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
+ P8_26( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
/* P8_27a (ball E11) gpio4_23 */
P8_27_default_pin: pinmux_P8_27_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
+ P8_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
P8_27_gpio_pin: pinmux_P8_27_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
+ P8_27A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
P8_27_gpio_pu_pin: pinmux_P8_27_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
+ P8_27A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
P8_27_gpio_pd_pin: pinmux_P8_27_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
+ P8_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
P8_27_gpio_input_pin: pinmux_P8_27_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D8, PIN_INPUT | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
+ P8_27A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
/* P8_27b (ball A8) gpio8_19 */
P8_27_pruout_pin: pinmux_P8_27_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3628, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d19.pr2_pru0_gpo16 */
+ P8_27B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d19.pr2_pru0_gpo16 */
P8_27_pruin_pin: pinmux_P8_27_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3628, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d19.pr2_pru0_gpi16 */
+ P8_27B( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d19.pr2_pru0_gpi16 */
/* P8_28a (ball D11) gpio4_19 */
P8_28_default_pin: pinmux_P8_28_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
+ P8_28A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
P8_28_gpio_pin: pinmux_P8_28_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
+ P8_28A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
P8_28_gpio_pu_pin: pinmux_P8_28_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
+ P8_28A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
P8_28_gpio_pd_pin: pinmux_P8_28_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35C8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
+ P8_28A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
P8_28_gpio_input_pin: pinmux_P8_28_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35C8, PIN_INPUT | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
+ P8_28A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
/* P8_28b (ball C9) gpio8_20 */
P8_28_pruout_pin: pinmux_P8_28_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x362C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d20.pr2_pru0_gpo17 */
+ P8_28B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d20.pr2_pru0_gpo17 */
P8_28_pruin_pin: pinmux_P8_28_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x362C, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d20.pr2_pru0_gpi17 */
+ P8_28B( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d20.pr2_pru0_gpi17 */
/* P8_29a (ball C11) gpio4_22 */
P8_29_default_pin: pinmux_P8_29_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
+ P8_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
P8_29_gpio_pin: pinmux_P8_29_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
+ P8_29A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
P8_29_gpio_pu_pin: pinmux_P8_29_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
+ P8_29A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
P8_29_gpio_pd_pin: pinmux_P8_29_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
+ P8_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
P8_29_gpio_input_pin: pinmux_P8_29_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35D4, PIN_INPUT | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
+ P8_29A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
/* P8_29b (ball A9) gpio8_21 */
P8_29_pruout_pin: pinmux_P8_29_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3630, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d21.pr2_pru0_gpo18 */
+ P8_29B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d21.pr2_pru0_gpo18 */
P8_29_pruin_pin: pinmux_P8_29_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3630, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d21.pr2_pru0_gpi18 */
+ P8_29B( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d21.pr2_pru0_gpi18 */
/* P8_30a (ball B10) gpio4_20 */
P8_30_default_pin: pinmux_P8_30_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
+ P8_30A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
P8_30_gpio_pin: pinmux_P8_30_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
+ P8_30A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
P8_30_gpio_pu_pin: pinmux_P8_30_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
+ P8_30A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
P8_30_gpio_pd_pin: pinmux_P8_30_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35CC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
+ P8_30A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
P8_30_gpio_input_pin: pinmux_P8_30_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35CC, PIN_INPUT | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
+ P8_30A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
/* P8_30b (ball B9) gpio8_22 */
P8_30_pruout_pin: pinmux_P8_30_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3634, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d22.pr2_pru0_gpo19 */
+ P8_30B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d22.pr2_pru0_gpo19 */
P8_30_pruin_pin: pinmux_P8_30_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3634, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d22.pr2_pru0_gpi19 */
+ P8_30B( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d22.pr2_pru0_gpi19 */
/* P8_31a (ball C8) gpio8_14 */
P8_31_default_pin: pinmux_P8_31_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
+ P8_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
P8_31_gpio_pin: pinmux_P8_31_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
+ P8_31A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
P8_31_gpio_pu_pin: pinmux_P8_31_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
+ P8_31A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
P8_31_gpio_pd_pin: pinmux_P8_31_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3614, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
+ P8_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
P8_31_gpio_input_pin: pinmux_P8_31_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3614, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
+ P8_31A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
/* P8_31b (ball G16) */
P8_31_uart_pin: pinmux_P8_31_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x373C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp4_axr0.uart4_rxd */
+ P8_31B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp4_axr0.uart4_rxd */
/* P8_32a (ball C7) gpio8_15 */
P8_32_default_pin: pinmux_P8_32_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
+ P8_32A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
P8_32_gpio_pin: pinmux_P8_32_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
+ P8_32A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
P8_32_gpio_pu_pin: pinmux_P8_32_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
+ P8_32A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
P8_32_gpio_pd_pin: pinmux_P8_32_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3618, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
+ P8_32A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
P8_32_gpio_input_pin: pinmux_P8_32_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3618, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
+ P8_32A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
/* P8_32b (ball D17) */
P8_32_uart_pin: pinmux_P8_32_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3740, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp4_axr1.uart4_txd */
+ P8_32B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp4_axr1.uart4_txd */
/* P8_33a (ball C6) gpio8_13 */
P8_33_default_pin: pinmux_P8_33_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
+ P8_33A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
P8_33_gpio_pin: pinmux_P8_33_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
+ P8_33A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
P8_33_gpio_pu_pin: pinmux_P8_33_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
+ P8_33A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
P8_33_gpio_pd_pin: pinmux_P8_33_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3610, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
+ P8_33A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
P8_33_gpio_input_pin: pinmux_P8_33_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3610, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
+ P8_33A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
/* P8_33b (ball AF9) gpio3_1 */
P8_33_qep_pin: pinmux_P8_33_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_fld0.eQEP1B_in */
+ P8_33B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_fld0.eQEP1B_in */
/* P8_34a (ball D8) gpio8_11 */
P8_34_default_pin: pinmux_P8_34_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
+ P8_34A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
P8_34_gpio_pin: pinmux_P8_34_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
+ P8_34A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
P8_34_gpio_pu_pin: pinmux_P8_34_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
+ P8_34A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
P8_34_gpio_pd_pin: pinmux_P8_34_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3608, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
+ P8_34A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
P8_34_gpio_input_pin: pinmux_P8_34_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3608, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
+ P8_34A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
/* P8_34b (ball G6) gpio4_0 */
P8_34_pwm_pin: pinmux_P8_34_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3564, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_vsync0.ehrpwm1A */
+ P8_34B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_vsync0.ehrpwm1A */
/* P8_35a (ball A5) gpio8_12 */
P8_35_default_pin: pinmux_P8_35_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
+ P8_35A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
P8_35_gpio_pin: pinmux_P8_35_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
+ P8_35A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
P8_35_gpio_pu_pin: pinmux_P8_35_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
+ P8_35A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
P8_35_gpio_pd_pin: pinmux_P8_35_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x360C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
+ P8_35A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
P8_35_gpio_input_pin: pinmux_P8_35_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x360C, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
+ P8_35A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
/* P8_35b (ball AD9) gpio3_0 */
P8_35_qep_pin: pinmux_P8_35_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_de0.eQEP1A_in */
+ P8_35B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_de0.eQEP1A_in */
/* P8_36a (ball D7) gpio8_10 */
P8_36_default_pin: pinmux_P8_36_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
+ P8_36A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
P8_36_gpio_pin: pinmux_P8_36_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
+ P8_36A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
P8_36_gpio_pu_pin: pinmux_P8_36_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
+ P8_36A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
P8_36_gpio_pd_pin: pinmux_P8_36_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3604, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
+ P8_36A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
P8_36_gpio_input_pin: pinmux_P8_36_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3604, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
+ P8_36A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
/* P8_36b (ball F2) gpio4_1 */
P8_36_pwm_pin: pinmux_P8_36_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3568, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d0.ehrpwm1B */
+ P8_36B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d0.ehrpwm1B */
/* P8_37a (ball E8) gpio8_8 */
P8_37_default_pin: pinmux_P8_37_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
+ P8_37A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
P8_37_gpio_pin: pinmux_P8_37_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
+ P8_37A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
P8_37_gpio_pu_pin: pinmux_P8_37_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
+ P8_37A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
P8_37_gpio_pd_pin: pinmux_P8_37_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35FC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
+ P8_37A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
P8_37_gpio_input_pin: pinmux_P8_37_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35FC, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
+ P8_37A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
/* P8_37b (ball A21) */
P8_37_uart_pin: pinmux_P8_37_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3738, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp4_fsx.uart8_txd */
+ P8_37B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp4_fsx.uart8_txd */
/* P8_38a (ball D9) gpio8_9 */
P8_38_default_pin: pinmux_P8_38_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
+ P8_38A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
P8_38_gpio_pin: pinmux_P8_38_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
+ P8_38A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
P8_38_gpio_pu_pin: pinmux_P8_38_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
+ P8_38A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
P8_38_gpio_pd_pin: pinmux_P8_38_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3600, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
+ P8_38A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
P8_38_gpio_input_pin: pinmux_P8_38_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3600, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
+ P8_38A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
/* P8_38b (ball C18) */
P8_38_uart_pin: pinmux_P8_38_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3734, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp4_aclkx.uart8_rxd */
+ P8_38B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp4_aclkx.uart8_rxd */
/* P8_39 (ball F8) gpio8_6 */
P8_39_default_pin: pinmux_P8_39_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
+ P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
P8_39_gpio_pin: pinmux_P8_39_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
+ P8_39( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
P8_39_gpio_pu_pin: pinmux_P8_39_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
+ P8_39( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
P8_39_gpio_pd_pin: pinmux_P8_39_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
+ P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
P8_39_gpio_input_pin: pinmux_P8_39_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
+ P8_39( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
P8_39_pruout_pin: pinmux_P8_39_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d6.pr2_pru0_gpo3 */
+ P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d6.pr2_pru0_gpo3 */
P8_39_pruin_pin: pinmux_P8_39_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F4, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d6.pr2_pru0_gpi3 */
+ P8_39( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d6.pr2_pru0_gpi3 */
/* P8_40 (ball E7) gpio8_7 */
P8_40_default_pin: pinmux_P8_40_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
+ P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
P8_40_gpio_pin: pinmux_P8_40_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
+ P8_40( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
P8_40_gpio_pu_pin: pinmux_P8_40_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
+ P8_40( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
P8_40_gpio_pd_pin: pinmux_P8_40_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
+ P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
P8_40_gpio_input_pin: pinmux_P8_40_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
+ P8_40( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
P8_40_pruout_pin: pinmux_P8_40_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d7.pr2_pru0_gpo4 */
+ P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d7.pr2_pru0_gpo4 */
P8_40_pruin_pin: pinmux_P8_40_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F8, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d7.pr2_pru0_gpi4 */
+ P8_40( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d7.pr2_pru0_gpi4 */
/* P8_41 (ball E9) gpio8_4 */
P8_41_default_pin: pinmux_P8_41_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
+ P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
P8_41_gpio_pin: pinmux_P8_41_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
+ P8_41( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
P8_41_gpio_pu_pin: pinmux_P8_41_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
+ P8_41( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
P8_41_gpio_pd_pin: pinmux_P8_41_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
+ P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
P8_41_gpio_input_pin: pinmux_P8_41_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
+ P8_41( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
P8_41_pruout_pin: pinmux_P8_41_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d4.pr2_pru0_gpo1 */
+ P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d4.pr2_pru0_gpo1 */
P8_41_pruin_pin: pinmux_P8_41_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35EC, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d4.pr2_pru0_gpi1 */
+ P8_41( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d4.pr2_pru0_gpi1 */
/* P8_42 (ball F9) gpio8_5 */
P8_42_default_pin: pinmux_P8_42_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
+ P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
P8_42_gpio_pin: pinmux_P8_42_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
+ P8_42( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
P8_42_gpio_pu_pin: pinmux_P8_42_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
+ P8_42( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
P8_42_gpio_pd_pin: pinmux_P8_42_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
+ P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
P8_42_gpio_input_pin: pinmux_P8_42_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
+ P8_42( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
P8_42_pruout_pin: pinmux_P8_42_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d5.pr2_pru0_gpo2 */
+ P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d5.pr2_pru0_gpo2 */
P8_42_pruin_pin: pinmux_P8_42_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35F0, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d5.pr2_pru0_gpi2 */
+ P8_42( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d5.pr2_pru0_gpi2 */
/* P8_43 (ball F10) gpio8_2 */
P8_43_default_pin: pinmux_P8_43_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
+ P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
P8_43_gpio_pin: pinmux_P8_43_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
+ P8_43( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
P8_43_gpio_pu_pin: pinmux_P8_43_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
+ P8_43( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
P8_43_gpio_pd_pin: pinmux_P8_43_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
+ P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
P8_43_gpio_input_pin: pinmux_P8_43_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
+ P8_43( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
P8_43_pruout_pin: pinmux_P8_43_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d2.pr2_pru1_gpo20 */
+ P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d2.pr2_pru1_gpo20 */
P8_43_pruin_pin: pinmux_P8_43_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E4, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d2.pr2_pru1_gpi20 */
+ P8_43( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d2.pr2_pru1_gpi20 */
/* P8_44 (ball G11) gpio8_3 */
P8_44_default_pin: pinmux_P8_44_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
+ P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
P8_44_gpio_pin: pinmux_P8_44_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
+ P8_44( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
P8_44_gpio_pu_pin: pinmux_P8_44_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
+ P8_44( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
P8_44_gpio_pd_pin: pinmux_P8_44_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
+ P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
P8_44_gpio_input_pin: pinmux_P8_44_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
+ P8_44( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
P8_44_pruout_pin: pinmux_P8_44_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d3.pr2_pru0_gpo0 */
+ P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d3.pr2_pru0_gpo0 */
P8_44_pruin_pin: pinmux_P8_44_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E8, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d3.pr2_pru0_gpi0 */
+ P8_44( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d3.pr2_pru0_gpi0 */
/* P8_45a (ball F11) gpio8_0 */
P8_45_default_pin: pinmux_P8_45_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
+ P8_45A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
P8_45_gpio_pin: pinmux_P8_45_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
+ P8_45A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
P8_45_gpio_pu_pin: pinmux_P8_45_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
+ P8_45A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
P8_45_gpio_pd_pin: pinmux_P8_45_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
+ P8_45A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
P8_45_gpio_input_pin: pinmux_P8_45_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35DC, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
+ P8_45A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
/* P8_45b (ball B7) gpio8_16 */
P8_45_pruout_pin: pinmux_P8_45_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x361C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d16.pr2_pru0_gpo13 */
+ P8_45B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d16.pr2_pru0_gpo13 */
P8_45_pruin_pin: pinmux_P8_45_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x361C, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d16.pr2_pru0_gpi13 */
+ P8_45B( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d16.pr2_pru0_gpi13 */
/* P8_46a (ball G10) gpio8_1 */
P8_46_default_pin: pinmux_P8_46_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
+ P8_46A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
P8_46_gpio_pin: pinmux_P8_46_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
+ P8_46A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
P8_46_gpio_pu_pin: pinmux_P8_46_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
+ P8_46A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
P8_46_gpio_pd_pin: pinmux_P8_46_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
+ P8_46A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
P8_46_gpio_input_pin: pinmux_P8_46_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35E0, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
+ P8_46A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
/* P8_46b (ball A10) gpio8_23 */
P8_46_pruout_pin: pinmux_P8_46_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3638, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d23.pr2_pru0_gpo20 */
+ P8_46B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d23.pr2_pru0_gpo20 */
P8_46_pruin_pin: pinmux_P8_46_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3638, PIN_INPUT | MUX_MODE12) >; }; /* vout1_d23.pr2_pru0_gpi20 */
+ P8_46B( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d23.pr2_pru0_gpi20 */
/************************/
/* P9 Header */
@@ -704,370 +706,370 @@
/* P9_11a (ball B19) */
P9_11_uart_pin: pinmux_P9_11_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x372C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp3_axr0.uart5_rxd */
+ P9_11A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp3_axr0.uart5_rxd */
/* P9_11b (ball B8) gpio8_17 */
P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
+ P9_11B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
P9_11_gpio_pin: pinmux_P9_11_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
+ P9_11B( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
+ P9_11B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3620, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
+ P9_11B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
P9_11_gpio_input_pin: pinmux_P9_11_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3620, PIN_INPUT | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
+ P9_11B( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
/* P9_12 (ball B14) gpio5_0 */
P9_12_default_pin: pinmux_P9_12_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
+ P9_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
P9_12_gpio_pin: pinmux_P9_12_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
+ P9_12( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
+ P9_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
P9_12_gpio_pd_pin: pinmux_P9_12_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
+ P9_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
P9_12_gpio_input_pin: pinmux_P9_12_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36AC, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
+ P9_12( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
/* P9_13a (ball C17) */
P9_13_uart_pin: pinmux_P9_13_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3730, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp3_axr1.uart5_txd */
+ P9_13A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp3_axr1.uart5_txd */
/* P9_13b (ball AB10) gpio6_12 */
P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
+ P9_13B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
P9_13_gpio_pin: pinmux_P9_13_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
+ P9_13B( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
+ P9_13B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
P9_13_gpio_pd_pin: pinmux_P9_13_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3680, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
+ P9_13B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
P9_13_gpio_input_pin: pinmux_P9_13_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
+ P9_13B( PIN_INPUT | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
/* P9_14 (ball D6) gpio4_25 */
P9_14_default_pin: pinmux_P9_14_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
+ P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
P9_14_gpio_pin: pinmux_P9_14_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
+ P9_14( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
P9_14_gpio_pu_pin: pinmux_P9_14_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
+ P9_14( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
P9_14_gpio_pd_pin: pinmux_P9_14_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
+ P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
P9_14_gpio_input_pin: pinmux_P9_14_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35AC, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
+ P9_14( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
P9_14_pwm_pin: pinmux_P9_14_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35AC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d17.ehrpwm3A */
+ P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d17.ehrpwm3A */
/* P9_15 (ball AG4) gpio3_12 */
P9_15_default_pin: pinmux_P9_15_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
+ P9_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
P9_15_gpio_pin: pinmux_P9_15_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
+ P9_15( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
P9_15_gpio_pu_pin: pinmux_P9_15_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
+ P9_15( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
P9_15_gpio_pd_pin: pinmux_P9_15_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3514, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
+ P9_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
P9_15_gpio_input_pin: pinmux_P9_15_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3514, PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
+ P9_15( PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
/* P9_16 (ball C5) gpio4_26 */
P9_16_default_pin: pinmux_P9_16_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d18.gpio4_26 */
+ P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d18.gpio4_26 */
P9_16_gpio_pin: pinmux_P9_16_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
+ P9_16( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
P9_16_gpio_pu_pin: pinmux_P9_16_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
+ P9_16( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
P9_16_gpio_pd_pin: pinmux_P9_16_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
+ P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
P9_16_gpio_input_pin: pinmux_P9_16_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B0, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
+ P9_16( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
P9_16_pwm_pin: pinmux_P9_16_pwm_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35B0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d18.ehrpwm3B */
+ P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d18.ehrpwm3B */
/* P9_17a (ball B24) gpio7_17 */
P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
P9_17_gpio_pd_pin: pinmux_P9_17_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
P9_17_gpio_input_pin: pinmux_P9_17_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37CC, PIN_INPUT | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17A( PIN_INPUT | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
P9_17_spi_cs_pin: pinmux_P9_17_spi_cs_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37CC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_cs0.spi2_cs0 */
+ P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_cs0.spi2_cs0 */
/* P9_17b (ball F12) gpio5_3 */
P9_17_i2c_pin: pinmux_P9_17_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr1.i2c5_scl */
+ P9_17B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr1.i2c5_scl */
P9_17_uart_pin: pinmux_P9_17_pru_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36B8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr1.uart6_txd */
+ P9_17B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr1.uart6_txd */
/* P9_18a (ball G17) gpio7_16 */
P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
+ P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
P9_18_gpio_pin: pinmux_P9_18_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
+ P9_18A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
+ P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
P9_18_gpio_pd_pin: pinmux_P9_18_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
+ P9_18A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
P9_18_gpio_input_pin: pinmux_P9_18_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C8, PIN_INPUT | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
+ P9_18A( PIN_INPUT | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
P9_18_spi_pin: pinmux_P9_18_spi_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_d0.spi2_d0 */
+ P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_d0.spi2_d0 */
/* P9_18b (ball G12) gpio5_2 */
P9_18_i2c_pin: pinmux_P9_18_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36B4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr0.i2c5_sda */
+ P9_18B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr0.i2c5_sda */
P9_18_uart_pin: pinmux_P9_18_pru_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36B4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr0.uart6_rxd */
+ P9_18B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr0.uart6_rxd */
/* P9_19a (ball R6) gpio7_3 */
P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio7_3 */
+ P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio7_3 */
P9_19_gpio_pin: pinmux_P9_19_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
+ P9_19A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
+ P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
+ P9_19A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
P9_19_gpio_input_pin: pinmux_P9_19_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_INPUT | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
+ P9_19A( PIN_INPUT | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3440, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.i2c4_scl */
+ P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.i2c4_scl */
/* P9_19b (ball F4) gpio4_6 */
P9_19_qep_pin: pinmux_P9_19_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x357C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d5.eQEP2A_in */
+ P9_19B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d5.eQEP2A_in */
/* P9_20a (ball T9) gpio7_4 */
P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio7_4 */
+ P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio7_4 */
P9_20_gpio_pin: pinmux_P9_20_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
+ P9_20A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
+ P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
+ P9_20A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
P9_20_gpio_input_pin: pinmux_P9_20_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_INPUT | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
+ P9_20A( PIN_INPUT | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
P9_20_i2c_pin: pinmux_P9_20_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3444, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.i2c4_sda */
+ P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.i2c4_sda */
/* P9_20b (ball D2) gpio4_5*/
P9_20_pruout_pin: pinmux_P9_20_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3578, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d4.pr1_pru1_gpo1 */
+ P9_20B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d4.pr1_pru1_gpo1 */
P9_20_pruin_pin: pinmux_P9_20_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3578, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d4.pr1_pru1_gpi1 */
+ P9_20B( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d4.pr1_pru1_gpi1 */
/* P9_21a (ball AF8) gpio3_3 */
P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
+ P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
P9_21_gpio_pin: pinmux_P9_21_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
+ P9_21A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
+ P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
P9_21_gpio_pd_pin: pinmux_P9_21_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
+ P9_21A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
P9_21_gpio_input_pin: pinmux_P9_21_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34F0, PIN_INPUT | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
+ P9_21A( PIN_INPUT | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
P9_21_qep_pin: pinmux_P9_21_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x34F0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_vsync0.eQEP1_strobe */
+ P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_vsync0.eQEP1_strobe */
/* P9_21b (ball B22) gpio7_15 */
P9_21_spi_pin: pinmux_P9_21_spi_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_d1.spi2_d1 */
+ P9_21B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_d1.spi2_d1 */
P9_21_uart_pin: pinmux_P9_21_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi2_d1.uart3_txd */
+ P9_21B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi2_d1.uart3_txd */
/* P9_22a (ball B26) gpio6_19 */
P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
+ P9_22A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
P9_22_gpio_pin: pinmux_P9_22_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
+ P9_22A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
+ P9_22A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
P9_22_gpio_pd_pin: pinmux_P9_22_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x369C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
+ P9_22A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
P9_22_gpio_input_pin: pinmux_P9_22_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x369C, PIN_INPUT | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
+ P9_22A( PIN_INPUT | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
/* P9_22b (ball A26) gpio7_14 */
P9_22_spi_sclk_pin: pinmux_P9_22_spi_sclk_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_sclk.spi2_sclk */
+ P9_22B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_sclk.spi2_sclk */
P9_22_uart_pin: pinmux_P9_22_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37C0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi2_sclk.uart3_rxd */
+ P9_22B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi2_sclk.uart3_rxd */
/* P9_23 (ball A22) gpio7_11 */
P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
+ P9_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
P9_23_gpio_pin: pinmux_P9_23_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
+ P9_23( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
+ P9_23( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37B4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
+ P9_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
P9_23_gpio_input_pin: pinmux_P9_23_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x37B4, PIN_INPUT | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
+ P9_23( PIN_INPUT | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
/* P9_24 (ball F20) gpio6_15*/
P9_24_default_pin: pinmux_P9_24_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
+ P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
P9_24_gpio_pin: pinmux_P9_24_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
+ P9_24( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
+ P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
P9_24_gpio_pd_pin: pinmux_P9_24_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
+ P9_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
P9_24_gpio_input_pin: pinmux_P9_24_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_INPUT | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
+ P9_24( PIN_INPUT | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
P9_24_uart_pin: pinmux_P9_24_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* gpio6_15.uart10_txd */
+ P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* gpio6_15.uart10_txd */
P9_24_can_pin: pinmux_P9_24_can_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* gpio6_15.dcan2_rx */
+ P9_24( PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* gpio6_15.dcan2_rx */
P9_24_i2c_pin: pinmux_P9_24_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x368C, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) >; }; /* gpio6_15.i2c3_scl */
+ P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) >; }; /* gpio6_15.i2c3_scl */
/* P9_25 (ball D18) gpio6_17 */
P9_25_default_pin: pinmux_P9_25_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
+ P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
P9_25_gpio_pin: pinmux_P9_25_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
+ P9_25( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
P9_25_gpio_pu_pin: pinmux_P9_25_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
+ P9_25( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
P9_25_gpio_pd_pin: pinmux_P9_25_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
+ P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
P9_25_gpio_input_pin: pinmux_P9_25_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
+ P9_25( PIN_INPUT | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
P9_25_pruout_pin: pinmux_P9_25_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* xref_clk0.pr2_pru1_gpo5 */
+ P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* xref_clk0.pr2_pru1_gpo5 */
P9_25_pruin_pin: pinmux_P9_25_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE12) >; }; /* xref_clk0.pr2_pru1_gpi5 */
+ P9_25( PIN_INPUT | MUX_MODE12) >; }; /* xref_clk0.pr2_pru1_gpi5 */
/* P9_26a (ball E21) gpio6_14 */
P9_26_default_pin: pinmux_P9_26_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
+ P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
P9_26_gpio_pin: pinmux_P9_26_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
+ P9_26A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
+ P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
P9_26_gpio_pd_pin: pinmux_P9_26_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
+ P9_26A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
P9_26_gpio_input_pin: pinmux_P9_26_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_INPUT | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
+ P9_26A( PIN_INPUT | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
P9_26_uart_pin: pinmux_P9_26_uart_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* gpio6_14.uart10_rxd */
+ P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* gpio6_14.uart10_rxd */
P9_26_can_pin: pinmux_P9_26_can_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* gpio6_14.dcan2_tx */
+ P9_26A( PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* gpio6_14.dcan2_tx */
P9_26_i2c_pin: pinmux_P9_26_i2c_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3688, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) >; }; /* gpio6_14.i2c3_sda */
+ P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) >; }; /* gpio6_14.i2c3_sda */
/* P9_26b (ball AE2) gpio3_24 */
P9_26_pruout_pin: pinmux_P9_26_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3544, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d20.pr1_pru0_gpo17*/
+ P9_26B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d20.pr1_pru0_gpo17*/
P9_26_pruin_pin: pinmux_P9_26_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3544, PIN_INPUT | MUX_MODE12) >; }; /* vin1a_d20.pr1_pru0_gpi17*/
+ P9_26B( PIN_INPUT | MUX_MODE12) >; }; /* vin1a_d20.pr1_pru0_gpi17*/
/* P9_27a (ball C3) gpio4_15 */
P9_27_default_pin: pinmux_P9_27_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
+ P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
P9_27_gpio_pin: pinmux_P9_27_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
+ P9_27A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
P9_27_gpio_pu_pin: pinmux_P9_27_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
+ P9_27A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
P9_27_gpio_pd_pin: pinmux_P9_27_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
+ P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
P9_27_gpio_input_pin: pinmux_P9_27_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
+ P9_27A( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
P9_27_qep_pin: pinmux_P9_27_qep_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d14.eQEP3B_in */
+ P9_27A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d14.eQEP3B_in */
P9_27_pruout_pin: pinmux_P9_27_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d14.pr1_pru1_gpo11 */
+ P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d14.pr1_pru1_gpo11 */
P9_27_pruin_pin: pinmux_P9_27_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x35A0, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d14.pr1_pru1_gpi11 */
+ P9_27A( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d14.pr1_pru1_gpi11 */
/* P9_27b (ball J14) gpio5_1 */
/* P9_28 (ball A12) gpio4_17 */
P9_28_default_pin: pinmux_P9_28_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
P9_28_gpio_pin: pinmux_P9_28_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
P9_28_gpio_input_pin: pinmux_P9_28_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
P9_28_spi_cs_pin: pinmux_P9_28_spi_cs_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr11.spi3_cs0 */
+ P9_28( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr11.spi3_cs0 */
P9_28_pruout_pin: pinmux_P9_28_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr11.pr2_pru1_gpo13 */
+ P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr11.pr2_pru1_gpo13 */
P9_28_pruin_pin: pinmux_P9_28_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E0, PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr11.pr2_pru1_gpi13 */
+ P9_28( PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr11.pr2_pru1_gpi13 */
/* P9_29a (ball A11) gpio5_11*/
P9_29_default_pin: pinmux_P9_29_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
+ P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
P9_29_gpio_pin: pinmux_P9_29_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
+ P9_29A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
P9_29_gpio_pu_pin: pinmux_P9_29_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
+ P9_29A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
P9_29_gpio_pd_pin: pinmux_P9_29_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
+ P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
P9_29_gpio_input_pin: pinmux_P9_29_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
+ P9_29A( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
P9_29_spi_pin: pinmux_P9_29_spi_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr9.spi3_d1 */
+ P9_29A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr9.spi3_d1 */
P9_29_pruout_pin: pinmux_P9_29_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr9.pr2_pru1_gpo11 */
+ P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr9.pr2_pru1_gpo11 */
P9_29_pruin_pin: pinmux_P9_29_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D8, PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr9.pr2_pru1_gpi11 */
+ P9_29A( PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr9.pr2_pru1_gpi11 */
/* P9_29b (ball D14) gpio7_30 */
/* P9_30 (ball B13) gpio5_12*/
P9_30_default_pin: pinmux_P9_30_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
P9_30_gpio_pin: pinmux_P9_30_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
P9_30_gpio_pu_pin: pinmux_P9_30_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
P9_30_gpio_pd_pin: pinmux_P9_30_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
P9_30_gpio_input_pin: pinmux_P9_30_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
P9_30_spi_pin: pinmux_P9_30_spi_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr10.spi3_d0 */
+ P9_30( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr10.spi3_d0 */
P9_30_pruout_pin: pinmux_P9_30_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr10.pr2_pru1_gpo12 */
+ P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr10.pr2_pru1_gpo12 */
P9_30_pruin_pin: pinmux_P9_30_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36DC, PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr10.pr2_pru1_gpi12 */
+ P9_30( PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr10.pr2_pru1_gpi12 */
/* P9_31a (ball B12) gpio5_10 */
P9_31_default_pin: pinmux_P9_31_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
+ P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
P9_31_gpio_pin: pinmux_P9_31_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
+ P9_31A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
P9_31_gpio_pu_pin: pinmux_P9_31_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
+ P9_31A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
P9_31_gpio_pd_pin: pinmux_P9_31_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
+ P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
P9_31_gpio_input_pin: pinmux_P9_31_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
+ P9_31A( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
P9_31_spi_sclk_pin: pinmux_P9_31_spi_sclk_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr8.spi3_sclk */
+ P9_31A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr8.spi3_sclk */
P9_31_pruout_pin: pinmux_P9_31_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr8.pr2_pru1_gpo10 */
+ P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr8.pr2_pru1_gpo10 */
P9_31_pruin_pin: pinmux_P9_31_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36D4, PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr8.pr2_pru1_gpi10 */
+ P9_31A( PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr8.pr2_pru1_gpi10 */
/* P9_31b (ball C14) gpio7_31*/
@@ -1091,41 +1093,41 @@
/* P9_41a (ball C23) gpio6_20 */
P9_41_default_pin: pinmux_P9_41_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
+ P9_41A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
P9_41_gpio_pin: pinmux_P9_41_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
+ P9_41A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
P9_41_gpio_pu_pin: pinmux_P9_41_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
+ P9_41A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
P9_41_gpio_pd_pin: pinmux_P9_41_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36A0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
+ P9_41A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
P9_41_gpio_input_pin: pinmux_P9_41_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36A0, PIN_INPUT | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
+ P9_41A( PIN_INPUT | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
/* P9_41b (ball C1) gpio4_7 */
P9_41_pruout_pin: pinmux_P9_41_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3580, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d6.pr1_pru1_gpo3 */
+ P9_41B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d6.pr1_pru1_gpo3 */
P9_41_pruin_pin: pinmux_P9_41_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x3580, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d6.pr1_pru1_gpi3 */
+ P9_41B( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d6.pr1_pru1_gpi3 */
/* P9_42a (ball E14) gpio4_18 */
P9_42_default_pin: pinmux_P9_42_default_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
+ P9_42A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
P9_42_gpio_pin: pinmux_P9_42_gpio_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
+ P9_42A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
P9_42_gpio_pu_pin: pinmux_P9_42_gpio_pu_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
+ P9_42A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
P9_42_gpio_pd_pin: pinmux_P9_42_gpio_pd_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
+ P9_42A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
P9_42_gpio_input_pin: pinmux_P9_42_gpio_input_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
+ P9_42A( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
P9_42_spi_cs_pin: pinmux_P9_42_spi_cs_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x36E4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr12.spi3_cs1 */
+ P9_42A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr12.spi3_cs1 */
/* P9_42b (ball C2) gpio4_14*/
P9_42_pruout_pin: pinmux_P9_42_pruout_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x359C, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d13.pr1_pru1_gpo10 */
+ P9_42B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d13.pr1_pru1_gpo10 */
P9_42_pruin_pin: pinmux_P9_42_pruin_pin { pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x359C, PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d13.pr1_pru1_gpi10 */
+ P9_42B( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d13.pr1_pru1_gpi10 */
/* P9_43 GND */
--
GitLab
From 483efd0deaf429666f91f3ffe192c5dfb197d03b Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Mon, 6 Jul 2020 18:38:47 +0530
Subject: [PATCH 21/86] fix P9_13 macro reference
---
src/arm/bbai-bone-buses.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/arm/bbai-bone-buses.dtsi b/src/arm/bbai-bone-buses.dtsi
index c7a0c20b..0b5af2ea 100644
--- a/src/arm/bbai-bone-buses.dtsi
+++ b/src/arm/bbai-bone-buses.dtsi
@@ -31,9 +31,10 @@
bone_uart_4_pins: pinmux_bone_uart_4_pins {
pinctrl-single,pins = <
- P9_13( PIN_OUTPUT_PULLUP | MUX_MODE4) /* mcasp3_axr1.uart5_txd */
+ P9_13A( PIN_OUTPUT_PULLUP | MUX_MODE4) /* mcasp3_axr1.uart5_txd */
P9_11A( PIN_INPUT_PULLUP | MUX_MODE4) /* mcasp3_axr0.uart5_rxd */
/* unused pins */
+ P9_13B( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus */
P9_11B( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.off */
>;
};
--
GitLab
From f3d112c09a89241bda1ed0ef441489e70c025924 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Tue, 7 Jul 2020 13:24:59 +0530
Subject: [PATCH 22/86] BBAI gpio-leds led_ nodes for compatibility
---
src/arm/bbai-bone-buses.dtsi | 345 +++++++++++++++++++++++++++++++++++
1 file changed, 345 insertions(+)
diff --git a/src/arm/bbai-bone-buses.dtsi b/src/arm/bbai-bone-buses.dtsi
index 0b5af2ea..6e187a31 100644
--- a/src/arm/bbai-bone-buses.dtsi
+++ b/src/arm/bbai-bone-buses.dtsi
@@ -8,6 +8,351 @@
#include <dt-bindings/board/am572x-bbai-pins.h>
+/********/
+/* LEDs */
+/********/
+&{/} {
+ leds {
+ pinctrl-names = "default";
+ compatible = "gpio-leds";
+
+ led_P8_03 {
+ gpios = <&gpio1 24 0>;
+ status = "reserved";
+ };
+
+ led_P8_04 {
+ gpios = <&gpio1 25 0>;
+ status = "reserved";
+ };
+
+ led_P8_05 {
+ gpios = <&gpio7 1 0>;
+ status = "reserved";
+ };
+
+ led_P8_06 {
+ gpios = <&gpio7 2 0>;
+ status = "reserved";
+ };
+
+ led_P8_07 {
+ gpios = <&gpio6 5 0>;
+ status = "reserved";
+ };
+
+ led_P8_08 {
+ gpios = <&gpio6 6 0>;
+ status = "reserved";
+ };
+
+ led_P8_09 {
+ gpios = <&gpio6 18 0>;
+ status = "reserved";
+ };
+
+ led_P8_10 {
+ gpios = <&gpio6 4 0>;
+ status = "reserved";
+ };
+
+ led_P8_11 {
+ gpios = <&gpio3 11 0>;
+ status = "reserved";
+ };
+
+ led_P8_12 {
+ gpios = <&gpio3 10 0>;
+ status = "reserved";
+ };
+
+ led_P8_13 {
+ gpios = <&gpio4 11 0>;
+ status = "reserved";
+ };
+
+ led_P8_14 {
+ gpios = <&gpio4 13 0>;
+ status = "reserved";
+ };
+
+ led_P8_15 {
+ gpios = <&gpio4 3 0>;
+ status = "reserved";
+ };
+
+ led_P8_16 {
+ gpios = <&gpio4 29 0>;
+ status = "reserved";
+ };
+
+ led_P8_17 {
+ gpios = <&gpio8 18 0>;
+ status = "reserved";
+ };
+
+ led_P8_18 {
+ gpios = <&gpio4 9 0>;
+ status = "reserved";
+ };
+
+ led_P8_19 {
+ gpios = <&gpio4 10 0>;
+ status = "reserved";
+ };
+
+ led_P8_20 {
+ gpios = <&gpio6 30 0>;
+ status = "reserved";
+ };
+
+ led_P8_21 {
+ gpios = <&gpio6 29 0>;
+ status = "reserved";
+ };
+
+ led_P8_22 {
+ gpios = <&gpio1 23 0>;
+ status = "reserved";
+ };
+
+ led_P8_23 {
+ gpios = <&gpio1 22 0>;
+ status = "reserved";
+ };
+
+ led_P8_24 {
+ gpios = <&gpio7 0 0>;
+ status = "reserved";
+ };
+
+ led_P8_25 {
+ gpios = <&gpio6 31 0>;
+ status = "reserved";
+ };
+
+ led_P8_26 {
+ gpios = <&gpio4 28 0>;
+ status = "reserved";
+ };
+
+ led_P8_27 {
+ gpios = <&gpio4 23 0>;
+ status = "reserved";
+ };
+
+ led_P8_28 {
+ gpios = <&gpio4 19 0>;
+ status = "reserved";
+ };
+
+ led_P8_29 {
+ gpios = <&gpio4 22 0>;
+ status = "reserved";
+ };
+
+ led_P8_30 {
+ gpios = <&gpio4 20 0>;
+ status = "reserved";
+ };
+
+ led_P8_31 {
+ gpios = <&gpio8 14 0>;
+ status = "reserved";
+ };
+
+ led_P8_32 {
+ gpios = <&gpio8 15 0>;
+ status = "reserved";
+ };
+
+ led_P8_33 {
+ gpios = <&gpio8 13 0>;
+ status = "reserved";
+ };
+
+ led_P8_34 {
+ gpios = <&gpio8 11 0>;
+ status = "reserved";
+ };
+
+ led_P8_35 {
+ gpios = <&gpio8 12 0>;
+ status = "reserved";
+ };
+
+ led_P8_36 {
+ gpios = <&gpio8 10 0>;
+ status = "reserved";
+ };
+
+ led_P8_37 {
+ gpios = <&gpio8 8 0>;
+ status = "reserved";
+ };
+
+ led_P8_38 {
+ gpios = <&gpio8 9 0>;
+ status = "reserved";
+ };
+
+ led_P8_39 {
+ gpios = <&gpio8 6 0>;
+ status = "reserved";
+ };
+
+ led_P8_40 {
+ gpios = <&gpio8 7 0>;
+ status = "reserved";
+ };
+
+ led_P8_41 {
+ gpios = <&gpio8 4 0>;
+ status = "reserved";
+ };
+
+ led_P8_42 {
+ gpios = <&gpio8 5 0>;
+ status = "reserved";
+ };
+
+ led_P8_43 {
+ gpios = <&gpio8 2 0>;
+ status = "reserved";
+ };
+
+ led_P8_44 {
+ gpios = <&gpio8 3 0>;
+ status = "reserved";
+ };
+
+ led_P8_45 {
+ gpios = <&gpio8 0 0>;
+ status = "reserved";
+ };
+
+ led_P8_46 {
+ gpios = <&gpio8 1 0>;
+ status = "reserved";
+ };
+
+ led_P9_11 {
+ gpios = <&gpio8 17 0>;
+ status = "reserved";
+ };
+
+ led_P9_12 {
+ gpios = <&gpio5 0 0>;
+ status = "reserved";
+ };
+
+ led_P9_13 {
+ gpios = <&gpio6 12 0>;
+ status = "reserved";
+ };
+
+ led_P9_14 {
+ gpios = <&gpio4 25 0>;
+ status = "reserved";
+ };
+
+ led_P9_15 {
+ gpios = <&gpio3 12 0>;
+ status = "reserved";
+ };
+
+ led_P9_16 {
+ gpios = <&gpio4 26 0>;
+ status = "reserved";
+ };
+
+ led_P9_17 {
+ gpios = <&gpio7 17 0>;
+ status = "reserved";
+ };
+
+ led_P9_18 {
+ gpios = <&gpio7 16 0>;
+ status = "reserved";
+ };
+
+ led_P9_19 {
+ gpios = <&gpio7 3 0>;
+ status = "reserved";
+ };
+
+ led_P9_20 {
+ gpios = <&gpio7 4 0>;
+ status = "reserved";
+ };
+
+ led_P9_21 {
+ gpios = <&gpio3 3 0>;
+ status = "reserved";
+ };
+
+ led_P9_22 {
+ gpios = <&gpio6 19 0>;
+ status = "reserved";
+ };
+
+ led_P9_23 {
+ gpios = <&gpio7 11 0>;
+ status = "reserved";
+ };
+
+ led_P9_24 {
+ gpios = <&gpio6 15 0>;
+ status = "reserved";
+ };
+
+ led_P9_25 {
+ gpios = <&gpio6 17 0>;
+ status = "reserved";
+ };
+
+ led_P9_26 {
+ gpios = <&gpio6 14 0>;
+ status = "reserved";
+ };
+
+ led_P9_27 {
+ gpios = <&gpio4 15 0>;
+ status = "reserved";
+ };
+
+ led_P9_28 {
+ gpios = <&gpio4 17 0>;
+ status = "reserved";
+ };
+
+ led_P9_29 {
+ gpios = <&gpio5 11 0>;
+ status = "reserved";
+ };
+
+ led_P9_30 {
+ gpios = <&gpio5 12 0>;
+ status = "reserved";
+ };
+
+ led_P9_31 {
+ gpios = <&gpio5 10 0>;
+ status = "reserved";
+ };
+
+ led_P9_41 {
+ gpios = <&gpio6 20 0>;
+ status = "reserved";
+ };
+
+ led_P9_42 {
+ gpios = <&gpio4 18 0>;
+ status = "reserved";
+ };
+ };
+};
+
&dra7_pmx_core {
// Uarts
bone_uart_1_pins: pinmux_bone_uart_1_pins {
--
GitLab
From 795a7b25c28f6ded87341e51e0252753345b6c59 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Tue, 7 Jul 2020 13:25:28 +0530
Subject: [PATCH 23/86] BBB gpio-leds led_ nodes for compatibility
---
src/arm/bbb-bone-buses.dtsi | 360 ++++++++++++++++++++++++++++++++++++
1 file changed, 360 insertions(+)
diff --git a/src/arm/bbb-bone-buses.dtsi b/src/arm/bbb-bone-buses.dtsi
index 3288fd67..42e1b7ed 100644
--- a/src/arm/bbb-bone-buses.dtsi
+++ b/src/arm/bbb-bone-buses.dtsi
@@ -8,6 +8,366 @@
#include <dt-bindings/board/am335x-bbb-pins.h>
+/********/
+/* LEDs */
+/********/
+&{/} {
+ leds {
+ pinctrl-names = "default";
+ compatible = "gpio-leds";
+
+ led_P8_03 {
+ gpios = <&gpio1 6 0>;
+ status = "disabled";
+ };
+
+ led_P8_04 {
+ gpios = <&gpio1 7 0>;
+ status = "disabled";
+ };
+
+ led_P8_05 {
+ gpios = <&gpio1 2 0>;
+ status = "disabled";
+ };
+
+ led_P8_06 {
+ gpios = <&gpio1 3 0>;
+ status = "disabled";
+ };
+
+ led_P8_07 {
+ gpios = <&gpio2 2 0>;
+ status = "disabled";
+ };
+
+ led_P8_08 {
+ gpios = <&gpio2 3 0>;
+ status = "disabled";
+ };
+
+ led_P8_09 {
+ gpios = <&gpio2 5 0>;
+ status = "disabled";
+ };
+
+ led_P8_10 {
+ gpios = <&gpio2 4 0>;
+ status = "disabled";
+ };
+
+ led_P8_11 {
+ gpios = <&gpio1 13 0>;
+ status = "disabled";
+ };
+
+ led_P8_12 {
+ gpios = <&gpio1 12 0>;
+ status = "disabled";
+ };
+
+ led_P8_13 {
+ gpios = <&gpio0 23 0>;
+ status = "disabled";
+ };
+
+ led_P8_14 {
+ gpios = <&gpio0 26 0>;
+ status = "disabled";
+ };
+
+ led_P8_15 {
+ gpios = <&gpio1 15 0>;
+ status = "disabled";
+ };
+
+ led_P8_16 {
+ gpios = <&gpio1 14 0>;
+ status = "disabled";
+ };
+
+ led_P8_17 {
+ gpios = <&gpio0 27 0>;
+ status = "disabled";
+ };
+
+ led_P8_18 {
+ gpios = <&gpio2 1 0>;
+ status = "disabled";
+ };
+
+ led_P8_19 {
+ gpios = <&gpio0 22 0>;
+ status = "disabled";
+ };
+
+ led_P8_20 {
+ gpios = <&gpio1 31 0>;
+ status = "disabled";
+ };
+
+ led_P8_21 {
+ gpios = <&gpio1 30 0>;
+ status = "disabled";
+ };
+
+ led_P8_22 {
+ gpios = <&gpio1 5 0>;
+ status = "disabled";
+ };
+
+ led_P8_23 {
+ gpios = <&gpio1 4 0>;
+ status = "disabled";
+ };
+
+ led_P8_24 {
+ gpios = <&gpio1 1 0>;
+ status = "disabled";
+ };
+
+ led_P8_25 {
+ gpios = <&gpio1 0 0>;
+ status = "disabled";
+ };
+
+ led_P8_26 {
+ gpios = <&gpio1 29 0>;
+ status = "disabled";
+ };
+
+ led_P8_27 {
+ gpios = <&gpio2 22 0>;
+ status = "disabled";
+ };
+
+ led_P8_28 {
+ gpios = <&gpio2 24 0>;
+ status = "disabled";
+ };
+
+ led_P8_29 {
+ gpios = <&gpio2 23 0>;
+ status = "disabled";
+ };
+
+ led_P8_30 {
+ gpios = <&gpio2 25 0>;
+ status = "disabled";
+ };
+
+ led_P8_31 {
+ gpios = <&gpio0 10 0>;
+ status = "disabled";
+ };
+
+ led_P8_32 {
+ gpios = <&gpio0 11 0>;
+ status = "disabled";
+ };
+
+ led_P8_33 {
+ gpios = <&gpio0 9 0>;
+ status = "disabled";
+ };
+
+ led_P8_34 {
+ gpios = <&gpio2 17 0>;
+ status = "disabled";
+ };
+
+ led_P8_35 {
+ gpios = <&gpio0 8 0>;
+ status = "disabled";
+ };
+
+ led_P8_36 {
+ gpios = <&gpio2 16 0>;
+ status = "disabled";
+ };
+
+ led_P8_37 {
+ gpios = <&gpio2 14 0>;
+ status = "disabled";
+ };
+
+ led_P8_38 {
+ gpios = <&gpio2 15 0>;
+ status = "disabled";
+ };
+
+ led_P8_39 {
+ gpios = <&gpio2 12 0>;
+ status = "disabled";
+ };
+
+ led_P8_40 {
+ gpios = <&gpio2 13 0>;
+ status = "disabled";
+ };
+
+ led_P8_41 {
+ gpios = <&gpio2 10 0>;
+ status = "disabled";
+ };
+
+ led_P8_42 {
+ gpios = <&gpio2 11 0>;
+ status = "disabled";
+ };
+
+ led_P8_43 {
+ gpios = <&gpio2 8 0>;
+ status = "disabled";
+ };
+
+ led_P8_44 {
+ gpios = <&gpio2 9 0>;
+ status = "disabled";
+ };
+
+ led_P8_45 {
+ gpios = <&gpio2 6 0>;
+ status = "disabled";
+ };
+
+ led_P8_46 {
+ gpios = <&gpio2 7 0>;
+ status = "disabled";
+ };
+
+ led_P9_11 {
+ gpios = <&gpio0 30 0>;
+ status = "disabled";
+ };
+
+ led_P9_12 {
+ gpios = <&gpio1 28 0>;
+ status = "disabled";
+ };
+
+ led_P9_13 {
+ gpios = <&gpio0 31 0>;
+ status = "disabled";
+ };
+
+ led_P9_14 {
+ gpios = <&gpio1 18 0>;
+ status = "disabled";
+ };
+
+ led_P9_15 {
+ gpios = <&gpio1 16 0>;
+ status = "disabled";
+ };
+
+ led_P9_16 {
+ gpios = <&gpio1 19 0>;
+ status = "disabled";
+ };
+
+ led_P9_17 {
+ gpios = <&gpio0 5 0>;
+ status = "disabled";
+ };
+
+ led_P9_18 {
+ gpios = <&gpio0 4 0>;
+ status = "disabled";
+ };
+
+ led_P9_19 {
+ gpios = <&gpio0 13 0>;
+ status = "disabled";
+ };
+
+ led_P9_20 {
+ gpios = <&gpio0 12 0>;
+ status = "disabled";
+ };
+
+ led_P9_21 {
+ gpios = <&gpio0 3 0>;
+ status = "disabled";
+ };
+
+ led_P9_22 {
+ gpios = <&gpio0 2 0>;
+ status = "disabled";
+ };
+
+ led_P9_23 {
+ gpios = <&gpio1 17 0>;
+ status = "disabled";
+ };
+
+ led_P9_24 {
+ gpios = <&gpio0 15 0>;
+ status = "disabled";
+ };
+
+ led_P9_25 {
+ gpios = <&gpio3 21 0>;
+ status = "disabled";
+ };
+
+ led_P9_26 {
+ gpios = <&gpio0 14 0>;
+ status = "disabled";
+ };
+
+ led_P9_27 {
+ gpios = <&gpio3 19 0>;
+ status = "disabled";
+ };
+
+ led_P9_28 {
+ gpios = <&gpio3 17 0>;
+ status = "disabled";
+ };
+
+ led_P9_29 {
+ gpios = <&gpio3 15 0>;
+ status = "disabled";
+ };
+
+ led_P9_30 {
+ gpios = <&gpio3 16 0>;
+ status = "disabled";
+ };
+
+ led_P9_31 {
+ gpios = <&gpio3 14 0>;
+ status = "disabled";
+ };
+
+ led_P9_41 {
+ gpios = <&gpio0 20 0>;
+ status = "disabled";
+ };
+
+ led_P9_91 {
+ gpios = <&gpio3 20 0>;
+ status = "disabled";
+ };
+
+ led_P9_42 {
+ gpios = <&gpio0 7 0>;
+ status = "disabled";
+ };
+
+ led_P9_92 {
+ gpios = <&gpio3 18 0>;
+ status = "disabled";
+ };
+
+ led_A15 {
+ gpios = <&gpio0 19 0>;
+ status = "disabled";
+ };
+ };
+};
+
&am33xx_pinmux {
// UARTs
bone_uart_1_pins: pinmux_bone_uart_1_pins {
--
GitLab
From 3c67d9e63fb980478c53f37184fafce0bbb95b84 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Fri, 10 Jul 2020 23:27:17 +0530
Subject: [PATCH 24/86] Initial combined macros for P8 & P9 headers
These are the macros that makes it easy to control the pinmxing. If we are using pin a then pin b connected to that header pin will be shut off.
---
include/dt-bindings/board/am572x-bbai-pins.h | 606 +++++++++++++++++++
1 file changed, 606 insertions(+)
diff --git a/include/dt-bindings/board/am572x-bbai-pins.h b/include/dt-bindings/board/am572x-bbai-pins.h
index c2639592..21e7afb9 100644
--- a/include/dt-bindings/board/am572x-bbai-pins.h
+++ b/include/dt-bindings/board/am572x-bbai-pins.h
@@ -106,4 +106,610 @@
#define P9_42A(mode) DRA7XX_CORE_IOPAD(0x36E4, mode) /* E14: P9.42a: mcasp1_axr12 */
#define P9_42B(mode) DRA7XX_CORE_IOPAD(0x359C, mode) /* C2: P9.42b: vin2a_d13 */
+
+/********************************/
+/* BBAI P8 Header pinmux macros */
+/********************************/
+/* P8_01 GND */
+/* P8_02 GND */
+
+/* P8_03 (ball AB8) gpio1_24 */
+#define P8_03_DEFAULT P8_03( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
+#define P8_03_GPIO P8_03( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
+#define P8_03_GPIO_PU P8_03( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
+#define P8_03_GPIO_PD P8_03( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
+#define P8_03_GPIO_INPUT P8_03( PIN_INPUT | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
+
+/* P8_04 (ball AB5) gpio1_25 */
+#define P8_04_DEFAULT P8_04( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
+#define P8_04_GPIO P8_04( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
+#define P8_04_GPIO_PU P8_04( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
+#define P8_04_GPIO_PD P8_04( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
+#define P8_04_GPIO_INPUT P8_04( PIN_INPUT | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
+
+/* P8_05 (ball AC9) gpio7_1 */
+#define P8_05_DEFAULT P8_05( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
+#define P8_05_GPIO P8_05( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
+#define P8_05_GPIO_PU P8_05( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
+#define P8_05_GPIO_PD P8_05( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
+#define P8_05_GPIO_INPUT P8_05( PIN_INPUT | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
+
+/* P8_06 (ball AC3) gpio7_2 */
+#define P8_06_DEFAULT P8_06( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
+#define P8_06_GPIO P8_06( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
+#define P8_06_GPIO_PU P8_06( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
+#define P8_06_GPIO_PD P8_06( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
+#define P8_06_GPIO_INPUT P8_06( PIN_INPUT | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
+
+/* P8_07 (ball G14) gpio6_5*/
+#define P8_07_DEFAULT P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
+#define P8_07_GPIO P8_07( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
+#define P8_07_GPIO_PU P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
+#define P8_07_GPIO_PD P8_07( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
+#define P8_07_GPIO_INPUT P8_07( PIN_INPUT | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
+#define P8_07_TIMER P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* mcasp1_axr14.timer11 */
+
+/* P8_08 (ball F14) gpio6_6 */
+#define P8_08_DEFAULT P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
+#define P8_08_GPIO P8_08( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
+#define P8_08_GPIO_PU P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
+#define P8_08_GPIO_PD P8_08( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
+#define P8_08_GPIO_INPUT P8_08( PIN_INPUT | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
+#define P8_08_TIMER P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* mcasp1_axr15.timer12 */
+
+/* P8_09 (ball E17) gpio6_18 */
+#define P8_09_DEFAULT P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* xref_clk1.gpio6_18 */
+#define P8_09_GPIO P8_09( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* xref_clk1.gpio6_18 */
+#define P8_09_GPIO_PU P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* xref_clk1.gpio6_18 */
+#define P8_09_GPIO_PD P8_09( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* xref_clk1.gpio6_18 */
+#define P8_09_GPIO_INPUT P8_09( PIN_INPUT | MUX_MODE14) /* xref_clk1.gpio6_18 */
+#define P8_09_TIMER P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* xref_clk1.timer14 */
+
+/* P8_10 (ball A13) gpio6_4 */
+#define P8_10_DEFAULT P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
+#define P8_10_GPIO P8_10( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
+#define P8_10_GPIO_PU P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
+#define P8_10_GPIO_PD P8_10( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
+#define P8_10_GPIO_INPUT P8_10( PIN_INPUT | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
+#define P8_10_TIMER P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* mcasp1_axr13.timer10 */
+
+/* P8_11 (ball AH4) gpio3_11 */
+#define P8_11_DEFAULT P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d7.gpio3_11 */
+#define P8_11_GPIO P8_11( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin1a_d7.gpio3_11 */
+#define P8_11_GPIO_PU P8_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin1a_d7.gpio3_11 */
+#define P8_11_GPIO_PD P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d7.gpio3_11 */
+#define P8_11_GPIO_INPUT P8_11( PIN_INPUT | MUX_MODE14) /* vin1a_d7.gpio3_11 */
+#define P8_11_QEP P8_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* vin1a_d7.eQEP2B_in */
+#define P8_11_PRUOUT P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vin1a_d7.pr1_pru0_gpo4 */
+
+/* P8_12 (ball AG6) gpio3_10 */
+#define P8_12_DEFAULT P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d6.gpio3_10 */
+#define P8_12_GPIO P8_12( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin1a_d6.gpio3_10 */
+#define P8_12_GPIO_PU P8_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin1a_d6.gpio3_10 */
+#define P8_12_GPIO_PD P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d6.gpio3_10 */
+#define P8_12_GPIO_INPUT P8_12( PIN_INPUT | MUX_MODE14) /* vin1a_d6.gpio3_10 */
+#define P8_12_QEP P8_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* vin1a_d6.eQEP2A_in */
+#define P8_12_TIMER P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vin1a_d6.pr1_pru0_gpo3 */
+
+/* P8_13 (ball D3) gpio4_11 */
+#define P8_13_DEFAULT P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d10.gpio4_11 */
+#define P8_13_GPIO P8_13( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d10.gpio4_11 */
+#define P8_13_GPIO_PU P8_13( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d10.gpio4_11 */
+#define P8_13_GPIO_PD P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d10.gpio4_11 */
+#define P8_13_GPIO_INPUT P8_13( PIN_INPUT | MUX_MODE14) /* vin2a_d10.gpio4_11 */
+#define P8_13_PWM P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d10.ehrpwm2B */
+
+/* P8_14 (ball D5) gpio4_13*/
+#define P8_14_DEFAULT P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d12.gpio4_13 */
+#define P8_14_GPIO P8_14( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d12.gpio4_13 */
+#define P8_14_GPIO_PU P8_14( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d12.gpio4_13 */
+#define P8_14_GPIO_PD P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d12.gpio4_13 */
+#define P8_14_GPIO_INPUT P8_14( PIN_INPUT | MUX_MODE14) /* vin2a_d12.gpio4_13 */
+#define P8_14_PWM P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d12.eCAP2_in_PWM2_out */
+
+/* P8_15 (ball D1) gpio4_3 & (ball A3) gpio4_27*/
+#define P8_15_DEFAULT P8_15A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_15B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d2.gpio4_3, vin2a_d19.off */
+#define P8_15_GPIO P8_15A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_15B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d2.gpio4_3, vin2a_d19.off */
+#define P8_15_GPIO_PU P8_15A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_15B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d2.gpio4_3, vin2a_d19.off */
+#define P8_15_GPIO_PD P8_15A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_15B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d2.gpio4_3, vin2a_d19.off */
+#define P8_15_GPIO_INPUT P8_15A( PIN_INPUT | MUX_MODE14) P8_15B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d2.gpio4_3, vin2a_d19.off */
+#define P8_15_PRU_ECAP P8_15A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE11) P8_15B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d2.pr1_ecap0_ecap_capin_apwm_o, vin2a_d19.off */
+#define P8_15_PRUIN P8_15B( PIN_INPUT | MUX_MODE12) P8_15A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d19.pr1_pru1_gpi16, vin2a_d2.off */
+
+/* P8_16 (ball B4) gpio4_29 */
+#define P8_16_DEFAULT P8_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d21.gpio4_29 */
+#define P8_16_GPIO P8_16( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d21.gpio4_29 */
+#define P8_16_GPIO_PU P8_16( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d21.gpio4_29 */
+#define P8_16_GPIO_PD P8_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d21.gpio4_29 */
+#define P8_16_GPIO_INPUT P8_16( PIN_INPUT | MUX_MODE14) /* vin2a_d21.gpio4_29 */
+#define P8_16_PRUIN P8_16( PIN_INPUT | MUX_MODE12) /* vin2a_d21.pr1_pru1_gpi18 */
+
+/* P8_17 (ball A7) gpio8_18 */
+#define P8_17_DEFAULT P8_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d18.gpio8_18 */
+#define P8_17_GPIO P8_17( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d18.gpio8_18 */
+#define P8_17_GPIO_PU P8_17( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d18.gpio8_18 */
+#define P8_17_GPIO_PD P8_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d18.gpio8_18 */
+#define P8_17_GPIO_INPUT P8_17( PIN_INPUT | MUX_MODE14) /* vout1_d18.gpio8_18 */
+
+/* P8_18 (ball F5) gpio4_9 */
+#define P8_18_DEFAULT P8_18( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d8.gpio4_9 */
+#define P8_18_GPIO P8_18( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d8.gpio4_9 */
+#define P8_18_GPIO_PU P8_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d8.gpio4_9 */
+#define P8_18_GPIO_PD P8_18( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d8.gpio4_9 */
+#define P8_18_GPIO_INPUT P8_18( PIN_INPUT | MUX_MODE14) /* vin2a_d8.gpio4_9 */
+#define P8_18_QEP P8_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* vin2a_d8.eQEP2_strobe */
+
+/* P8_19 (ball E6) gpio4_10 */
+#define P8_19_DEFAULT P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d9.gpio4_10 */
+#define P8_19_GPIO P8_19( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d9.gpio4_10 */
+#define P8_19_GPIO_PU P8_19( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d9.gpio4_10 */
+#define P8_19_GPIO_PD P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d9.gpio4_10 */
+#define P8_19_GPIO_INPUT P8_19( PIN_INPUT | MUX_MODE14) /* vin2a_d9.gpio4_10 */
+#define P8_19_PWM P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d9.ehrpwm2A */
+
+/* P8_20 (ball AC4) gpio6_30 */
+#define P8_20_DEFAULT P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
+#define P8_20_GPIO P8_20( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
+#define P8_20_GPIO_PU P8_20( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
+#define P8_20_GPIO_PD P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
+#define P8_20_GPIO_INPUT P8_20( PIN_INPUT | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
+#define P8_20_PRUOUT P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* mmc3_cmd.pr2_pru0_gpo3 */
+#define P8_20_PRUIN P8_20( PIN_INPUT | MUX_MODE12) /* mmc3_cmd.pr2_pru0_gpi3 */
+
+/* P8_21 (ball AD4) gpio6_29 */
+#define P8_21_DEFAULT P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_clk.gpio6_29 */
+#define P8_21_GPIO P8_21( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_clk.gpio6_29 */
+#define P8_21_GPIO_PU P8_21( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_clk.gpio6_29 */
+#define P8_21_GPIO_PD P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_clk.gpio6_29 */
+#define P8_21_GPIO_INPUT P8_21( PIN_INPUT | MUX_MODE14) /* mmc3_clk.gpio6_29 */
+#define P8_21_PRUOUT P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* mmc3_clk.pr2_pru0_gpo2 */
+#define P8_21_PRUIN P8_21( PIN_INPUT | MUX_MODE12) /* mmc3_clk.pr2_pru0_gpi2 */
+
+/* P8_22 (ball AD6) gpio1_23 */
+#define P8_22_DEFAULT P8_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
+#define P8_22_GPIO P8_22( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
+#define P8_22_GPIO_PU P8_22( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
+#define P8_22_GPIO_PD P8_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
+#define P8_22_GPIO_INPUT P8_22( PIN_INPUT | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
+
+/* P8_23 (ball AC8) gpio1_22 */
+#define P8_23_DEFAULT P8_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
+#define P8_23_GPIO P8_23( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
+#define P8_23_GPIO_PU P8_23( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
+#define P8_23_GPIO_PD P8_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
+#define P8_23_GPIO_INPUT P8_23( PIN_INPUT | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
+
+/* P8_24 (ball AC6) gpio7_0 */
+#define P8_24_DEFAULT P8_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
+#define P8_24_GPIO P8_24( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
+#define P8_24_GPIO_PU P8_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
+#define P8_24_GPIO_PD P8_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
+#define P8_24_GPIO_INPUT P8_24( PIN_INPUT | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
+
+/* P8_25 (ball AC7) gpio6_31 */
+#define P8_25_DEFAULT P8_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
+#define P8_25_GPIO P8_25( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
+#define P8_25_GPIO_PU P8_25( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
+#define P8_25_GPIO_PD P8_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
+#define P8_25_GPIO_INPUT P8_25( PIN_INPUT | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
+
+/* P8_26 (ball B3) gpio4_28 */
+#define P8_26_DEFAULT P8_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d20.gpio4_28 */
+#define P8_26_GPIO P8_26( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d20.gpio4_28 */
+#define P8_26_GPIO_PU P8_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d20.gpio4_28 */
+#define P8_26_GPIO_PD P8_26( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d20.gpio4_28 */
+#define P8_26_GPIO_INPUT P8_26( PIN_INPUT | MUX_MODE14) /* vin2a_d20.gpio4_28 */
+
+/* P8_27 (ball E11) gpio4_23 & (ball A8) gpio8_19 */
+#define P8_27_DEFAULT P8_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_27B( PIN_OUTPUT | MUX_MODE15) /* vout1_vsync.gpio4_23, vout1_d19.off */
+#define P8_27_GPIO P8_27A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_27B( PIN_OUTPUT | MUX_MODE15) /* vout1_vsync.gpio4_23, vout1_d19.off */
+#define P8_27_GPIO_PU P8_27A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_27B( PIN_OUTPUT | MUX_MODE15) /* vout1_vsync.gpio4_23, vout1_d19.off */
+#define P8_27_GPIO_PD P8_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_27B( PIN_OUTPUT | MUX_MODE15) /* vout1_vsync.gpio4_23, vout1_d19.off */
+#define P8_27_GPIO_INPUT P8_27A( PIN_INPUT | MUX_MODE14) P8_27B( PIN_OUTPUT | MUX_MODE15) /* vout1_vsync.gpio4_23, vout1_d19.off */
+#define P8_27_PRUOUT P8_27B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P8_27A( PIN_OUTPUT | MUX_MODE15) /* vout1_d19.pr2_pru0_gpo16, vout1_vsync.off */
+#define P8_27_PRUIN P8_27B( PIN_INPUT | MUX_MODE12) P8_27A( PIN_OUTPUT | MUX_MODE15) /* vout1_d19.pr2_pru0_gpi16, vout1_vsync.off */
+
+/* P8_28 (ball D11) gpio4_19 & (ball C9) gpio8_20 */
+#define P8_28A_DEFAULT P8_28A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_28B( PIN_OUTPUT | MUX_MODE15) /* vout1_clk.gpio4_19, vout1_d20.off */
+#define P8_28A_GPIO P8_28A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_28B( PIN_OUTPUT | MUX_MODE15) /* vout1_clk.gpio4_19, vout1_d20.off */
+#define P8_28A_GPIO_PU P8_28A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_28B( PIN_OUTPUT | MUX_MODE15) /* vout1_clk.gpio4_19, vout1_d20.off */
+#define P8_28A_GPIO_PD P8_28A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_28B( PIN_OUTPUT | MUX_MODE15) /* vout1_clk.gpio4_19, vout1_d20.off */
+#define P8_28A_GPIO_INPUT P8_28A( PIN_INPUT | MUX_MODE14) P8_28B( PIN_OUTPUT | MUX_MODE15) /* vout1_clk.gpio4_19, vout1_d20.off */
+#define P8_28A_PRUOUT P8_28B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P8_28A( PIN_OUTPUT | MUX_MODE15) /* vout1_d20.pr2_pru0_gpo17, vout1_clk.off */
+#define P8_28A_PRUIN P8_28B( PIN_INPUT | MUX_MODE12) P8_28A( PIN_OUTPUT | MUX_MODE15) /* vout1_d20.pr2_pru0_gpi17, vout1_clk.off */
+
+/* P8_29 (ball C11) gpio4_22 & (ball A9) gpio8_21*/
+#define P8_29_DEFAULT P8_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_29B( PIN_OUTPUT | MUX_MODE15) /* vout1_hsync.gpio4_22, vout1_d21.off */
+#define P8_29_GPIO P8_29A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_29B( PIN_OUTPUT | MUX_MODE15) /* vout1_hsync.gpio4_22, vout1_d21.off */
+#define P8_29_GPIO_PU P8_29A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_29B( PIN_OUTPUT | MUX_MODE15) /* vout1_hsync.gpio4_22, vout1_d21.off */
+#define P8_29_GPIO_PD P8_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_29B( PIN_OUTPUT | MUX_MODE15) /* vout1_hsync.gpio4_22, vout1_d21.off */
+#define P8_29_GPIO_INPUT P8_29A( PIN_INPUT | MUX_MODE14) P8_29B( PIN_OUTPUT | MUX_MODE15) /* vout1_hsync.gpio4_22, vout1_d21.off */
+#define P8_29_PRUOUT P8_29B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P8_29A( PIN_OUTPUT | MUX_MODE15) /* vout1_d21.pr2_pru0_gpo18, vout1_hsync.off */
+#define P8_29_PRUIN P8_29B( PIN_INPUT | MUX_MODE12) P8_29A( PIN_OUTPUT | MUX_MODE15) /* vout1_d21.pr2_pru0_gpi18, vout1_hsync.off */
+
+/* P8_30 (ball B10) gpio4_20 & (ball B9) gpio8_22 */
+#define P8_30_DEFAULT P8_30A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_30B( PIN_OUTPUT | MUX_MODE15) /* vout1_de.gpio4_20, vout1_d22.off */
+#define P8_30_GPIO P8_30A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_30B( PIN_OUTPUT | MUX_MODE15) /* vout1_de.gpio4_20, vout1_d22.off */
+#define P8_30_GPIO_PU P8_30A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_30B( PIN_OUTPUT | MUX_MODE15) /* vout1_de.gpio4_20, vout1_d22.off */
+#define P8_30_GPIO_PD P8_30A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_30B( PIN_OUTPUT | MUX_MODE15) /* vout1_de.gpio4_20, vout1_d22.off */
+#define P8_30_GPIO_INPUT P8_30A( PIN_INPUT | MUX_MODE14) P8_30B( PIN_OUTPUT | MUX_MODE15) /* vout1_de.gpio4_20, vout1_d22.off */
+#define P8_30_PRUOUT P8_30B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P8_30A( PIN_OUTPUT | MUX_MODE15) /* vout1_d22.pr2_pru0_gpo19, vout1_de.off */
+#define P8_30_PRUIN P8_30B( PIN_INPUT | MUX_MODE12) P8_30A( PIN_OUTPUT | MUX_MODE15) /* vout1_d22.pr2_pru0_gpi19, vout1_de.off */
+
+/* P8_31 (ball C8) gpio8_14 & (ball G16) */
+#define P8_31_DEFAULT P8_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_31B( PIN_OUTPUT | MUX_MODE15) /* vout1_d14.gpio8_14, mcasp4_axr0.off */
+#define P8_31_GPIO P8_31A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_31B( PIN_OUTPUT | MUX_MODE15) /* vout1_d14.gpio8_14, mcasp4_axr0.off */
+#define P8_31_GPIO_PU P8_31A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_31B( PIN_OUTPUT | MUX_MODE15) /* vout1_d14.gpio8_14, mcasp4_axr0.off */
+#define P8_31_GPIO_PD P8_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_31B( PIN_OUTPUT | MUX_MODE15) /* vout1_d14.gpio8_14, mcasp4_axr0.off */
+#define P8_31_GPIO_INPUT P8_31A( PIN_INPUT | MUX_MODE14) P8_31B( PIN_OUTPUT | MUX_MODE15) /* vout1_d14.gpio8_14, mcasp4_axr0.off */
+#define P8_31_UART P8_31B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) P8_31A( PIN_OUTPUT | MUX_MODE15) /* mcasp4_axr0.uart4_rxd,vout1_d14.off */
+
+/* P8_32 (ball C7) gpio8_15 & (ball D17) */
+#define P8_32_DEFAULT P8_32A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_32B( PIN_OUTPUT | MUX_MODE15) /* vout1_d15.gpio8_15, mcasp4_axr1.off */
+#define P8_32_GPIO P8_32A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_32B( PIN_OUTPUT | MUX_MODE15) /* vout1_d15.gpio8_15, mcasp4_axr1.off */
+#define P8_32_GPIO_PU P8_32A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_32B( PIN_OUTPUT | MUX_MODE15) /* vout1_d15.gpio8_15, mcasp4_axr1.off */
+#define P8_32_GPIO_PD P8_32A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_32B( PIN_OUTPUT | MUX_MODE15) /* vout1_d15.gpio8_15, mcasp4_axr1.off */
+#define P8_32_GPIO_INPUT P8_32A( PIN_INPUT | MUX_MODE14) P8_32B( PIN_OUTPUT | MUX_MODE15) /* vout1_d15.gpio8_15, mcasp4_axr1.off */
+#define P8_32_UART P8_32B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) P8_32A( PIN_OUTPUT | MUX_MODE15) /* mcasp4_axr1.uart4_txd, vout1_d15.off */
+
+/* P8_33 (ball C6) gpio8_13 & (ball AF9) gpio3_1 */
+#define P8_33_DEFAULT P8_33A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_33B( PIN_OUTPUT | MUX_MODE15) /* vout1_d13.gpio8_13, vin1a_fld0.off */
+#define P8_33_GPIO P8_33A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_33B( PIN_OUTPUT | MUX_MODE15) /* vout1_d13.gpio8_13, vin1a_fld0.off */
+#define P8_33_GPIO_PU P8_33A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_33B( PIN_OUTPUT | MUX_MODE15) /* vout1_d13.gpio8_13, vin1a_fld0.off */
+#define P8_33_GPIO_PD P8_33A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_33B( PIN_OUTPUT | MUX_MODE15) /* vout1_d13.gpio8_13, vin1a_fld0.off */
+#define P8_33_GPIO_INPUT P8_33A( PIN_INPUT | MUX_MODE14) P8_33B( PIN_OUTPUT | MUX_MODE15) /* vout1_d13.gpio8_13, vin1a_fld0.off */
+#define P8_33_QEP P8_33B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P8_33A( PIN_OUTPUT | MUX_MODE15) /* vin1a_fld0.eQEP1B_in, vout1_d13.off */
+
+/* P8_34 (ball D8) gpio8_11 & (ball G6) gpio4_0 */
+#define P8_34_DEFAULT P8_34A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_34B( PIN_OUTPUT | MUX_MODE15) /* vout1_d11.gpio8_11, vin2a_vsync0.off */
+#define P8_34_GPIO P8_34A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_34B( PIN_OUTPUT | MUX_MODE15) /* vout1_d11.gpio8_11, vin2a_vsync0.off */
+#define P8_34_GPIO_PU P8_34A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_34B( PIN_OUTPUT | MUX_MODE15) /* vout1_d11.gpio8_11, vin2a_vsync0.off */
+#define P8_34_GPIO_PD P8_34A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_34B( PIN_OUTPUT | MUX_MODE15) /* vout1_d11.gpio8_11, vin2a_vsync0.off */
+#define P8_34_GPIO_INPUT P8_34A( PIN_INPUT | MUX_MODE14) P8_34B( PIN_OUTPUT | MUX_MODE15) /* vout1_d11.gpio8_11, vin2a_vsync0.off */
+#define P8_34_PWM P8_34B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) P8_34A( PIN_OUTPUT | MUX_MODE15) /* vin2a_vsync0.ehrpwm1A, vout1_d11.off */
+
+/* P8_35 (ball A5) gpio8_12 & (ball AD9) gpio3_0 */
+#define P8_35_DEFAULT P8_35A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_35B( PIN_OUTPUT | MUX_MODE15) /* vout1_d12.gpio8_12, vin1a_de0.off */
+#define P8_35_GPIO P8_35A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_35B( PIN_OUTPUT | MUX_MODE15) /* vout1_d12.gpio8_12, vin1a_de0.off */
+#define P8_35_GPIO_PU P8_35A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_35B( PIN_OUTPUT | MUX_MODE15) /* vout1_d12.gpio8_12, vin1a_de0.off */
+#define P8_35_GPIO_PD P8_35A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_35B( PIN_OUTPUT | MUX_MODE15) /* vout1_d12.gpio8_12, vin1a_de0.off */
+#define P8_35_GPIO_INPUT P8_35A( PIN_INPUT | MUX_MODE14) P8_35B( PIN_OUTPUT | MUX_MODE15) /* vout1_d12.gpio8_12, vin1a_de0.off */
+#define P8_35_QEP P8_35B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P8_35A( PIN_OUTPUT | MUX_MODE15) /* vin1a_de0.eQEP1A_in, vout1_d12.off */
+
+/* P8_36 (ball D7) gpio8_10 & (ball F2) gpio4_1*/
+#define P8_36_DEFAULT P8_36A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_36B( PIN_OUTPUT | MUX_MODE15) /* vout1_d10.gpio8_10, vin2a_d0.off */
+#define P8_36_GPIO P8_36A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_36B( PIN_OUTPUT | MUX_MODE15) /* vout1_d10.gpio8_10, vin2a_d0.off */
+#define P8_36_GPIO_PU P8_36A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_36B( PIN_OUTPUT | MUX_MODE15) /* vout1_d10.gpio8_10, vin2a_d0.off */
+#define P8_36_GPIO_PD P8_36A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_36B( PIN_OUTPUT | MUX_MODE15) /* vout1_d10.gpio8_10, vin2a_d0.off */
+#define P8_36_GPIO_INPUT P8_36A( PIN_INPUT | MUX_MODE14) P8_36B( PIN_OUTPUT | MUX_MODE15) /* vout1_d10.gpio8_10, vin2a_d0.off */
+#define P8_36_PWM P8_36B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) P8_36A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d0.ehrpwm1B, vout1_d10.off */
+
+/* P8_37 (ball E8) gpio8_8 & (ball A21)*/
+#define P8_37_DEFAULT P8_37A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_37B( PIN_OUTPUT | MUX_MODE15) /* vout1_d8.gpio8_8, mcasp4_fsx.off */
+#define P8_37_GPIO P8_37A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_37B( PIN_OUTPUT | MUX_MODE15) /* vout1_d8.gpio8_8, mcasp4_fsx.off */
+#define P8_37_GPIO_PU P8_37A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_37B( PIN_OUTPUT | MUX_MODE15) /* vout1_d8.gpio8_8, mcasp4_fsx.off */
+#define P8_37_GPIO_PD P8_37A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_37B( PIN_OUTPUT | MUX_MODE15) /* vout1_d8.gpio8_8, mcasp4_fsx.off */
+#define P8_37_GPIO_INPUT P8_37A( PIN_INPUT | MUX_MODE14) P8_37B( PIN_OUTPUT | MUX_MODE15) /* vout1_d8.gpio8_8, mcasp4_fsx.off */
+#define P8_37_UART P8_37B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P8_37A( PIN_OUTPUT | MUX_MODE15) /* mcasp4_fsx.uart8_txd. vout1_d8.off */
+
+/* P8_38a (ball D9) gpio8_9 */
+#define P8_38_DEFAULT P8_38A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_38B( PIN_OUTPUT | MUX_MODE15) /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
+#define P8_38_GPIO P8_38A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_38B( PIN_OUTPUT | MUX_MODE15) /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
+#define P8_38_GPIO_PU P8_38A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_38B( PIN_OUTPUT | MUX_MODE15) /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
+#define P8_38_GPIO_PD P8_38A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_38B( PIN_OUTPUT | MUX_MODE15) /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
+#define P8_38_GPIO_INPUT P8_38A( PIN_INPUT | MUX_MODE14) P8_38B( PIN_OUTPUT | MUX_MODE15) /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
+#define P8_38_UART P8_38B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P8_38A( PIN_OUTPUT | MUX_MODE15) /* mcasp4_aclkx.uart8_rxd, vout1_d9.off */
+
+/* P8_39 (ball F8) gpio8_6 */
+#define P8_39_DEFAULT P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d6.gpio8_6 */
+#define P8_39_GPIO P8_39( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d6.gpio8_6 */
+#define P8_39_GPIO_PU P8_39( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d6.gpio8_6 */
+#define P8_39_GPIO_PD P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d6.gpio8_6 */
+#define P8_39_GPIO_INPUT P8_39( PIN_INPUT | MUX_MODE14) /* vout1_d6.gpio8_6 */
+#define P8_39_PRUOUT P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d6.pr2_pru0_gpo3 */
+#define P8_39_PRUIN P8_39( PIN_INPUT | MUX_MODE12) /* vout1_d6.pr2_pru0_gpi3 */
+
+/* P8_40 (ball E7) gpio8_7 */
+#define P8_40_DEFAULT P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d7.gpio8_7 */
+#define P8_40_GPIO P8_40( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d7.gpio8_7 */
+#define P8_40_GPIO_PU P8_40( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d7.gpio8_7 */
+#define P8_40_GPIO_PD P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d7.gpio8_7 */
+#define P8_40_GPIO_INPUT P8_40( PIN_INPUT | MUX_MODE14) /* vout1_d7.gpio8_7 */
+#define P8_40_PRUOUT P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d7.pr2_pru0_gpo4 */
+#define P8_40_PRUIN P8_40( PIN_INPUT | MUX_MODE12) /* vout1_d7.pr2_pru0_gpi4 */
+
+/* P8_41 (ball E9) gpio8_4 */
+#define P8_41_DEFAULT P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d4.gpio8_4 */
+#define P8_41_GPIO P8_41( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d4.gpio8_4 */
+#define P8_41_GPIO_PU P8_41( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d4.gpio8_4 */
+#define P8_41_GPIO_PD P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d4.gpio8_4 */
+#define P8_41_GPIO_INPUT P8_41( PIN_INPUT | MUX_MODE14) /* vout1_d4.gpio8_4 */
+#define P8_41_PRUOUT P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d4.pr2_pru0_gpo1 */
+#define P8_41_PRUIN P8_41( PIN_INPUT | MUX_MODE12) /* vout1_d4.pr2_pru0_gpi1 */
+
+/* P8_42 (ball F9) gpio8_5 */
+#define P8_42_DEFAULT P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d5.gpio8_5 */
+#define P8_42_GPIO P8_42( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d5.gpio8_5 */
+#define P8_42_GPIO_PU P8_42( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d5.gpio8_5 */
+#define P8_42_GPIO_PD P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d5.gpio8_5 */
+#define P8_42_GPIO_INPUT P8_42( PIN_INPUT | MUX_MODE14) /* vout1_d5.gpio8_5 */
+#define P8_42_PRUOUT P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d5.pr2_pru0_gpo2 */
+#define P8_42_PRUIN P8_42( PIN_INPUT | MUX_MODE12) /* vout1_d5.pr2_pru0_gpi2 */
+
+/* P8_43 (ball F10) gpio8_2 */
+#define P8_43_DEFAULT P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d2.gpio8_2 */
+#define P8_43_GPIO P8_43( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d2.gpio8_2 */
+#define P8_43_GPIO_PU P8_43( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d2.gpio8_2 */
+#define P8_43_GPIO_PD P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d2.gpio8_2 */
+#define P8_43_GPIO_INPUT P8_43( PIN_INPUT | MUX_MODE14) /* vout1_d2.gpio8_2 */
+#define P8_43_PRUOUT P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d2.pr2_pru1_gpo20 */
+#define P8_43_PRUIN P8_43( PIN_INPUT | MUX_MODE12) /* vout1_d2.pr2_pru1_gpi20 */
+
+/* P8_44 (ball G11) gpio8_3 */
+#define P8_44_DEFAULT P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d3.gpio8_3 */
+#define P8_44_GPIO P8_44( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d3.gpio8_3 */
+#define P8_44_GPIO_PU P8_44( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d3.gpio8_3 */
+#define P8_44_GPIO_PD P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d3.gpio8_3 */
+#define P8_44_GPIO_INPUT P8_44( PIN_INPUT | MUX_MODE14) /* vout1_d3.gpio8_3 */
+#define P8_44_PRUOUT P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d3.pr2_pru0_gpo0 */
+#define P8_44_PRUIN P8_44( PIN_INPUT | MUX_MODE12) /* vout1_d3.pr2_pru0_gpi0 */
+
+/* P8_45 (ball F11) gpio8_0 & (ball B7) gpio8_16*/
+#define P8_45_DEFAULT P8_45A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_45B( PIN_OUTPUT | MUX_MODE15) /* vout1_d0.gpio8_0, vout1_d16.off */
+#define P8_45_GPIO P8_45A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_45B( PIN_OUTPUT | MUX_MODE15) /* vout1_d0.gpio8_0, vout1_d16.off */
+#define P8_45_GPIO_PU P8_45A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_45B( PIN_OUTPUT | MUX_MODE15) /* vout1_d0.gpio8_0, vout1_d16.off */
+#define P8_45_GPIO_PD P8_45A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_45B( PIN_OUTPUT | MUX_MODE15) /* vout1_d0.gpio8_0, vout1_d16.off */
+#define P8_45_GPIO_INPUT P8_45A( PIN_INPUT | MUX_MODE14) P8_45B( PIN_OUTPUT | MUX_MODE15) /* vout1_d0.gpio8_0, vout1_d16.off */
+#define P8_45_PRUOUT P8_45B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P8_45A( PIN_OUTPUT | MUX_MODE15) /* vout1_d16.pr2_pru0_gpo13, vout1_d0.off */
+#define P8_45_PRUIN P8_45B( PIN_INPUT | MUX_MODE12) P8_45A( PIN_OUTPUT | MUX_MODE15) /* vout1_d16.pr2_pru0_gpi13, vout1_d0.off */
+
+/* P8_46a (ball G10) gpio8_1 & (ball A10) gpio8_23*/
+#define P8_46_DEFAULT P8_46A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_46B( PIN_OUTPUT | MUX_MODE15) /* vout1_d1.gpio8_1, vout1_d23.off */
+#define P8_46_GPIO P8_46A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_46B( PIN_OUTPUT | MUX_MODE15) /* vout1_d1.gpio8_1, vout1_d23.off */
+#define P8_46_GPIO_PU P8_46A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_46B( PIN_OUTPUT | MUX_MODE15) /* vout1_d1.gpio8_1, vout1_d23.off */
+#define P8_46_GPIO_PD P8_46A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_46B( PIN_OUTPUT | MUX_MODE15) /* vout1_d1.gpio8_1, vout1_d23.off */
+#define P8_46_GPIO_INPUT P8_46A( PIN_INPUT | MUX_MODE14) P8_46B( PIN_OUTPUT | MUX_MODE15) /* vout1_d1.gpio8_1, vout1_d23.off */
+#define P8_46_PRUOUT P8_46B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P8_46A( PIN_OUTPUT | MUX_MODE15) /* vout1_d23.pr2_pru0_gpo20, vout1_d1.off */
+#define P8_46_PRUIN P8_46B( PIN_INPUT | MUX_MODE12) P8_46A( PIN_OUTPUT | MUX_MODE15) /* vout1_d23.pr2_pru0_gpi20, vout1_d1.off */
+
+/********************************/
+/* BBAI P9 Header pinmux macros */
+/********************************/
+/* P9_01 GND */
+/* P9_02 GND */
+/* P9_03 3V3 */
+/* P9_04 3V3 */
+/* P9_05 VDD_5V */
+/* P9_06 VDD_5V */
+/* P9_07 SYS_5V */
+/* P9_08 SYS_5V */
+/* P9_09 PWR_BUT */
+/* P9_10 RSTn */
+
+/* P9_11 (ball B19) & (ball B8) gpio8_17*/
+#define P9_11_UART P9_11A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) P9_11B( PIN_OUTPUT | MUX_MODE15) /* mcasp3_axr0.uart5_rxd, vout1_d17.off */
+#define P9_11_DEFAULT P9_11B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_11A( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.gpio8_17, mcasp3_axr0.off */
+#define P9_11_GPIO P9_11B( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_11A( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.gpio8_17, mcasp3_axr0.off */
+#define P9_11_GPIO_PU P9_11B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_11A( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.gpio8_17, mcasp3_axr0.off */
+#define P9_11_GPIO_PD P9_11B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_11A( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.gpio8_17, mcasp3_axr0.off */
+#define P9_11_GPIO_INPUT P9_11B( PIN_INPUT | MUX_MODE14) P9_11A( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.gpio8_17, mcasp3_axr0.off */
+
+/* P9_12 (ball B14) gpio5_0 */
+#define P9_12_DEFAULT P9_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
+#define P9_12_GPIO P9_12( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
+#define P9_12_GPIO_PU P9_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
+#define P9_12_GPIO_PD P9_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
+#define P9_12_GPIO_INPUT P9_12( PIN_INPUT | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
+
+/* P9_13 (ball C17) & (ball AB10) gpio6_12*/
+#define P9_13_UART P9_13A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) P9_13B( PIN_OUTPUT | MUX_MODE15) /* mcasp3_axr1.uart5_txd, usb1_drvvbus.off */
+#define P9_13_DEFAULT P9_13B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
+#define P9_13_GPIO P9_13B( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
+#define P9_13_GPIO_PU P9_13B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
+#define P9_13_GPIO_PD P9_13B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
+#define P9_13_GPIO_INPUT P9_13B( PIN_INPUT | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
+
+/* P9_14 (ball D6) gpio4_25 */
+#define P9_14_DEFAULT P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d17.gpio4_25 */
+#define P9_14_GPIO P9_14( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d17.gpio4_25 */
+#define P9_14_GPIO_PU P9_14( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d17.gpio4_25 */
+#define P9_14_GPIO_PD P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d17.gpio4_25 */
+#define P9_14_GPIO_INPUT P9_14( PIN_INPUT | MUX_MODE14) /* vin2a_d17.gpio4_25 */
+#define P9_14_PWM P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d17.ehrpwm3A */
+
+/* P9_15 (ball AG4) gpio3_12 */
+#define P9_15_DEFAULT P9_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d8.gpio3_12 */
+#define P9_15_GPIO P9_15( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin1a_d8.gpio3_12 */
+#define P9_15_GPIO_PU P9_15( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin1a_d8.gpio3_12 */
+#define P9_15_GPIO_PD P9_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d8.gpio3_12 */
+#define P9_15_GPIO_INPUT P9_15( PIN_INPUT | MUX_MODE14) /* vin1a_d8.gpio3_12 */
+
+/* P9_16 (ball C5) gpio4_26 */
+#define P9_16_DEFAULT P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d18.gpio4_26 */
+#define P9_16_GPIO P9_16( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d18.gpio4_26 */
+#define P9_16_GPIO_PU P9_16( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d18.gpio4_26 */
+#define P9_16_GPIO_PD P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d18.gpio4_26 */
+#define P9_16_GPIO_INPUT P9_16( PIN_INPUT | MUX_MODE14) /* vin2a_d18.gpio4_26 */
+#define P9_16_PWM P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d18.ehrpwm3B */
+
+/* P9_17 (ball B24) gpio7_17 and (ball F12) gpio5_3*/
+#define P9_17_DEFAULT P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
+#define P9_17_GPIO P9_17A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
+#define P9_17_GPIO_PU P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
+#define P9_17_GPIO_PD P9_17A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
+#define P9_17_GPIO_INPUT P9_17A( PIN_INPUT | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
+#define P9_17_SPI P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.spi2_cs0 */
+#define P9_17_I2C P9_17B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P9_17A( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr1.i2c5_scl */
+#define P9_17_UART P9_17B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_17A( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr1.uart6_txd */
+
+/* P9_18 (ball G17) gpio7_16 & (ball F4) gpio4_6*/
+#define P9_18_DEFAULT P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+#define P9_18_GPIO P9_18A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+#define P9_18_GPIO_PU P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+#define P9_18_GPIO_PD P9_18A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+#define P9_18_GPIO_INPUT P9_18A( PIN_INPUT | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+#define P9_18_SPI P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.spi2_d0, mcasp1_axr0.off */
+#define P9_18_I2C P9_18B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P9_18A( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr0.i2c5_sda, spi2_d0.off */
+#define P9_18_UART P9_18B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_18A( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr0.uart6_rxd, spi2_d0.off */
+
+/* P9_19 (ball R6) gpio7_3 & (ball F4) gpio4_6*/
+#define P9_19_DEFAULT P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
+#define P9_19_GPIO P9_19A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
+#define P9_19_GPIO_PU P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
+#define P9_19_GPIO_PD P9_19A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
+#define P9_19_GPIO_INPUT P9_19A( PIN_INPUT | MUX_MODE14) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
+#define P9_19_I2C P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.i2c4_scl, gpmc_a0.off */
+#define P9_19_QEP P9_19B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P9_19A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d5.eQEP2A_in, gpmc_a0.off */
+
+/* P9_20 (ball T9) gpio7_4 & (ball D2) gpio4_5*/
+#define P9_20_DEFAULT P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
+#define P9_20_GPIO P9_20A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
+#define P9_20_GPIO_PU P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
+#define P9_20_GPIO_PD P9_20A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
+#define P9_20_GPIO_INPUT P9_20A( PIN_INPUT | MUX_MODE14) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
+#define P9_20_I2C P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.i2c4_sda, vin2a_d4.off */
+#define P9_20_PRUOUT P9_20B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_20A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d4.pr1_pru1_gpo1, gpmc_a1.off */
+#define P9_20_PRUIN P9_20B( PIN_INPUT | MUX_MODE12) P9_20A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d4.pr1_pru1_gpi1, gpmc_a1.off */
+
+/* P9_21 (ball AF8) gpio3_3 & (ball B22) gpio7_15*/
+#define P9_21_DEFAULT P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+#define P9_21_GPIO P9_21A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+#define P9_21_GPIO_PU P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+#define P9_21_GPIO_PD P9_21A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+#define P9_21_GPIO_INPUT P9_21A( PIN_INPUT | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+#define P9_21_QEP P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.eQEP1_strobe,spi2_d1.off */
+#define P9_21_SPI P9_21B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) P9_21A( PIN_OUTPUT | MUX_MODE15) /* spi2_d1.spi2_d1, vin1a_vsync0.off */
+#define P9_21_UART P9_21B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) P9_21A( PIN_OUTPUT | MUX_MODE15) /* spi2_d1.uart3_txd, vin1a_vsync0.off */
+
+/* P9_22 (ball B26) gpio6_19 & ball A26) gpio7_14*/
+#define P9_22_DEFAULT P9_22A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
+#define P9_22_GPIO P9_22A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
+#define P9_22_GPIO_PU P9_22A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
+#define P9_22_GPIO_PD P9_22A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
+#define P9_22_GPIO_INPUT P9_22A( PIN_INPUT | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
+#define P9_22_SPI P9_22B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) P9_22A( PIN_OUTPUT | MUX_MODE15) /* spi2_sclk.spi2_sclk, xref_clk2.off */
+#define P9_22_UART P9_22B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) P9_22A( PIN_OUTPUT | MUX_MODE15) /* spi2_sclk.uart3_rxd, xref_clk2.off */
+
+/* P9_23 (ball A22) gpio7_11 */
+#define P9_23_DEFAULT P9_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* spi1_cs1.gpio7_11 */
+#define P9_23_GPIO P9_23( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* spi1_cs1.gpio7_11 */
+#define P9_23_GPIO_PU P9_23( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* spi1_cs1.gpio7_11 */
+#define P9_23_GPIO_PD P9_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* spi1_cs1.gpio7_11 */
+#define P9_23_GPIO_INPUT P9_23( PIN_INPUT | MUX_MODE14) /* spi1_cs1.gpio7_11 */
+
+/* P9_24 (ball F20) gpio6_15*/
+#define P9_24_DEFAULT P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* gpio6_15.gpio6_15 */
+#define P9_24_GPIO P9_24( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* gpio6_15.gpio6_15 */
+#define P9_24_GPIO_PU P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* gpio6_15.gpio6_15 */
+#define P9_24_GPIO_PD P9_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* gpio6_15.gpio6_15 */
+#define P9_24_GPIO_INPUT P9_24( PIN_INPUT | MUX_MODE14) /* gpio6_15.gpio6_15 */
+#define P9_24_UART P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) /* gpio6_15.uart10_txd */
+#define P9_24_CAN P9_24( PIN_INPUT_PULLUP | MUX_MODE2) /* gpio6_15.dcan2_rx */
+#define P9_24_I2C P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) /* gpio6_15.i2c3_scl */
+
+/* P9_25 (ball D18) gpio6_17 */
+#define P9_25_DEFAULT P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* xref_clk0.gpio6_17 */
+#define P9_25_GPIO P9_25( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* xref_clk0.gpio6_17 */
+#define P9_25_GPIO_PU P9_25( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* xref_clk0.gpio6_17 */
+#define P9_25_GPIO_PD P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* xref_clk0.gpio6_17 */
+#define P9_25_GPIO_INPUT P9_25( PIN_INPUT | MUX_MODE14) /* xref_clk0.gpio6_17 */
+#define P9_25_PRUOUT P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* xref_clk0.pr2_pru1_gpo5 */
+#define P9_25_PRUIN P9_25( PIN_INPUT | MUX_MODE12) /* xref_clk0.pr2_pru1_gpi5 */
+
+/* P9_26 (ball E21) gpio6_14 & (ball AE2) gpio3_24 */
+#define P9_26_DEFAULT P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
+#define P9_26_GPIO P9_26A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
+#define P9_26_GPIO_PU P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
+#define P9_26_GPIO_PD P9_26A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
+#define P9_26_GPIO_INPUT P9_26A( PIN_INPUT | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
+#define P9_26_UART P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.uart10_rxd, vin1a_d20.off */
+#define P9_26_CAN P9_26A( PIN_OUTPUT_PULLUP | MUX_MODE2) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.dcan2_tx, vin1a_d20.off */
+#define P9_26_I2C P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.i2c3_sda, vin1a_d20.off */
+#define P9_26_PRUOUT P9_26B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_26A( PIN_OUTPUT | MUX_MODE15) /* vin1a_d20.pr1_pru0_gpo17, gpio6_14.off */
+#define P9_26_PRUIN P9_26B( PIN_INPUT | MUX_MODE12) P9_26A( PIN_OUTPUT | MUX_MODE15) /* vin1a_d20.pr1_pru0_gpi17, gpio6_14.off */
+
+/* P9_27 (ball C3) gpio4_15 & (ball J14) gpio5_1*/
+#define P9_27_DEFAULT P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+#define P9_27_GPIO P9_27A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+#define P9_27_GPIO_PU P9_27A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+#define P9_27_GPIO_PD P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+#define P9_27_GPIO_INPUT P9_27A( PIN_INPUT | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+#define P9_27_QEP P9_27A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.eQEP3B_in, mcasp1_fsr.off */
+#define P9_27_PRUOUT P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.pr1_pru1_gpo11, mcasp1_fsr.off */
+#define P9_27_PRUIN P9_27A( PIN_INPUT | MUX_MODE12) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.pr1_pru1_gpi11, mcasp1_fsr.off */
+
+/* P9_28 (ball A12) gpio4_17 */
+#define P9_28_DEFAULT P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
+#define P9_28_GPIO P9_28( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
+#define P9_28_GPIO_PU P9_28( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
+#define P9_28_GPIO_PD P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
+#define P9_28_GPIO_INPUT P9_28( PIN_INPUT | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
+#define P9_28_SPI P9_28( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) /* mcasp1_axr11.spi3_cs0 */
+#define P9_28_PRUOUT P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* mcasp1_axr11.pr2_pru1_gpo13 */
+#define P9_28_PRUIN P9_28( PIN_INPUT | MUX_MODE12) /* mcasp1_axr11.pr2_pru1_gpi13 */
+
+/* P9_29 (ball A11) gpio5_11 & (ball D14) gpio7_30*/
+#define P9_29_DEFAULT P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
+#define P9_29_GPIO P9_29A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
+#define P9_29_GPIO_PU P9_29A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
+#define P9_29_GPIO_PD P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
+#define P9_29_GPIO_INPUT P9_29A( PIN_INPUT | MUX_MODE14) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
+#define P9_29_SPI P9_29A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.spi3_d1, mcasp1_fsx.off */
+#define P9_29_PRUOUT P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.pr2_pru1_gpo11, mcasp1_fsx.off */
+#define P9_29_PRUIN P9_29A( PIN_INPUT | MUX_MODE12) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.pr2_pru1_gpi11, mcasp1_fsx.off */
+
+/* P9_30 (ball B13) gpio5_12*/
+#define P9_30_DEFAULT P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
+#define P9_30_GPIO P9_30( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
+#define P9_30_GPIO_PU P9_30( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
+#define P9_30_GPIO_PD P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
+#define P9_30_GPIO_INPUT P9_30( PIN_INPUT | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
+#define P9_30_SPI P9_30( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) /* mcasp1_axr10.spi3_d0 */
+#define P9_30_PRUOUT P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* mcasp1_axr10.pr2_pru1_gpo12 */
+#define P9_30_PRUIN P9_30( PIN_INPUT | MUX_MODE12) /* mcasp1_axr10.pr2_pru1_gpi12 */
+
+/* P9_31 (ball B12) gpio5_10 & (ball C14) gpio7_31*/
+#define P9_31_DEFAULT P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
+#define P9_31_GPIO P9_31A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
+#define P9_31_GPIO_PU P9_31A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
+#define P9_31_GPIO_PD P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
+#define P9_31_GPIO_INPUT P9_31A( PIN_INPUT | MUX_MODE14) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
+#define P9_31_SPI P9_31A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.spi3_sclk, mcasp1_aclkx.off */
+#define P9_31_PRUOUT P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.pr2_pru1_gpo10, mcasp1_aclkx.off */
+#define P9_31_PRUIN P9_31A( PIN_INPUT | MUX_MODE12) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.pr2_pru1_gpi10, mcasp1_aclkx.off */
+
+/* P9_32 VADC */
+/* P9_33 AIN4 */
+/* P9_34 AGND */
+/* P9_35 AIN6 */
+/* P9_36 AIN5 */
+/* P9_37 AIN2 */
+/* P9_38 AIN3 */
+/* P9_39 AIN0 */
+/* P9_40 AIN1 */
+
+/* P9_41 (ball C23) gpio6_20 & (ball C1) gpio4_7*/
+#define P9_41_DEFAULT P9_41A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_41B( PIN_OUTPUT | MUX_MODE15) /* xref_clk3.gpio6_20, vin2a_d6.off */
+#define P9_41_GPIO P9_41A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_41B( PIN_OUTPUT | MUX_MODE15) /* xref_clk3.gpio6_20, vin2a_d6.off */
+#define P9_41_GPIO_PU P9_41A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_41B( PIN_OUTPUT | MUX_MODE15) /* xref_clk3.gpio6_20, vin2a_d6.off */
+#define P9_41_GPIO_PD P9_41A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_41B( PIN_OUTPUT | MUX_MODE15) /* xref_clk3.gpio6_20, vin2a_d6.off */
+#define P9_41_GPIO_INPUT P9_41A( PIN_INPUT | MUX_MODE14) P9_41B( PIN_OUTPUT | MUX_MODE15) /* xref_clk3.gpio6_20, vin2a_d6.off */
+#define P9_41_PRUOUT P9_41B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_41A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d6.pr1_pru1_gpo3, xref_clk3.off */
+#define P9_41_PRUIN P9_41B( PIN_INPUT | MUX_MODE12) P9_41A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d6.pr1_pru1_gpi3, xref_clk3.off */
+
+/* P9_42 (ball E14) gpio4_18 & (ball C2) gpio4_14*/
+#define P9_42_DEFAULT P9_42A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+#define P9_42_GPIO P9_42A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+#define P9_42_GPIO_PU P9_42A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+#define P9_42_GPIO_PD P9_42A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+#define P9_42_GPIO_INPUT P9_42A( PIN_INPUT | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+#define P9_42_SPI P9_42A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.spi3_cs1, vin2a_d13.off */
+#define P9_42_PRUOUT P9_42B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_42A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d13.pr1_pru1_gpo10, mcasp1_axr12.off */
+#define P9_42_PRUIN P9_42B( PIN_INPUT | MUX_MODE12) P9_42A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d13.pr1_pru1_gpi10, mcasp1_axr12.off */
+
+/* P9_43 GND */
+/* P9_44 GND */
+/* P9_45 GND */
+/* P9_46 GND */
+
#endif
\ No newline at end of file
--
GitLab
From 878f4c6a6dc419cb4a89e2bc22de6e40aed3d00c Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Fri, 10 Jul 2020 23:30:14 +0530
Subject: [PATCH 25/86] Update pin header nodes
These nodes are using the new macros from "include/dt-bindings/board/am572x-bbai-pins.h" thus making things cleaner and easier to manage.
---
src/arm/am572x-bone-common-univ.dtsi | 1308 +++++++++-----------------
1 file changed, 436 insertions(+), 872 deletions(-)
diff --git a/src/arm/am572x-bone-common-univ.dtsi b/src/arm/am572x-bone-common-univ.dtsi
index dc109547..105568e4 100644
--- a/src/arm/am572x-bone-common-univ.dtsi
+++ b/src/arm/am572x-bone-common-univ.dtsi
@@ -19,666 +19,395 @@
/* P8_03 (ball AB8) gpio1_24 */
- P8_03_default_pin: pinmux_P8_03_default_pin { pinctrl-single,pins = <
- P8_03( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
- P8_03_gpio_pin: pinmux_P8_03_gpio_pin { pinctrl-single,pins = <
- P8_03( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
- P8_03_gpio_pu_pin: pinmux_P8_03_gpio_pu_pin { pinctrl-single,pins = <
- P8_03( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
- P8_03_gpio_pd_pin: pinmux_P8_03_gpio_pd_pin { pinctrl-single,pins = <
- P8_03( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
- P8_03_gpio_input_pin: pinmux_P8_03_gpio_input_pin { pinctrl-single,pins = <
- P8_03( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03_default_pin: pinmux_P8_03_default_pin { pinctrl-single,pins = < P8_03_DEFAULT >; };
+ P8_03_gpio_pin: pinmux_P8_03_gpio_pin { pinctrl-single,pins = < P8_03_GPIO >; };
+ P8_03_gpio_pu_pin: pinmux_P8_03_gpio_pu_pin { pinctrl-single,pins = < P8_03_GPIO_PU >; };
+ P8_03_gpio_pd_pin: pinmux_P8_03_gpio_pd_pin { pinctrl-single,pins = < P8_03_GPIO_PD >; };
+ P8_03_gpio_input_pin: pinmux_P8_03_gpio_input_pin { pinctrl-single,pins = < P8_03_GPIO_INPUT >; };
/* P8_04 (ball AB5) gpio1_25 */
- P8_04_default_pin: pinmux_P8_04_default_pin { pinctrl-single,pins = <
- P8_04( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
- P8_04_gpio_pin: pinmux_P8_04_gpio_pin { pinctrl-single,pins = <
- P8_04( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
- P8_04_gpio_pu_pin: pinmux_P8_04_gpio_pu_pin { pinctrl-single,pins = <
- P8_04( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
- P8_04_gpio_pd_pin: pinmux_P8_04_gpio_pd_pin { pinctrl-single,pins = <
- P8_04( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
- P8_04_gpio_input_pin: pinmux_P8_04_gpio_input_pin { pinctrl-single,pins = <
- P8_04( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04_default_pin: pinmux_P8_04_default_pin { pinctrl-single,pins = < P8_04_DEFAULT >; };
+ P8_04_gpio_pin: pinmux_P8_04_gpio_pin { pinctrl-single,pins = < P8_04_GPIO >; };
+ P8_04_gpio_pu_pin: pinmux_P8_04_gpio_pu_pin { pinctrl-single,pins = < P8_04_GPIO_PU >; };
+ P8_04_gpio_pd_pin: pinmux_P8_04_gpio_pd_pin { pinctrl-single,pins = < P8_04_GPIO_PD >; };
+ P8_04_gpio_input_pin: pinmux_P8_04_gpio_input_pin { pinctrl-single,pins = < P8_04_GPIO_INPUT >; };
/* P8_05 (ball AC9) gpio7_1 */
- P8_05_default_pin: pinmux_P8_05_default_pin { pinctrl-single,pins = <
- P8_05( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
- P8_05_gpio_pin: pinmux_P8_05_gpio_pin { pinctrl-single,pins = <
- P8_05( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
- P8_05_gpio_pu_pin: pinmux_P8_05_gpio_pu_pin { pinctrl-single,pins = <
- P8_05( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
- P8_05_gpio_pd_pin: pinmux_P8_05_gpio_pd_pin { pinctrl-single,pins = <
- P8_05( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
- P8_05_gpio_input_pin: pinmux_P8_05_gpio_input_pin { pinctrl-single,pins = <
- P8_05( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05_default_pin: pinmux_P8_05_default_pin { pinctrl-single,pins = < P8_05_DEFAULT >; };
+ P8_05_gpio_pin: pinmux_P8_05_gpio_pin { pinctrl-single,pins = < P8_05_GPIO >; };
+ P8_05_gpio_pu_pin: pinmux_P8_05_gpio_pu_pin { pinctrl-single,pins = < P8_05_GPIO_PU >; };
+ P8_05_gpio_pd_pin: pinmux_P8_05_gpio_pd_pin { pinctrl-single,pins = < P8_05_GPIO_PD >; };
+ P8_05_gpio_input_pin: pinmux_P8_05_gpio_input_pin { pinctrl-single,pins = < P8_05_GPIO_INPUT >; };
/* P8_06 (ball AC3) gpio7_2 */
- P8_06_default_pin: pinmux_P8_06_default_pin { pinctrl-single,pins = <
- P8_06( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
- P8_06_gpio_pin: pinmux_P8_06_gpio_pin { pinctrl-single,pins = <
- P8_06( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
- P8_06_gpio_pu_pin: pinmux_P8_06_gpio_pu_pin { pinctrl-single,pins = <
- P8_06( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
- P8_06_gpio_pd_pin: pinmux_P8_06_gpio_pd_pin { pinctrl-single,pins = <
- P8_06( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
- P8_06_gpio_input_pin: pinmux_P8_06_gpio_input_pin { pinctrl-single,pins = <
- P8_06( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06_default_pin: pinmux_P8_06_default_pin { pinctrl-single,pins = < P8_06_DEFAULT >; };
+ P8_06_gpio_pin: pinmux_P8_06_gpio_pin { pinctrl-single,pins = < P8_06_GPIO >; };
+ P8_06_gpio_pu_pin: pinmux_P8_06_gpio_pu_pin { pinctrl-single,pins = < P8_06_GPIO_PU >; };
+ P8_06_gpio_pd_pin: pinmux_P8_06_gpio_pd_pin { pinctrl-single,pins = < P8_06_GPIO_PD >; };
+ P8_06_gpio_input_pin: pinmux_P8_06_gpio_input_pin { pinctrl-single,pins = < P8_06_GPIO_INPUT >; };
/* P8_07 (ball G14) gpio6_5*/
- P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = <
- P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
- P8_07_gpio_pin: pinmux_P8_07_gpio_pin { pinctrl-single,pins = <
- P8_07( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
- P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin { pinctrl-single,pins = <
- P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
- P8_07_gpio_pd_pin: pinmux_P8_07_gpio_pd_pin { pinctrl-single,pins = <
- P8_07( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
- P8_07_gpio_input_pin: pinmux_P8_07_gpio_input_pin { pinctrl-single,pins = <
- P8_07( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
- P8_07_timer_pin: pinmux_P8_07_timer_pin { pinctrl-single,pins = <
- P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr14.timer11 */
+ P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = < P8_07_DEFAULT >; };
+ P8_07_gpio_pin: pinmux_P8_07_gpio_pin { pinctrl-single,pins = < P8_07_GPIO >; };
+ P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin { pinctrl-single,pins = < P8_07_GPIO_PU >; };
+ P8_07_gpio_pd_pin: pinmux_P8_07_gpio_pd_pin { pinctrl-single,pins = < P8_07_GPIO_PD >; };
+ P8_07_gpio_input_pin: pinmux_P8_07_gpio_input_pin { pinctrl-single,pins = < P8_07_GPIO_INPUT >; };
+ P8_07_timer_pin: pinmux_P8_07_timer_pin { pinctrl-single,pins = < P8_07_TIMER >; };
/* P8_08 (ball F14) gpio6_6 */
- P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = <
- P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
- P8_08_gpio_pin: pinmux_P8_08_gpio_pin { pinctrl-single,pins = <
- P8_08( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
- P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin { pinctrl-single,pins = <
- P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
- P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin { pinctrl-single,pins = <
- P8_08( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
- P8_08_gpio_input_pin: pinmux_P8_08_gpio_input_pin { pinctrl-single,pins = <
- P8_08( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
- P8_08_timer_pin: pinmux_P8_08_timer_pin { pinctrl-single,pins = <
- P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr15.timer12 */
+ P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = < P8_08_DEFAULT >; };
+ P8_08_gpio_pin: pinmux_P8_08_gpio_pin { pinctrl-single,pins = < P8_08_GPIO >; };
+ P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin { pinctrl-single,pins = < P8_08_GPIO_PU >; };
+ P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin { pinctrl-single,pins = < P8_08_GPIO_PD >; };
+ P8_08_gpio_input_pin: pinmux_P8_08_gpio_input_pin { pinctrl-single,pins = < P8_08_GPIO_INPUT >; };
+ P8_08_timer_pin: pinmux_P8_08_timer_pin { pinctrl-single,pins = < P8_08_TIMER >; };
/* P8_09 (ball E17) gpio6_18 */
- P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = <
- P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
- P8_09_gpio_pin: pinmux_P8_09_gpio_pin { pinctrl-single,pins = <
- P8_09( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
- P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin { pinctrl-single,pins = <
- P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
- P8_09_gpio_pd_pin: pinmux_P8_09_gpio_pd_pin { pinctrl-single,pins = <
- P8_09( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
- P8_09_gpio_input_pin: pinmux_P8_09_gpio_input_pin { pinctrl-single,pins = <
- P8_09( PIN_INPUT | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
- P8_09_timer_pin: pinmux_P8_09_timer_pin { pinctrl-single,pins = <
- P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* xref_clk1.timer14 */
+ P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = < P8_09_DEFAULT >; };
+ P8_09_gpio_pin: pinmux_P8_09_gpio_pin { pinctrl-single,pins = < P8_09_GPIO >; };
+ P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin { pinctrl-single,pins = < P8_09_GPIO_PU >; };
+ P8_09_gpio_pd_pin: pinmux_P8_09_gpio_pd_pin { pinctrl-single,pins = < P8_09_GPIO_PD >; };
+ P8_09_gpio_input_pin: pinmux_P8_09_gpio_input_pin { pinctrl-single,pins = < P8_09_GPIO_INPUT >; };
+ P8_09_timer_pin: pinmux_P8_09_timer_pin { pinctrl-single,pins = < P8_09_TIMER >; };
/* P8_10 (ball A13) gpio6_4 */
- P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = <
- P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
- P8_10_gpio_pin: pinmux_P8_10_gpio_pin { pinctrl-single,pins = <
- P8_10( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
- P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin { pinctrl-single,pins = <
- P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
- P8_10_gpio_pd_pin: pinmux_P8_10_gpio_pd_pin { pinctrl-single,pins = <
- P8_10( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
- P8_10_gpio_input_pin: pinmux_P8_10_gpio_input_pin { pinctrl-single,pins = <
- P8_10( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
- P8_10_timer_pin: pinmux_P8_10_timer_pin { pinctrl-single,pins = <
- P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr13.timer10 */
+ P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = < P8_10_DEFAULT >; };
+ P8_10_gpio_pin: pinmux_P8_10_gpio_pin { pinctrl-single,pins = < P8_10_GPIO >; };
+ P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin { pinctrl-single,pins = < P8_10_GPIO_PU >; };
+ P8_10_gpio_pd_pin: pinmux_P8_10_gpio_pd_pin { pinctrl-single,pins = < P8_10_GPIO_PD >; };
+ P8_10_gpio_input_pin: pinmux_P8_10_gpio_input_pin { pinctrl-single,pins = < P8_10_GPIO_INPUT >; };
+ P8_10_timer_pin: pinmux_P8_10_timer_pin { pinctrl-single,pins = < P8_10_TIMER >; };
/* P8_11 (ball AH4) gpio3_11 */
- P8_11_default_pin: pinmux_P8_11_default_pin { pinctrl-single,pins = <
- P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
- P8_11_gpio_pin: pinmux_P8_11_gpio_pin { pinctrl-single,pins = <
- P8_11( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
- P8_11_gpio_pu_pin: pinmux_P8_11_gpio_pu_pin { pinctrl-single,pins = <
- P8_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
- P8_11_gpio_pd_pin: pinmux_P8_11_gpio_pd_pin { pinctrl-single,pins = <
- P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
- P8_11_gpio_input_pin: pinmux_P8_11_gpio_input_pin { pinctrl-single,pins = <
- P8_11( PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
- P8_11_qep_pin: pinmux_P8_11_qep_pin { pinctrl-single,pins = <
- P8_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_d7.eQEP2B_in */
- P8_11_pruout_pin: pinmux_P8_11_pruout_pin { pinctrl-single,pins = <
- P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d7.pr1_pru0_gpo4 */
+ P8_11_default_pin: pinmux_P8_11_default_pin { pinctrl-single,pins = < P8_11_DEFAULT >; };
+ P8_11_gpio_pin: pinmux_P8_11_gpio_pin { pinctrl-single,pins = < P8_11_GPIO >; };
+ P8_11_gpio_pu_pin: pinmux_P8_11_gpio_pu_pin { pinctrl-single,pins = < P8_11_GPIO_PU >; };
+ P8_11_gpio_pd_pin: pinmux_P8_11_gpio_pd_pin { pinctrl-single,pins = < P8_11_GPIO_PD >; };
+ P8_11_gpio_input_pin: pinmux_P8_11_gpio_input_pin { pinctrl-single,pins = < P8_11_GPIO_INPUT >; };
+ P8_11_qep_pin: pinmux_P8_11_qep_pin { pinctrl-single,pins = < P8_11_QEP >; };
+ P8_11_pruout_pin: pinmux_P8_11_pruout_pin { pinctrl-single,pins = < P8_11_PRUOUT >; };
/* P8_12 (ball AG6) gpio3_10 */
- P8_12_default_pin: pinmux_P8_12_default_pin { pinctrl-single,pins = <
- P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
- P8_12_gpio_pin: pinmux_P8_12_gpio_pin { pinctrl-single,pins = <
- P8_12( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
- P8_12_gpio_pu_pin: pinmux_P8_12_gpio_pu_pin { pinctrl-single,pins = <
- P8_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
- P8_12_gpio_pd_pin: pinmux_P8_12_gpio_pd_pin { pinctrl-single,pins = <
- P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
- P8_12_gpio_input_pin: pinmux_P8_12_gpio_input_pin { pinctrl-single,pins = <
- P8_12( PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
- P8_12_qep_pin: pinmux_P8_12_qep_pin { pinctrl-single,pins = <
- P8_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_d6.eQEP2A_in */
- P8_12_pruout_pin: pinmux_P8_12_pruout_pin { pinctrl-single,pins = <
- P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d6.pr1_pru0_gpo3 */
+ P8_12_default_pin: pinmux_P8_12_default_pin { pinctrl-single,pins = < P8_12_DEFAULT >; };
+ P8_12_gpio_pin: pinmux_P8_12_gpio_pin { pinctrl-single,pins = < P8_12_GPIO >; };
+ P8_12_gpio_pu_pin: pinmux_P8_12_gpio_pu_pin { pinctrl-single,pins = < P8_12_GPIO_PU >; };
+ P8_12_gpio_pd_pin: pinmux_P8_12_gpio_pd_pin { pinctrl-single,pins = < P8_12_GPIO_PD >; };
+ P8_12_gpio_input_pin: pinmux_P8_12_gpio_input_pin { pinctrl-single,pins = < P8_12_GPIO_INPUT >; };
+ P8_12_qep_pin: pinmux_P8_12_qep_pin { pinctrl-single,pins = < P8_12_QEP >; };
+ P8_12_pruout_pin: pinmux_P8_12_pruout_pin { pinctrl-single,pins = < P8_12_TIMER >; };
/* P8_13 (ball D3) gpio4_11 */
- P8_13_default_pin: pinmux_P8_13_default_pin { pinctrl-single,pins = <
- P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
- P8_13_gpio_pin: pinmux_P8_13_gpio_pin { pinctrl-single,pins = <
- P8_13( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
- P8_13_gpio_pu_pin: pinmux_P8_13_gpio_pu_pin { pinctrl-single,pins = <
- P8_13( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
- P8_13_gpio_pd_pin: pinmux_P8_13_gpio_pd_pin { pinctrl-single,pins = <
- P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
- P8_13_gpio_input_pin: pinmux_P8_13_gpio_input_pin { pinctrl-single,pins = <
- P8_13( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
- P8_13_pwm_pin: pinmux_P8_13_pwm_pin { pinctrl-single,pins = <
- P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d10.ehrpwm2B */
+ P8_13_default_pin: pinmux_P8_13_default_pin { pinctrl-single,pins = < P8_13_DEFAULT >; };
+ P8_13_gpio_pin: pinmux_P8_13_gpio_pin { pinctrl-single,pins = < P8_13_GPIO >; };
+ P8_13_gpio_pu_pin: pinmux_P8_13_gpio_pu_pin { pinctrl-single,pins = < P8_13_GPIO_PU >; };
+ P8_13_gpio_pd_pin: pinmux_P8_13_gpio_pd_pin { pinctrl-single,pins = < P8_13_GPIO_PD >; };
+ P8_13_gpio_input_pin: pinmux_P8_13_gpio_input_pin { pinctrl-single,pins = < P8_13_GPIO_INPUT >; };
+ P8_13_pwm_pin: pinmux_P8_13_pwm_pin { pinctrl-single,pins = < P8_13_PWM >; };
/* P8_14 (ball D5) gpio4_13*/
- P8_14_default_pin: pinmux_P8_14_default_pin { pinctrl-single,pins = <
- P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
- P8_14_gpio_pin: pinmux_P8_14_gpio_pin { pinctrl-single,pins = <
- P8_14( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
- P8_14_gpio_pu_pin: pinmux_P8_14_gpio_pu_pin { pinctrl-single,pins = <
- P8_14( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
- P8_14_gpio_pd_pin: pinmux_P8_14_gpio_pd_pin { pinctrl-single,pins = <
- P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
- P8_14_gpio_input_pin: pinmux_P8_14_gpio_input_pin { pinctrl-single,pins = <
- P8_14( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
- P8_14_pwm_pin: pinmux_P8_14_pwm_pin { pinctrl-single,pins = <
- P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d12.eCAP2_in_PWM2_out */
+ P8_14_default_pin: pinmux_P8_14_default_pin { pinctrl-single,pins = < P8_14_DEFAULT >; };
+ P8_14_gpio_pin: pinmux_P8_14_gpio_pin { pinctrl-single,pins = < P8_14_GPIO >; };
+ P8_14_gpio_pu_pin: pinmux_P8_14_gpio_pu_pin { pinctrl-single,pins = < P8_14_GPIO_PU >; };
+ P8_14_gpio_pd_pin: pinmux_P8_14_gpio_pd_pin { pinctrl-single,pins = < P8_14_GPIO_PD >; };
+ P8_14_gpio_input_pin: pinmux_P8_14_gpio_input_pin { pinctrl-single,pins = < P8_14_GPIO_INPUT >; };
+ P8_14_pwm_pin: pinmux_P8_14_pwm_pin { pinctrl-single,pins = < P8_14_PWM >; };
/* P8_15a (ball D1) gpio4_3*/
- P8_15_default_pin: pinmux_P8_15_default_pin { pinctrl-single,pins = <
- P8_15A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
- P8_15_gpio_pin: pinmux_P8_15_gpio_pin { pinctrl-single,pins = <
- P8_15A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
- P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin { pinctrl-single,pins = <
- P8_15A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
- P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin { pinctrl-single,pins = <
- P8_15A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
- P8_15_gpio_input_pin: pinmux_P8_15_gpio_input_pin { pinctrl-single,pins = <
- P8_15A( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d2.gpio4_3 */
- P8_15_pru_ecap_pin: pinmux_P8_15_pru_ecap_pin { pinctrl-single,pins = <
- P8_15A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE11) >; }; /* vin2a_d2.pr1_ecap0_ecap_capin_apwm_o */
+ P8_15_default_pin: pinmux_P8_15_default_pin { pinctrl-single,pins = < P8_15_DEFAULT >; };
+ P8_15_gpio_pin: pinmux_P8_15_gpio_pin { pinctrl-single,pins = < P8_15_GPIO >; };
+ P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin { pinctrl-single,pins = < P8_15_GPIO_PU >; };
+ P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin { pinctrl-single,pins = < P8_15_GPIO_PD >; };
+ P8_15_gpio_input_pin: pinmux_P8_15_gpio_input_pin { pinctrl-single,pins = < P8_15_GPIO_INPUT >; };
+ P8_15_pru_ecap_pin: pinmux_P8_15_pru_ecap_pin { pinctrl-single,pins = < P8_15_PRU_ECAP >; };
/* P8_15b (ball A3) gpio4_27 */
- P8_15_pruin_pin: pinmux_P8_15_pruin_pin { pinctrl-single,pins = <
- P8_15B( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d19.pr1_pru1_gpi16*/
+ P8_15_pruin_pin: pinmux_P8_15_pruin_pin { pinctrl-single,pins = < P8_15_PRUIN >; };
/* P8_16 (ball B4) gpio4_29 */
- P8_16_default_pin: pinmux_P8_16_default_pin { pinctrl-single,pins = <
- P8_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
- P8_16_gpio_pin: pinmux_P8_16_gpio_pin { pinctrl-single,pins = <
- P8_16( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
- P8_16_gpio_pu_pin: pinmux_P8_16_gpio_pu_pin { pinctrl-single,pins = <
- P8_16( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
- P8_16_gpio_pd_pin: pinmux_P8_16_gpio_pd_pin { pinctrl-single,pins = <
- P8_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
- P8_16_gpio_input_pin: pinmux_P8_16_gpio_input_pin { pinctrl-single,pins = <
- P8_16( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
- P8_16_pruin_pin: pinmux_P8_16_pruin_pin { pinctrl-single,pins = <
- P8_16( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d21.pr1_pru1_gpi18 */
+ P8_16_default_pin: pinmux_P8_16_default_pin { pinctrl-single,pins = < P8_16_DEFAULT >; };
+ P8_16_gpio_pin: pinmux_P8_16_gpio_pin { pinctrl-single,pins = < P8_16_GPIO >; };
+ P8_16_gpio_pu_pin: pinmux_P8_16_gpio_pu_pin { pinctrl-single,pins = < P8_16_GPIO_PU >; };
+ P8_16_gpio_pd_pin: pinmux_P8_16_gpio_pd_pin { pinctrl-single,pins = < P8_16_GPIO_PD >; };
+ P8_16_gpio_input_pin: pinmux_P8_16_gpio_input_pin { pinctrl-single,pins = < P8_16_GPIO_INPUT >; };
+ P8_16_pruin_pin: pinmux_P8_16_pruin_pin { pinctrl-single,pins = < P8_16_PRUIN >; };
/* P8_17 (ball A7) gpio8_18 */
- P8_17_default_pin: pinmux_P8_17_default_pin { pinctrl-single,pins = <
- P8_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
- P8_17_gpio_pin: pinmux_P8_17_gpio_pin { pinctrl-single,pins = <
- P8_17( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
- P8_17_gpio_pu_pin: pinmux_P8_17_gpio_pu_pin { pinctrl-single,pins = <
- P8_17( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
- P8_17_gpio_pd_pin: pinmux_P8_17_gpio_pd_pin { pinctrl-single,pins = <
- P8_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
- P8_17_gpio_input_pin: pinmux_P8_17_gpio_input_pin { pinctrl-single,pins = <
- P8_17( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
+ P8_17_default_pin: pinmux_P8_17_default_pin { pinctrl-single,pins = < P8_17_DEFAULT >; };
+ P8_17_gpio_pin: pinmux_P8_17_gpio_pin { pinctrl-single,pins = < P8_17_GPIO >; };
+ P8_17_gpio_pu_pin: pinmux_P8_17_gpio_pu_pin { pinctrl-single,pins = < P8_17_GPIO_PU >; };
+ P8_17_gpio_pd_pin: pinmux_P8_17_gpio_pd_pin { pinctrl-single,pins = < P8_17_GPIO_PD >; };
+ P8_17_gpio_input_pin: pinmux_P8_17_gpio_input_pin { pinctrl-single,pins = < P8_17_GPIO_INPUT >; };
/* P8_18 (ball F5) gpio4_9 */
- P8_18_default_pin: pinmux_P8_18_default_pin { pinctrl-single,pins = <
- P8_18( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
- P8_18_gpio_pin: pinmux_P8_18_gpio_pin { pinctrl-single,pins = <
- P8_18( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
- P8_18_gpio_pu_pin: pinmux_P8_18_gpio_pu_pin { pinctrl-single,pins = <
- P8_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
- P8_18_gpio_pd_pin: pinmux_P8_18_gpio_pd_pin { pinctrl-single,pins = <
- P8_18( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
- P8_18_gpio_input_pin: pinmux_P8_18_gpio_input_pin { pinctrl-single,pins = <
- P8_18( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
- P8_18_qep_pin: pinmux_P8_18_qep_pin { pinctrl-single,pins = <
- P8_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d8.eQEP2_strobe */
+ P8_18_default_pin: pinmux_P8_18_default_pin { pinctrl-single,pins = < P8_18_DEFAULT >; };
+ P8_18_gpio_pin: pinmux_P8_18_gpio_pin { pinctrl-single,pins = < P8_18_GPIO >; };
+ P8_18_gpio_pu_pin: pinmux_P8_18_gpio_pu_pin { pinctrl-single,pins = < P8_18_GPIO_PU >; };
+ P8_18_gpio_pd_pin: pinmux_P8_18_gpio_pd_pin { pinctrl-single,pins = < P8_18_GPIO_PD >; };
+ P8_18_gpio_input_pin: pinmux_P8_18_gpio_input_pin { pinctrl-single,pins = < P8_18_GPIO_INPUT >; };
+ P8_18_qep_pin: pinmux_P8_18_qep_pin { pinctrl-single,pins = < P8_18_QEP >; };
/* P8_19 (ball E6) gpio4_10 */
- P8_19_default_pin: pinmux_P8_19_default_pin { pinctrl-single,pins = <
- P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
- P8_19_gpio_pin: pinmux_P8_19_gpio_pin { pinctrl-single,pins = <
- P8_19( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
- P8_19_gpio_pu_pin: pinmux_P8_19_gpio_pu_pin { pinctrl-single,pins = <
- P8_19( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
- P8_19_gpio_pd_pin: pinmux_P8_19_gpio_pd_pin { pinctrl-single,pins = <
- P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
- P8_19_gpio_input_pin: pinmux_P8_19_gpio_input_pin { pinctrl-single,pins = <
- P8_19( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
- P8_19_pwm_pin: pinmux_P8_19_pwm_pin { pinctrl-single,pins = <
- P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d9.ehrpwm2A */
+ P8_19_default_pin: pinmux_P8_19_default_pin { pinctrl-single,pins = < P8_19_DEFAULT >; };
+ P8_19_gpio_pin: pinmux_P8_19_gpio_pin { pinctrl-single,pins = < P8_19_GPIO >; };
+ P8_19_gpio_pu_pin: pinmux_P8_19_gpio_pu_pin { pinctrl-single,pins = < P8_19_GPIO_PU >; };
+ P8_19_gpio_pd_pin: pinmux_P8_19_gpio_pd_pin { pinctrl-single,pins = < P8_19_GPIO_PD >; };
+ P8_19_gpio_input_pin: pinmux_P8_19_gpio_input_pin { pinctrl-single,pins = < P8_19_GPIO_INPUT >; };
+ P8_19_pwm_pin: pinmux_P8_19_pwm_pin { pinctrl-single,pins = < P8_19_PWM >; };
/* P8_20 (ball AC4) gpio6_30 */
- P8_20_default_pin: pinmux_P8_20_default_pin { pinctrl-single,pins = <
- P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
- P8_20_gpio_pin: pinmux_P8_20_gpio_pin { pinctrl-single,pins = <
- P8_20( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
- P8_20_gpio_pu_pin: pinmux_P8_20_gpio_pu_pin { pinctrl-single,pins = <
- P8_20( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
- P8_20_gpio_pd_pin: pinmux_P8_20_gpio_pd_pin { pinctrl-single,pins = <
- P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
- P8_20_gpio_input_pin: pinmux_P8_20_gpio_input_pin { pinctrl-single,pins = <
- P8_20( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
- P8_20_pruout_pin: pinmux_P8_20_pruout_pin { pinctrl-single,pins = <
- P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_cmd.pr2_pru0_gpo3 */
- P8_20_pruin_pin: pinmux_P8_20_pruin_pin { pinctrl-single,pins = <
- P8_20( PIN_INPUT | MUX_MODE12) >; }; /* mmc3_cmd.pr2_pru0_gpi3 */
+ P8_20_default_pin: pinmux_P8_20_default_pin { pinctrl-single,pins = < P8_20_DEFAULT >; };
+ P8_20_gpio_pin: pinmux_P8_20_gpio_pin { pinctrl-single,pins = < P8_20_GPIO >; };
+ P8_20_gpio_pu_pin: pinmux_P8_20_gpio_pu_pin { pinctrl-single,pins = < P8_20_GPIO_PU >; };
+ P8_20_gpio_pd_pin: pinmux_P8_20_gpio_pd_pin { pinctrl-single,pins = < P8_20_GPIO_PD >; };
+ P8_20_gpio_input_pin: pinmux_P8_20_gpio_input_pin { pinctrl-single,pins = < P8_20_GPIO_INPUT >; };
+ P8_20_pruout_pin: pinmux_P8_20_pruout_pin { pinctrl-single,pins = < P8_20_PRUOUT >; };
+ P8_20_pruin_pin: pinmux_P8_20_pruin_pin { pinctrl-single,pins = < P8_20_PRUIN >; };
/* P8_21 (ball AD4) gpio6_29 */
- P8_21_default_pin: pinmux_P8_21_default_pin { pinctrl-single,pins = <
- P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
- P8_21_gpio_pin: pinmux_P8_21_gpio_pin { pinctrl-single,pins = <
- P8_21( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
- P8_21_gpio_pu_pin: pinmux_P8_21_gpio_pu_pin { pinctrl-single,pins = <
- P8_21( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
- P8_21_gpio_pd_pin: pinmux_P8_21_gpio_pd_pin { pinctrl-single,pins = <
- P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
- P8_21_gpio_input_pin: pinmux_P8_21_gpio_input_pin { pinctrl-single,pins = <
- P8_21( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
- P8_21_pruout_pin: pinmux_P8_21_pruout_pin { pinctrl-single,pins = <
- P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_clk.pr2_pru0_gpo2 */
- P8_21_pruin_pin: pinmux_P8_21_pruin_pin { pinctrl-single,pins = <
- P8_21( PIN_INPUT | MUX_MODE12) >; }; /* mmc3_clk.pr2_pru0_gpi2 */
+ P8_21_default_pin: pinmux_P8_21_default_pin { pinctrl-single,pins = < P8_21_DEFAULT >; };
+ P8_21_gpio_pin: pinmux_P8_21_gpio_pin { pinctrl-single,pins = < P8_21_GPIO >; };
+ P8_21_gpio_pu_pin: pinmux_P8_21_gpio_pu_pin { pinctrl-single,pins = < P8_21_GPIO_PU >; };
+ P8_21_gpio_pd_pin: pinmux_P8_21_gpio_pd_pin { pinctrl-single,pins = < P8_21_GPIO_PD >; };
+ P8_21_gpio_input_pin: pinmux_P8_21_gpio_input_pin { pinctrl-single,pins = < P8_21_GPIO_INPUT >; };
+ P8_21_pruout_pin: pinmux_P8_21_pruout_pin { pinctrl-single,pins = < P8_21_PRUOUT >; };
+ P8_21_pruin_pin: pinmux_P8_21_pruin_pin { pinctrl-single,pins = < P8_21_PRUIN >; };
/* P8_22 (ball AD6) gpio1_23 */
- P8_22_default_pin: pinmux_P8_22_default_pin { pinctrl-single,pins = <
- P8_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
- P8_22_gpio_pin: pinmux_P8_22_gpio_pin { pinctrl-single,pins = <
- P8_22( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
- P8_22_gpio_pu_pin: pinmux_P8_22_gpio_pu_pin { pinctrl-single,pins = <
- P8_22( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
- P8_22_gpio_pd_pin: pinmux_P8_22_gpio_pd_pin { pinctrl-single,pins = <
- P8_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
- P8_22_gpio_input_pin: pinmux_P8_22_gpio_input_pin { pinctrl-single,pins = <
- P8_22( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22_default_pin: pinmux_P8_22_default_pin { pinctrl-single,pins = < P8_22_DEFAULT >; };
+ P8_22_gpio_pin: pinmux_P8_22_gpio_pin { pinctrl-single,pins = < P8_22_GPIO >; };
+ P8_22_gpio_pu_pin: pinmux_P8_22_gpio_pu_pin { pinctrl-single,pins = < P8_22_GPIO_PU >; };
+ P8_22_gpio_pd_pin: pinmux_P8_22_gpio_pd_pin { pinctrl-single,pins = < P8_22_GPIO_PD >; };
+ P8_22_gpio_input_pin: pinmux_P8_22_gpio_input_pin { pinctrl-single,pins = < P8_22_GPIO_INPUT >; };
/* P8_23 (ball AC8) gpio1_22 */
- P8_23_default_pin: pinmux_P8_23_default_pin { pinctrl-single,pins = <
- P8_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
- P8_23_gpio_pin: pinmux_P8_23_gpio_pin { pinctrl-single,pins = <
- P8_23( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
- P8_23_gpio_pu_pin: pinmux_P8_23_gpio_pu_pin { pinctrl-single,pins = <
- P8_23( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
- P8_23_gpio_pd_pin: pinmux_P8_23_gpio_pd_pin { pinctrl-single,pins = <
- P8_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
- P8_23_gpio_input_pin: pinmux_P8_23_gpio_input_pin { pinctrl-single,pins = <
- P8_23( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23_default_pin: pinmux_P8_23_default_pin { pinctrl-single,pins = < P8_23_DEFAULT >; };
+ P8_23_gpio_pin: pinmux_P8_23_gpio_pin { pinctrl-single,pins = < P8_23_GPIO >; };
+ P8_23_gpio_pu_pin: pinmux_P8_23_gpio_pu_pin { pinctrl-single,pins = < P8_23_GPIO_PU >; };
+ P8_23_gpio_pd_pin: pinmux_P8_23_gpio_pd_pin { pinctrl-single,pins = < P8_23_GPIO_PD >; };
+ P8_23_gpio_input_pin: pinmux_P8_23_gpio_input_pin { pinctrl-single,pins = < P8_23_GPIO_INPUT >; };
/* P8_24 (ball AC6) gpio7_0 */
- P8_24_default_pin: pinmux_P8_24_default_pin { pinctrl-single,pins = <
- P8_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
- P8_24_gpio_pin: pinmux_P8_24_gpio_pin { pinctrl-single,pins = <
- P8_24( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
- P8_24_gpio_pu_pin: pinmux_P8_24_gpio_pu_pin { pinctrl-single,pins = <
- P8_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
- P8_24_gpio_pd_pin: pinmux_P8_24_gpio_pd_pin { pinctrl-single,pins = <
- P8_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
- P8_24_gpio_input_pin: pinmux_P8_24_gpio_input_pin { pinctrl-single,pins = <
- P8_24( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24_default_pin: pinmux_P8_24_default_pin { pinctrl-single,pins = < P8_24_DEFAULT >; };
+ P8_24_gpio_pin: pinmux_P8_24_gpio_pin { pinctrl-single,pins = < P8_24_GPIO >; };
+ P8_24_gpio_pu_pin: pinmux_P8_24_gpio_pu_pin { pinctrl-single,pins = < P8_24_GPIO_PU >; };
+ P8_24_gpio_pd_pin: pinmux_P8_24_gpio_pd_pin { pinctrl-single,pins = < P8_24_GPIO_PD >; };
+ P8_24_gpio_input_pin: pinmux_P8_24_gpio_input_pin { pinctrl-single,pins = < P8_24_GPIO_INPUT >; };
/* P8_25 (ball AC7) gpio6_31 */
- P8_25_default_pin: pinmux_P8_25_default_pin { pinctrl-single,pins = <
- P8_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
- P8_25_gpio_pin: pinmux_P8_25_gpio_pin { pinctrl-single,pins = <
- P8_25( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
- P8_25_gpio_pu_pin: pinmux_P8_25_gpio_pu_pin { pinctrl-single,pins = <
- P8_25( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
- P8_25_gpio_pd_pin: pinmux_P8_25_gpio_pd_pin { pinctrl-single,pins = <
- P8_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
- P8_25_gpio_input_pin: pinmux_P8_25_gpio_input_pin { pinctrl-single,pins = <
- P8_25( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25_default_pin: pinmux_P8_25_default_pin { pinctrl-single,pins = < P8_25_DEFAULT >; };
+ P8_25_gpio_pin: pinmux_P8_25_gpio_pin { pinctrl-single,pins = < P8_25_GPIO >; };
+ P8_25_gpio_pu_pin: pinmux_P8_25_gpio_pu_pin { pinctrl-single,pins = < P8_25_GPIO_PU >; };
+ P8_25_gpio_pd_pin: pinmux_P8_25_gpio_pd_pin { pinctrl-single,pins = < P8_25_GPIO_PD >; };
+ P8_25_gpio_input_pin: pinmux_P8_25_gpio_input_pin { pinctrl-single,pins = < P8_25_GPIO_INPUT >; };
/* P8_26 (ball B3) gpio4_28 */
- P8_26_default_pin: pinmux_P8_26_default_pin { pinctrl-single,pins = <
- P8_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
- P8_26_gpio_pin: pinmux_P8_26_gpio_pin { pinctrl-single,pins = <
- P8_26( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
- P8_26_gpio_pu_pin: pinmux_P8_26_gpio_pu_pin { pinctrl-single,pins = <
- P8_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
- P8_26_gpio_pd_pin: pinmux_P8_26_gpio_pd_pin { pinctrl-single,pins = <
- P8_26( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
- P8_26_gpio_input_pin: pinmux_P8_26_gpio_input_pin { pinctrl-single,pins = <
- P8_26( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
+ P8_26_default_pin: pinmux_P8_26_default_pin { pinctrl-single,pins = < P8_26_DEFAULT >; };
+ P8_26_gpio_pin: pinmux_P8_26_gpio_pin { pinctrl-single,pins = < P8_26_GPIO >; };
+ P8_26_gpio_pu_pin: pinmux_P8_26_gpio_pu_pin { pinctrl-single,pins = < P8_26_GPIO_PU >; };
+ P8_26_gpio_pd_pin: pinmux_P8_26_gpio_pd_pin { pinctrl-single,pins = < P8_26_GPIO_PD >; };
+ P8_26_gpio_input_pin: pinmux_P8_26_gpio_input_pin { pinctrl-single,pins = < P8_26_GPIO_INPUT >; };
/* P8_27a (ball E11) gpio4_23 */
- P8_27_default_pin: pinmux_P8_27_default_pin { pinctrl-single,pins = <
- P8_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
- P8_27_gpio_pin: pinmux_P8_27_gpio_pin { pinctrl-single,pins = <
- P8_27A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
- P8_27_gpio_pu_pin: pinmux_P8_27_gpio_pu_pin { pinctrl-single,pins = <
- P8_27A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
- P8_27_gpio_pd_pin: pinmux_P8_27_gpio_pd_pin { pinctrl-single,pins = <
- P8_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
- P8_27_gpio_input_pin: pinmux_P8_27_gpio_input_pin { pinctrl-single,pins = <
- P8_27A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_vsync.gpio4_23 */
+ P8_27_default_pin: pinmux_P8_27_default_pin { pinctrl-single,pins = < P8_27_DEFAULT >; };
+ P8_27_gpio_pin: pinmux_P8_27_gpio_pin { pinctrl-single,pins = < P8_27_GPIO >; };
+ P8_27_gpio_pu_pin: pinmux_P8_27_gpio_pu_pin { pinctrl-single,pins = < P8_27_GPIO_PU >; };
+ P8_27_gpio_pd_pin: pinmux_P8_27_gpio_pd_pin { pinctrl-single,pins = < P8_27_GPIO_PD >; };
+ P8_27_gpio_input_pin: pinmux_P8_27_gpio_input_pin { pinctrl-single,pins = < P8_27_GPIO_INPUT >; };
/* P8_27b (ball A8) gpio8_19 */
- P8_27_pruout_pin: pinmux_P8_27_pruout_pin { pinctrl-single,pins = <
- P8_27B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d19.pr2_pru0_gpo16 */
- P8_27_pruin_pin: pinmux_P8_27_pruin_pin { pinctrl-single,pins = <
- P8_27B( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d19.pr2_pru0_gpi16 */
+ P8_27_pruout_pin: pinmux_P8_27_pruout_pin { pinctrl-single,pins = < P8_27_PRUOUT >; };
+ P8_27_pruin_pin: pinmux_P8_27_pruin_pin { pinctrl-single,pins = < P8_27_PRUIN >; };
/* P8_28a (ball D11) gpio4_19 */
- P8_28_default_pin: pinmux_P8_28_default_pin { pinctrl-single,pins = <
- P8_28A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
- P8_28_gpio_pin: pinmux_P8_28_gpio_pin { pinctrl-single,pins = <
- P8_28A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
- P8_28_gpio_pu_pin: pinmux_P8_28_gpio_pu_pin { pinctrl-single,pins = <
- P8_28A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
- P8_28_gpio_pd_pin: pinmux_P8_28_gpio_pd_pin { pinctrl-single,pins = <
- P8_28A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
- P8_28_gpio_input_pin: pinmux_P8_28_gpio_input_pin { pinctrl-single,pins = <
- P8_28A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_clk.gpio4_19 */
+ P8_28_default_pin: pinmux_P8_28_default_pin { pinctrl-single,pins = < P8_28A_DEFAULT >; };
+ P8_28_gpio_pin: pinmux_P8_28_gpio_pin { pinctrl-single,pins = < P8_28A_GPIO >; };
+ P8_28_gpio_pu_pin: pinmux_P8_28_gpio_pu_pin { pinctrl-single,pins = < P8_28A_GPIO_PU >; };
+ P8_28_gpio_pd_pin: pinmux_P8_28_gpio_pd_pin { pinctrl-single,pins = < P8_28A_GPIO_PD >; };
+ P8_28_gpio_input_pin: pinmux_P8_28_gpio_input_pin { pinctrl-single,pins = < P8_28A_GPIO_INPUT >; };
/* P8_28b (ball C9) gpio8_20 */
- P8_28_pruout_pin: pinmux_P8_28_pruout_pin { pinctrl-single,pins = <
- P8_28B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d20.pr2_pru0_gpo17 */
- P8_28_pruin_pin: pinmux_P8_28_pruin_pin { pinctrl-single,pins = <
- P8_28B( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d20.pr2_pru0_gpi17 */
+ P8_28_pruout_pin: pinmux_P8_28_pruout_pin { pinctrl-single,pins = < P8_28A_PRUOUT >; };
+ P8_28_pruin_pin: pinmux_P8_28_pruin_pin { pinctrl-single,pins = < P8_28A_PRUIN >; };
/* P8_29a (ball C11) gpio4_22 */
- P8_29_default_pin: pinmux_P8_29_default_pin { pinctrl-single,pins = <
- P8_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
- P8_29_gpio_pin: pinmux_P8_29_gpio_pin { pinctrl-single,pins = <
- P8_29A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
- P8_29_gpio_pu_pin: pinmux_P8_29_gpio_pu_pin { pinctrl-single,pins = <
- P8_29A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
- P8_29_gpio_pd_pin: pinmux_P8_29_gpio_pd_pin { pinctrl-single,pins = <
- P8_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
- P8_29_gpio_input_pin: pinmux_P8_29_gpio_input_pin { pinctrl-single,pins = <
- P8_29A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_hsync.gpio4_22 */
+ P8_29_default_pin: pinmux_P8_29_default_pin { pinctrl-single,pins = < P8_29_DEFAULT >; };
+ P8_29_gpio_pin: pinmux_P8_29_gpio_pin { pinctrl-single,pins = < P8_29_GPIO >; };
+ P8_29_gpio_pu_pin: pinmux_P8_29_gpio_pu_pin { pinctrl-single,pins = < P8_29_GPIO_PU >; };
+ P8_29_gpio_pd_pin: pinmux_P8_29_gpio_pd_pin { pinctrl-single,pins = < P8_29_GPIO_PD >; };
+ P8_29_gpio_input_pin: pinmux_P8_29_gpio_input_pin { pinctrl-single,pins = < P8_29_GPIO_INPUT >; };
/* P8_29b (ball A9) gpio8_21 */
- P8_29_pruout_pin: pinmux_P8_29_pruout_pin { pinctrl-single,pins = <
- P8_29B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d21.pr2_pru0_gpo18 */
- P8_29_pruin_pin: pinmux_P8_29_pruin_pin { pinctrl-single,pins = <
- P8_29B( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d21.pr2_pru0_gpi18 */
+ P8_29_pruout_pin: pinmux_P8_29_pruout_pin { pinctrl-single,pins = < P8_29_PRUOUT >; };
+ P8_29_pruin_pin: pinmux_P8_29_pruin_pin { pinctrl-single,pins = < P8_29_PRUIN >; };
/* P8_30a (ball B10) gpio4_20 */
- P8_30_default_pin: pinmux_P8_30_default_pin { pinctrl-single,pins = <
- P8_30A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
- P8_30_gpio_pin: pinmux_P8_30_gpio_pin { pinctrl-single,pins = <
- P8_30A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
- P8_30_gpio_pu_pin: pinmux_P8_30_gpio_pu_pin { pinctrl-single,pins = <
- P8_30A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
- P8_30_gpio_pd_pin: pinmux_P8_30_gpio_pd_pin { pinctrl-single,pins = <
- P8_30A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
- P8_30_gpio_input_pin: pinmux_P8_30_gpio_input_pin { pinctrl-single,pins = <
- P8_30A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_de.gpio4_20 */
+ P8_30_default_pin: pinmux_P8_30_default_pin { pinctrl-single,pins = < P8_30_DEFAULT >; };
+ P8_30_gpio_pin: pinmux_P8_30_gpio_pin { pinctrl-single,pins = < P8_30_GPIO >; };
+ P8_30_gpio_pu_pin: pinmux_P8_30_gpio_pu_pin { pinctrl-single,pins = < P8_30_GPIO_PU >; };
+ P8_30_gpio_pd_pin: pinmux_P8_30_gpio_pd_pin { pinctrl-single,pins = < P8_30_GPIO_PD >; };
+ P8_30_gpio_input_pin: pinmux_P8_30_gpio_input_pin { pinctrl-single,pins = < P8_30_GPIO_INPUT >; };
/* P8_30b (ball B9) gpio8_22 */
- P8_30_pruout_pin: pinmux_P8_30_pruout_pin { pinctrl-single,pins = <
- P8_30B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d22.pr2_pru0_gpo19 */
- P8_30_pruin_pin: pinmux_P8_30_pruin_pin { pinctrl-single,pins = <
- P8_30B( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d22.pr2_pru0_gpi19 */
+ P8_30_pruout_pin: pinmux_P8_30_pruout_pin { pinctrl-single,pins = < P8_30_PRUOUT >; };
+ P8_30_pruin_pin: pinmux_P8_30_pruin_pin { pinctrl-single,pins = < P8_30_PRUIN >; };
/* P8_31a (ball C8) gpio8_14 */
- P8_31_default_pin: pinmux_P8_31_default_pin { pinctrl-single,pins = <
- P8_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
- P8_31_gpio_pin: pinmux_P8_31_gpio_pin { pinctrl-single,pins = <
- P8_31A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
- P8_31_gpio_pu_pin: pinmux_P8_31_gpio_pu_pin { pinctrl-single,pins = <
- P8_31A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
- P8_31_gpio_pd_pin: pinmux_P8_31_gpio_pd_pin { pinctrl-single,pins = <
- P8_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
- P8_31_gpio_input_pin: pinmux_P8_31_gpio_input_pin { pinctrl-single,pins = <
- P8_31A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d14.gpio8_14 */
+ P8_31_default_pin: pinmux_P8_31_default_pin { pinctrl-single,pins = < P8_31_DEFAULT >; };
+ P8_31_gpio_pin: pinmux_P8_31_gpio_pin { pinctrl-single,pins = < P8_31_GPIO >; };
+ P8_31_gpio_pu_pin: pinmux_P8_31_gpio_pu_pin { pinctrl-single,pins = < P8_31_GPIO_PU >; };
+ P8_31_gpio_pd_pin: pinmux_P8_31_gpio_pd_pin { pinctrl-single,pins = < P8_31_GPIO_PD >; };
+ P8_31_gpio_input_pin: pinmux_P8_31_gpio_input_pin { pinctrl-single,pins = < P8_31_GPIO_INPUT >; };
/* P8_31b (ball G16) */
- P8_31_uart_pin: pinmux_P8_31_uart_pin { pinctrl-single,pins = <
- P8_31B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp4_axr0.uart4_rxd */
+ P8_31_uart_pin: pinmux_P8_31_uart_pin { pinctrl-single,pins = < P8_31_UART >; };
/* P8_32a (ball C7) gpio8_15 */
- P8_32_default_pin: pinmux_P8_32_default_pin { pinctrl-single,pins = <
- P8_32A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
- P8_32_gpio_pin: pinmux_P8_32_gpio_pin { pinctrl-single,pins = <
- P8_32A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
- P8_32_gpio_pu_pin: pinmux_P8_32_gpio_pu_pin { pinctrl-single,pins = <
- P8_32A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
- P8_32_gpio_pd_pin: pinmux_P8_32_gpio_pd_pin { pinctrl-single,pins = <
- P8_32A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
- P8_32_gpio_input_pin: pinmux_P8_32_gpio_input_pin { pinctrl-single,pins = <
- P8_32A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d15.gpio8_15 */
+ P8_32_default_pin: pinmux_P8_32_default_pin { pinctrl-single,pins = < P8_32_DEFAULT >; };
+ P8_32_gpio_pin: pinmux_P8_32_gpio_pin { pinctrl-single,pins = < P8_32_GPIO >; };
+ P8_32_gpio_pu_pin: pinmux_P8_32_gpio_pu_pin { pinctrl-single,pins = < P8_32_GPIO_PU >; };
+ P8_32_gpio_pd_pin: pinmux_P8_32_gpio_pd_pin { pinctrl-single,pins = < P8_32_GPIO_PD >; };
+ P8_32_gpio_input_pin: pinmux_P8_32_gpio_input_pin { pinctrl-single,pins = < P8_32_GPIO_INPUT >; };
/* P8_32b (ball D17) */
- P8_32_uart_pin: pinmux_P8_32_uart_pin { pinctrl-single,pins = <
- P8_32B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp4_axr1.uart4_txd */
+ P8_32_uart_pin: pinmux_P8_32_uart_pin { pinctrl-single,pins = < P8_32_UART >; };
/* P8_33a (ball C6) gpio8_13 */
- P8_33_default_pin: pinmux_P8_33_default_pin { pinctrl-single,pins = <
- P8_33A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
- P8_33_gpio_pin: pinmux_P8_33_gpio_pin { pinctrl-single,pins = <
- P8_33A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
- P8_33_gpio_pu_pin: pinmux_P8_33_gpio_pu_pin { pinctrl-single,pins = <
- P8_33A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
- P8_33_gpio_pd_pin: pinmux_P8_33_gpio_pd_pin { pinctrl-single,pins = <
- P8_33A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
- P8_33_gpio_input_pin: pinmux_P8_33_gpio_input_pin { pinctrl-single,pins = <
- P8_33A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d13.gpio8_13 */
+ P8_33_default_pin: pinmux_P8_33_default_pin { pinctrl-single,pins = < P8_33_DEFAULT >; };
+ P8_33_gpio_pin: pinmux_P8_33_gpio_pin { pinctrl-single,pins = < P8_33_GPIO >; };
+ P8_33_gpio_pu_pin: pinmux_P8_33_gpio_pu_pin { pinctrl-single,pins = < P8_33_GPIO_PU >; };
+ P8_33_gpio_pd_pin: pinmux_P8_33_gpio_pd_pin { pinctrl-single,pins = < P8_33_GPIO_PD >; };
+ P8_33_gpio_input_pin: pinmux_P8_33_gpio_input_pin { pinctrl-single,pins = < P8_33_GPIO_INPUT >; };
/* P8_33b (ball AF9) gpio3_1 */
- P8_33_qep_pin: pinmux_P8_33_qep_pin { pinctrl-single,pins = <
- P8_33B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_fld0.eQEP1B_in */
+ P8_33_qep_pin: pinmux_P8_33_qep_pin { pinctrl-single,pins = < P8_33_QEP >; };
/* P8_34a (ball D8) gpio8_11 */
- P8_34_default_pin: pinmux_P8_34_default_pin { pinctrl-single,pins = <
- P8_34A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
- P8_34_gpio_pin: pinmux_P8_34_gpio_pin { pinctrl-single,pins = <
- P8_34A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
- P8_34_gpio_pu_pin: pinmux_P8_34_gpio_pu_pin { pinctrl-single,pins = <
- P8_34A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
- P8_34_gpio_pd_pin: pinmux_P8_34_gpio_pd_pin { pinctrl-single,pins = <
- P8_34A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
- P8_34_gpio_input_pin: pinmux_P8_34_gpio_input_pin { pinctrl-single,pins = <
- P8_34A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d11.gpio8_11 */
+ P8_34_default_pin: pinmux_P8_34_default_pin { pinctrl-single,pins = < P8_34_DEFAULT >; };
+ P8_34_gpio_pin: pinmux_P8_34_gpio_pin { pinctrl-single,pins = < P8_34_GPIO >; };
+ P8_34_gpio_pu_pin: pinmux_P8_34_gpio_pu_pin { pinctrl-single,pins = < P8_34_GPIO_PU >; };
+ P8_34_gpio_pd_pin: pinmux_P8_34_gpio_pd_pin { pinctrl-single,pins = < P8_34_GPIO_PD >; };
+ P8_34_gpio_input_pin: pinmux_P8_34_gpio_input_pin { pinctrl-single,pins = < P8_34_GPIO_INPUT >; };
/* P8_34b (ball G6) gpio4_0 */
- P8_34_pwm_pin: pinmux_P8_34_pwm_pin { pinctrl-single,pins = <
- P8_34B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_vsync0.ehrpwm1A */
+ P8_34_pwm_pin: pinmux_P8_34_pwm_pin { pinctrl-single,pins = < P8_34_PWM >; };
/* P8_35a (ball A5) gpio8_12 */
- P8_35_default_pin: pinmux_P8_35_default_pin { pinctrl-single,pins = <
- P8_35A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
- P8_35_gpio_pin: pinmux_P8_35_gpio_pin { pinctrl-single,pins = <
- P8_35A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
- P8_35_gpio_pu_pin: pinmux_P8_35_gpio_pu_pin { pinctrl-single,pins = <
- P8_35A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
- P8_35_gpio_pd_pin: pinmux_P8_35_gpio_pd_pin { pinctrl-single,pins = <
- P8_35A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
- P8_35_gpio_input_pin: pinmux_P8_35_gpio_input_pin { pinctrl-single,pins = <
- P8_35A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d12.gpio8_12 */
+ P8_35_default_pin: pinmux_P8_35_default_pin { pinctrl-single,pins = < P8_35_DEFAULT >; };
+ P8_35_gpio_pin: pinmux_P8_35_gpio_pin { pinctrl-single,pins = < P8_35_GPIO >; };
+ P8_35_gpio_pu_pin: pinmux_P8_35_gpio_pu_pin { pinctrl-single,pins = < P8_35_GPIO_PU >; };
+ P8_35_gpio_pd_pin: pinmux_P8_35_gpio_pd_pin { pinctrl-single,pins = < P8_35_GPIO_PD >; };
+ P8_35_gpio_input_pin: pinmux_P8_35_gpio_input_pin { pinctrl-single,pins = < P8_35_GPIO_INPUT >; };
/* P8_35b (ball AD9) gpio3_0 */
- P8_35_qep_pin: pinmux_P8_35_qep_pin { pinctrl-single,pins = <
- P8_35B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_de0.eQEP1A_in */
+ P8_35_qep_pin: pinmux_P8_35_qep_pin { pinctrl-single,pins = < P8_35_QEP >; };
/* P8_36a (ball D7) gpio8_10 */
- P8_36_default_pin: pinmux_P8_36_default_pin { pinctrl-single,pins = <
- P8_36A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
- P8_36_gpio_pin: pinmux_P8_36_gpio_pin { pinctrl-single,pins = <
- P8_36A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
- P8_36_gpio_pu_pin: pinmux_P8_36_gpio_pu_pin { pinctrl-single,pins = <
- P8_36A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
- P8_36_gpio_pd_pin: pinmux_P8_36_gpio_pd_pin { pinctrl-single,pins = <
- P8_36A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
- P8_36_gpio_input_pin: pinmux_P8_36_gpio_input_pin { pinctrl-single,pins = <
- P8_36A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d10.gpio8_10 */
+ P8_36_default_pin: pinmux_P8_36_default_pin { pinctrl-single,pins = < P8_36_DEFAULT >; };
+ P8_36_gpio_pin: pinmux_P8_36_gpio_pin { pinctrl-single,pins = < P8_36_GPIO >; };
+ P8_36_gpio_pu_pin: pinmux_P8_36_gpio_pu_pin { pinctrl-single,pins = < P8_36_GPIO_PU >; };
+ P8_36_gpio_pd_pin: pinmux_P8_36_gpio_pd_pin { pinctrl-single,pins = < P8_36_GPIO_PD >; };
+ P8_36_gpio_input_pin: pinmux_P8_36_gpio_input_pin { pinctrl-single,pins = < P8_36_GPIO_INPUT >; };
/* P8_36b (ball F2) gpio4_1 */
- P8_36_pwm_pin: pinmux_P8_36_pwm_pin { pinctrl-single,pins = <
- P8_36B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d0.ehrpwm1B */
+ P8_36_pwm_pin: pinmux_P8_36_pwm_pin { pinctrl-single,pins = < P8_36_PWM >; };
/* P8_37a (ball E8) gpio8_8 */
- P8_37_default_pin: pinmux_P8_37_default_pin { pinctrl-single,pins = <
- P8_37A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
- P8_37_gpio_pin: pinmux_P8_37_gpio_pin { pinctrl-single,pins = <
- P8_37A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
- P8_37_gpio_pu_pin: pinmux_P8_37_gpio_pu_pin { pinctrl-single,pins = <
- P8_37A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
- P8_37_gpio_pd_pin: pinmux_P8_37_gpio_pd_pin { pinctrl-single,pins = <
- P8_37A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
- P8_37_gpio_input_pin: pinmux_P8_37_gpio_input_pin { pinctrl-single,pins = <
- P8_37A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d8.gpio8_8 */
+ P8_37_default_pin: pinmux_P8_37_default_pin { pinctrl-single,pins = < P8_37_DEFAULT >; };
+ P8_37_gpio_pin: pinmux_P8_37_gpio_pin { pinctrl-single,pins = < P8_37_GPIO >; };
+ P8_37_gpio_pu_pin: pinmux_P8_37_gpio_pu_pin { pinctrl-single,pins = < P8_37_GPIO_PU >; };
+ P8_37_gpio_pd_pin: pinmux_P8_37_gpio_pd_pin { pinctrl-single,pins = < P8_37_GPIO_PD >; };
+ P8_37_gpio_input_pin: pinmux_P8_37_gpio_input_pin { pinctrl-single,pins = < P8_37_GPIO_INPUT >; };
/* P8_37b (ball A21) */
- P8_37_uart_pin: pinmux_P8_37_uart_pin { pinctrl-single,pins = <
- P8_37B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp4_fsx.uart8_txd */
+ P8_37_uart_pin: pinmux_P8_37_uart_pin { pinctrl-single,pins = < P8_37_UART >; };
/* P8_38a (ball D9) gpio8_9 */
- P8_38_default_pin: pinmux_P8_38_default_pin { pinctrl-single,pins = <
- P8_38A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
- P8_38_gpio_pin: pinmux_P8_38_gpio_pin { pinctrl-single,pins = <
- P8_38A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
- P8_38_gpio_pu_pin: pinmux_P8_38_gpio_pu_pin { pinctrl-single,pins = <
- P8_38A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
- P8_38_gpio_pd_pin: pinmux_P8_38_gpio_pd_pin { pinctrl-single,pins = <
- P8_38A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
- P8_38_gpio_input_pin: pinmux_P8_38_gpio_input_pin { pinctrl-single,pins = <
- P8_38A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d9.gpio8_9 */
+ P8_38_default_pin: pinmux_P8_38_default_pin { pinctrl-single,pins = < P8_38_DEFAULT >; };
+ P8_38_gpio_pin: pinmux_P8_38_gpio_pin { pinctrl-single,pins = < P8_38_GPIO >; };
+ P8_38_gpio_pu_pin: pinmux_P8_38_gpio_pu_pin { pinctrl-single,pins = < P8_38_GPIO_PU >; };
+ P8_38_gpio_pd_pin: pinmux_P8_38_gpio_pd_pin { pinctrl-single,pins = < P8_38_GPIO_PD >; };
+ P8_38_gpio_input_pin: pinmux_P8_38_gpio_input_pin { pinctrl-single,pins = < P8_38_GPIO_INPUT >; };
/* P8_38b (ball C18) */
- P8_38_uart_pin: pinmux_P8_38_uart_pin { pinctrl-single,pins = <
- P8_38B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp4_aclkx.uart8_rxd */
+ P8_38_uart_pin: pinmux_P8_38_uart_pin { pinctrl-single,pins = < P8_38_UART >; };
/* P8_39 (ball F8) gpio8_6 */
- P8_39_default_pin: pinmux_P8_39_default_pin { pinctrl-single,pins = <
- P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
- P8_39_gpio_pin: pinmux_P8_39_gpio_pin { pinctrl-single,pins = <
- P8_39( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
- P8_39_gpio_pu_pin: pinmux_P8_39_gpio_pu_pin { pinctrl-single,pins = <
- P8_39( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
- P8_39_gpio_pd_pin: pinmux_P8_39_gpio_pd_pin { pinctrl-single,pins = <
- P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
- P8_39_gpio_input_pin: pinmux_P8_39_gpio_input_pin { pinctrl-single,pins = <
- P8_39( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
- P8_39_pruout_pin: pinmux_P8_39_pruout_pin { pinctrl-single,pins = <
- P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d6.pr2_pru0_gpo3 */
- P8_39_pruin_pin: pinmux_P8_39_pruin_pin { pinctrl-single,pins = <
- P8_39( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d6.pr2_pru0_gpi3 */
+ P8_39_default_pin: pinmux_P8_39_default_pin { pinctrl-single,pins = < P8_39_DEFAULT >; };
+ P8_39_gpio_pin: pinmux_P8_39_gpio_pin { pinctrl-single,pins = < P8_39_GPIO >; };
+ P8_39_gpio_pu_pin: pinmux_P8_39_gpio_pu_pin { pinctrl-single,pins = < P8_39_GPIO_PU >; };
+ P8_39_gpio_pd_pin: pinmux_P8_39_gpio_pd_pin { pinctrl-single,pins = < P8_39_GPIO_PD >; };
+ P8_39_gpio_input_pin: pinmux_P8_39_gpio_input_pin { pinctrl-single,pins = < P8_39_GPIO_INPUT >; };
+ P8_39_pruout_pin: pinmux_P8_39_pruout_pin { pinctrl-single,pins = < P8_39_PRUOUT >; };
+ P8_39_pruin_pin: pinmux_P8_39_pruin_pin { pinctrl-single,pins = < P8_39_PRUIN >; };
/* P8_40 (ball E7) gpio8_7 */
- P8_40_default_pin: pinmux_P8_40_default_pin { pinctrl-single,pins = <
- P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
- P8_40_gpio_pin: pinmux_P8_40_gpio_pin { pinctrl-single,pins = <
- P8_40( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
- P8_40_gpio_pu_pin: pinmux_P8_40_gpio_pu_pin { pinctrl-single,pins = <
- P8_40( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
- P8_40_gpio_pd_pin: pinmux_P8_40_gpio_pd_pin { pinctrl-single,pins = <
- P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
- P8_40_gpio_input_pin: pinmux_P8_40_gpio_input_pin { pinctrl-single,pins = <
- P8_40( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
- P8_40_pruout_pin: pinmux_P8_40_pruout_pin { pinctrl-single,pins = <
- P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d7.pr2_pru0_gpo4 */
- P8_40_pruin_pin: pinmux_P8_40_pruin_pin { pinctrl-single,pins = <
- P8_40( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d7.pr2_pru0_gpi4 */
+ P8_40_default_pin: pinmux_P8_40_default_pin { pinctrl-single,pins = < P8_40_DEFAULT >; };
+ P8_40_gpio_pin: pinmux_P8_40_gpio_pin { pinctrl-single,pins = < P8_40_GPIO >; };
+ P8_40_gpio_pu_pin: pinmux_P8_40_gpio_pu_pin { pinctrl-single,pins = < P8_40_GPIO_PU >; };
+ P8_40_gpio_pd_pin: pinmux_P8_40_gpio_pd_pin { pinctrl-single,pins = < P8_40_GPIO_PD >; };
+ P8_40_gpio_input_pin: pinmux_P8_40_gpio_input_pin { pinctrl-single,pins = < P8_40_GPIO_INPUT >; };
+ P8_40_pruout_pin: pinmux_P8_40_pruout_pin { pinctrl-single,pins = < P8_40_PRUOUT >; };
+ P8_40_pruin_pin: pinmux_P8_40_pruin_pin { pinctrl-single,pins = < P8_40_PRUIN >; };
/* P8_41 (ball E9) gpio8_4 */
- P8_41_default_pin: pinmux_P8_41_default_pin { pinctrl-single,pins = <
- P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
- P8_41_gpio_pin: pinmux_P8_41_gpio_pin { pinctrl-single,pins = <
- P8_41( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
- P8_41_gpio_pu_pin: pinmux_P8_41_gpio_pu_pin { pinctrl-single,pins = <
- P8_41( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
- P8_41_gpio_pd_pin: pinmux_P8_41_gpio_pd_pin { pinctrl-single,pins = <
- P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
- P8_41_gpio_input_pin: pinmux_P8_41_gpio_input_pin { pinctrl-single,pins = <
- P8_41( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
- P8_41_pruout_pin: pinmux_P8_41_pruout_pin { pinctrl-single,pins = <
- P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d4.pr2_pru0_gpo1 */
- P8_41_pruin_pin: pinmux_P8_41_pruin_pin { pinctrl-single,pins = <
- P8_41( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d4.pr2_pru0_gpi1 */
+ P8_41_default_pin: pinmux_P8_41_default_pin { pinctrl-single,pins = < P8_41_DEFAULT >; };
+ P8_41_gpio_pin: pinmux_P8_41_gpio_pin { pinctrl-single,pins = < P8_41_GPIO >; };
+ P8_41_gpio_pu_pin: pinmux_P8_41_gpio_pu_pin { pinctrl-single,pins = < P8_41_GPIO_PU >; };
+ P8_41_gpio_pd_pin: pinmux_P8_41_gpio_pd_pin { pinctrl-single,pins = < P8_41_GPIO_PD >; };
+ P8_41_gpio_input_pin: pinmux_P8_41_gpio_input_pin { pinctrl-single,pins = < P8_41_GPIO_INPUT >; };
+ P8_41_pruout_pin: pinmux_P8_41_pruout_pin { pinctrl-single,pins = < P8_41_PRUOUT >; };
+ P8_41_pruin_pin: pinmux_P8_41_pruin_pin { pinctrl-single,pins = < P8_41_PRUIN >; };
/* P8_42 (ball F9) gpio8_5 */
- P8_42_default_pin: pinmux_P8_42_default_pin { pinctrl-single,pins = <
- P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
- P8_42_gpio_pin: pinmux_P8_42_gpio_pin { pinctrl-single,pins = <
- P8_42( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
- P8_42_gpio_pu_pin: pinmux_P8_42_gpio_pu_pin { pinctrl-single,pins = <
- P8_42( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
- P8_42_gpio_pd_pin: pinmux_P8_42_gpio_pd_pin { pinctrl-single,pins = <
- P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
- P8_42_gpio_input_pin: pinmux_P8_42_gpio_input_pin { pinctrl-single,pins = <
- P8_42( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
- P8_42_pruout_pin: pinmux_P8_42_pruout_pin { pinctrl-single,pins = <
- P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d5.pr2_pru0_gpo2 */
- P8_42_pruin_pin: pinmux_P8_42_pruin_pin { pinctrl-single,pins = <
- P8_42( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d5.pr2_pru0_gpi2 */
+ P8_42_default_pin: pinmux_P8_42_default_pin { pinctrl-single,pins = < P8_42_DEFAULT >; };
+ P8_42_gpio_pin: pinmux_P8_42_gpio_pin { pinctrl-single,pins = < P8_42_GPIO >; };
+ P8_42_gpio_pu_pin: pinmux_P8_42_gpio_pu_pin { pinctrl-single,pins = < P8_42_GPIO_PU >; };
+ P8_42_gpio_pd_pin: pinmux_P8_42_gpio_pd_pin { pinctrl-single,pins = < P8_42_GPIO_PD >; };
+ P8_42_gpio_input_pin: pinmux_P8_42_gpio_input_pin { pinctrl-single,pins = < P8_42_GPIO_INPUT >; };
+ P8_42_pruout_pin: pinmux_P8_42_pruout_pin { pinctrl-single,pins = < P8_42_PRUOUT >; };
+ P8_42_pruin_pin: pinmux_P8_42_pruin_pin { pinctrl-single,pins = < P8_42_PRUIN >; };
/* P8_43 (ball F10) gpio8_2 */
- P8_43_default_pin: pinmux_P8_43_default_pin { pinctrl-single,pins = <
- P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
- P8_43_gpio_pin: pinmux_P8_43_gpio_pin { pinctrl-single,pins = <
- P8_43( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
- P8_43_gpio_pu_pin: pinmux_P8_43_gpio_pu_pin { pinctrl-single,pins = <
- P8_43( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
- P8_43_gpio_pd_pin: pinmux_P8_43_gpio_pd_pin { pinctrl-single,pins = <
- P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
- P8_43_gpio_input_pin: pinmux_P8_43_gpio_input_pin { pinctrl-single,pins = <
- P8_43( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
- P8_43_pruout_pin: pinmux_P8_43_pruout_pin { pinctrl-single,pins = <
- P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d2.pr2_pru1_gpo20 */
- P8_43_pruin_pin: pinmux_P8_43_pruin_pin { pinctrl-single,pins = <
- P8_43( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d2.pr2_pru1_gpi20 */
+ P8_43_default_pin: pinmux_P8_43_default_pin { pinctrl-single,pins = < P8_43_DEFAULT >; };
+ P8_43_gpio_pin: pinmux_P8_43_gpio_pin { pinctrl-single,pins = < P8_43_GPIO >; };
+ P8_43_gpio_pu_pin: pinmux_P8_43_gpio_pu_pin { pinctrl-single,pins = < P8_43_GPIO_PU >; };
+ P8_43_gpio_pd_pin: pinmux_P8_43_gpio_pd_pin { pinctrl-single,pins = < P8_43_GPIO_PD >; };
+ P8_43_gpio_input_pin: pinmux_P8_43_gpio_input_pin { pinctrl-single,pins = < P8_43_GPIO_INPUT >; };
+ P8_43_pruout_pin: pinmux_P8_43_pruout_pin { pinctrl-single,pins = < P8_43_PRUOUT >; };
+ P8_43_pruin_pin: pinmux_P8_43_pruin_pin { pinctrl-single,pins = < P8_43_PRUIN >; };
/* P8_44 (ball G11) gpio8_3 */
- P8_44_default_pin: pinmux_P8_44_default_pin { pinctrl-single,pins = <
- P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
- P8_44_gpio_pin: pinmux_P8_44_gpio_pin { pinctrl-single,pins = <
- P8_44( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
- P8_44_gpio_pu_pin: pinmux_P8_44_gpio_pu_pin { pinctrl-single,pins = <
- P8_44( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
- P8_44_gpio_pd_pin: pinmux_P8_44_gpio_pd_pin { pinctrl-single,pins = <
- P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
- P8_44_gpio_input_pin: pinmux_P8_44_gpio_input_pin { pinctrl-single,pins = <
- P8_44( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
- P8_44_pruout_pin: pinmux_P8_44_pruout_pin { pinctrl-single,pins = <
- P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d3.pr2_pru0_gpo0 */
- P8_44_pruin_pin: pinmux_P8_44_pruin_pin { pinctrl-single,pins = <
- P8_44( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d3.pr2_pru0_gpi0 */
+ P8_44_default_pin: pinmux_P8_44_default_pin { pinctrl-single,pins = < P8_44_DEFAULT >; };
+ P8_44_gpio_pin: pinmux_P8_44_gpio_pin { pinctrl-single,pins = < P8_44_GPIO >; };
+ P8_44_gpio_pu_pin: pinmux_P8_44_gpio_pu_pin { pinctrl-single,pins = < P8_44_GPIO_PU >; };
+ P8_44_gpio_pd_pin: pinmux_P8_44_gpio_pd_pin { pinctrl-single,pins = < P8_44_GPIO_PD >; };
+ P8_44_gpio_input_pin: pinmux_P8_44_gpio_input_pin { pinctrl-single,pins = < P8_44_GPIO_INPUT >; };
+ P8_44_pruout_pin: pinmux_P8_44_pruout_pin { pinctrl-single,pins = < P8_44_PRUOUT >; };
+ P8_44_pruin_pin: pinmux_P8_44_pruin_pin { pinctrl-single,pins = < P8_44_PRUIN >; };
/* P8_45a (ball F11) gpio8_0 */
- P8_45_default_pin: pinmux_P8_45_default_pin { pinctrl-single,pins = <
- P8_45A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
- P8_45_gpio_pin: pinmux_P8_45_gpio_pin { pinctrl-single,pins = <
- P8_45A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
- P8_45_gpio_pu_pin: pinmux_P8_45_gpio_pu_pin { pinctrl-single,pins = <
- P8_45A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
- P8_45_gpio_pd_pin: pinmux_P8_45_gpio_pd_pin { pinctrl-single,pins = <
- P8_45A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
- P8_45_gpio_input_pin: pinmux_P8_45_gpio_input_pin { pinctrl-single,pins = <
- P8_45A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d0.gpio8_0 */
+ P8_45_default_pin: pinmux_P8_45_default_pin { pinctrl-single,pins = < P8_45_DEFAULT >; };
+ P8_45_gpio_pin: pinmux_P8_45_gpio_pin { pinctrl-single,pins = < P8_45_GPIO >; };
+ P8_45_gpio_pu_pin: pinmux_P8_45_gpio_pu_pin { pinctrl-single,pins = < P8_45_GPIO_PU >; };
+ P8_45_gpio_pd_pin: pinmux_P8_45_gpio_pd_pin { pinctrl-single,pins = < P8_45_GPIO_PD >; };
+ P8_45_gpio_input_pin: pinmux_P8_45_gpio_input_pin { pinctrl-single,pins = < P8_45_GPIO_INPUT >; };
/* P8_45b (ball B7) gpio8_16 */
- P8_45_pruout_pin: pinmux_P8_45_pruout_pin { pinctrl-single,pins = <
- P8_45B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d16.pr2_pru0_gpo13 */
- P8_45_pruin_pin: pinmux_P8_45_pruin_pin { pinctrl-single,pins = <
- P8_45B( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d16.pr2_pru0_gpi13 */
+ P8_45_pruout_pin: pinmux_P8_45_pruout_pin { pinctrl-single,pins = < P8_45_PRUOUT >; };
+ P8_45_pruin_pin: pinmux_P8_45_pruin_pin { pinctrl-single,pins = < P8_45_PRUIN >; };
/* P8_46a (ball G10) gpio8_1 */
- P8_46_default_pin: pinmux_P8_46_default_pin { pinctrl-single,pins = <
- P8_46A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
- P8_46_gpio_pin: pinmux_P8_46_gpio_pin { pinctrl-single,pins = <
- P8_46A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
- P8_46_gpio_pu_pin: pinmux_P8_46_gpio_pu_pin { pinctrl-single,pins = <
- P8_46A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
- P8_46_gpio_pd_pin: pinmux_P8_46_gpio_pd_pin { pinctrl-single,pins = <
- P8_46A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
- P8_46_gpio_input_pin: pinmux_P8_46_gpio_input_pin { pinctrl-single,pins = <
- P8_46A( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d1.gpio8_1 */
+ P8_46_default_pin: pinmux_P8_46_default_pin { pinctrl-single,pins = < P8_46_DEFAULT >; };
+ P8_46_gpio_pin: pinmux_P8_46_gpio_pin { pinctrl-single,pins = < P8_46_GPIO >; };
+ P8_46_gpio_pu_pin: pinmux_P8_46_gpio_pu_pin { pinctrl-single,pins = < P8_46_GPIO_PU >; };
+ P8_46_gpio_pd_pin: pinmux_P8_46_gpio_pd_pin { pinctrl-single,pins = < P8_46_GPIO_PD >; };
+ P8_46_gpio_input_pin: pinmux_P8_46_gpio_input_pin { pinctrl-single,pins = < P8_46_GPIO_INPUT >; };
/* P8_46b (ball A10) gpio8_23 */
- P8_46_pruout_pin: pinmux_P8_46_pruout_pin { pinctrl-single,pins = <
- P8_46B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d23.pr2_pru0_gpo20 */
- P8_46_pruin_pin: pinmux_P8_46_pruin_pin { pinctrl-single,pins = <
- P8_46B( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d23.pr2_pru0_gpi20 */
+ P8_46_pruout_pin: pinmux_P8_46_pruout_pin { pinctrl-single,pins = < P8_46_PRUOUT >; };
+ P8_46_pruin_pin: pinmux_P8_46_pruin_pin { pinctrl-single,pins = < P8_46_PRUIN >; };
/************************/
/* P9 Header */
@@ -705,371 +434,221 @@
/* P9_10 RSTn */
/* P9_11a (ball B19) */
- P9_11_uart_pin: pinmux_P9_11_uart_pin { pinctrl-single,pins = <
- P9_11A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp3_axr0.uart5_rxd */
+ P9_11_uart_pin: pinmux_P9_11_uart_pin { pinctrl-single,pins = < P9_11_UART >; };
/* P9_11b (ball B8) gpio8_17 */
- P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = <
- P9_11B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
- P9_11_gpio_pin: pinmux_P9_11_gpio_pin { pinctrl-single,pins = <
- P9_11B( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
- P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin { pinctrl-single,pins = <
- P9_11B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
- P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin { pinctrl-single,pins = <
- P9_11B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
- P9_11_gpio_input_pin: pinmux_P9_11_gpio_input_pin { pinctrl-single,pins = <
- P9_11B( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d17.gpio8_17 */
+ P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = < P9_11_DEFAULT >; };
+ P9_11_gpio_pin: pinmux_P9_11_gpio_pin { pinctrl-single,pins = < P9_11_GPIO >; };
+ P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin { pinctrl-single,pins = < P9_11_GPIO_PU >; };
+ P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin { pinctrl-single,pins = < P9_11_GPIO_PD >; };
+ P9_11_gpio_input_pin: pinmux_P9_11_gpio_input_pin { pinctrl-single,pins = < P9_11_GPIO_INPUT >; };
/* P9_12 (ball B14) gpio5_0 */
- P9_12_default_pin: pinmux_P9_12_default_pin { pinctrl-single,pins = <
- P9_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
- P9_12_gpio_pin: pinmux_P9_12_gpio_pin { pinctrl-single,pins = <
- P9_12( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
- P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin { pinctrl-single,pins = <
- P9_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
- P9_12_gpio_pd_pin: pinmux_P9_12_gpio_pd_pin { pinctrl-single,pins = <
- P9_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
- P9_12_gpio_input_pin: pinmux_P9_12_gpio_input_pin { pinctrl-single,pins = <
- P9_12( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
+ P9_12_default_pin: pinmux_P9_12_default_pin { pinctrl-single,pins = < P9_12_DEFAULT >; };
+ P9_12_gpio_pin: pinmux_P9_12_gpio_pin { pinctrl-single,pins = < P9_12_GPIO >; };
+ P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin { pinctrl-single,pins = < P9_12_GPIO_PU >; };
+ P9_12_gpio_pd_pin: pinmux_P9_12_gpio_pd_pin { pinctrl-single,pins = < P9_12_GPIO_PD >; };
+ P9_12_gpio_input_pin: pinmux_P9_12_gpio_input_pin { pinctrl-single,pins = < P9_12_GPIO_INPUT >; };
/* P9_13a (ball C17) */
- P9_13_uart_pin: pinmux_P9_13_uart_pin { pinctrl-single,pins = <
- P9_13A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* mcasp3_axr1.uart5_txd */
+ P9_13_uart_pin: pinmux_P9_13_uart_pin { pinctrl-single,pins = < P9_13_UART >; };
/* P9_13b (ball AB10) gpio6_12 */
- P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = <
- P9_13B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
- P9_13_gpio_pin: pinmux_P9_13_gpio_pin { pinctrl-single,pins = <
- P9_13B( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
- P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin { pinctrl-single,pins = <
- P9_13B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
- P9_13_gpio_pd_pin: pinmux_P9_13_gpio_pd_pin { pinctrl-single,pins = <
- P9_13B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
- P9_13_gpio_input_pin: pinmux_P9_13_gpio_input_pin { pinctrl-single,pins = <
- P9_13B( PIN_INPUT | MUX_MODE14) >; }; /* usb1_drvvbus.gpio6_12 */
+ P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = < P9_13_DEFAULT >; };
+ P9_13_gpio_pin: pinmux_P9_13_gpio_pin { pinctrl-single,pins = < P9_13_GPIO >; };
+ P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin { pinctrl-single,pins = < P9_13_GPIO_PU >; };
+ P9_13_gpio_pd_pin: pinmux_P9_13_gpio_pd_pin { pinctrl-single,pins = < P9_13_GPIO_PD >; };
+ P9_13_gpio_input_pin: pinmux_P9_13_gpio_input_pin { pinctrl-single,pins = < P9_13_GPIO_INPUT >; };
/* P9_14 (ball D6) gpio4_25 */
- P9_14_default_pin: pinmux_P9_14_default_pin { pinctrl-single,pins = <
- P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
- P9_14_gpio_pin: pinmux_P9_14_gpio_pin { pinctrl-single,pins = <
- P9_14( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
- P9_14_gpio_pu_pin: pinmux_P9_14_gpio_pu_pin { pinctrl-single,pins = <
- P9_14( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
- P9_14_gpio_pd_pin: pinmux_P9_14_gpio_pd_pin { pinctrl-single,pins = <
- P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
- P9_14_gpio_input_pin: pinmux_P9_14_gpio_input_pin { pinctrl-single,pins = <
- P9_14( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
- P9_14_pwm_pin: pinmux_P9_14_pwm_pin { pinctrl-single,pins = <
- P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d17.ehrpwm3A */
+ P9_14_default_pin: pinmux_P9_14_default_pin { pinctrl-single,pins = < P9_14_DEFAULT >; };
+ P9_14_gpio_pin: pinmux_P9_14_gpio_pin { pinctrl-single,pins = < P9_14_GPIO >; };
+ P9_14_gpio_pu_pin: pinmux_P9_14_gpio_pu_pin { pinctrl-single,pins = < P9_14_GPIO_PU >; };
+ P9_14_gpio_pd_pin: pinmux_P9_14_gpio_pd_pin { pinctrl-single,pins = < P9_14_GPIO_PD >; };
+ P9_14_gpio_input_pin: pinmux_P9_14_gpio_input_pin { pinctrl-single,pins = < P9_14_GPIO_INPUT >; };
+ P9_14_pwm_pin: pinmux_P9_14_pwm_pin { pinctrl-single,pins = < P9_14_PWM >; };
/* P9_15 (ball AG4) gpio3_12 */
- P9_15_default_pin: pinmux_P9_15_default_pin { pinctrl-single,pins = <
- P9_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
- P9_15_gpio_pin: pinmux_P9_15_gpio_pin { pinctrl-single,pins = <
- P9_15( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
- P9_15_gpio_pu_pin: pinmux_P9_15_gpio_pu_pin { pinctrl-single,pins = <
- P9_15( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
- P9_15_gpio_pd_pin: pinmux_P9_15_gpio_pd_pin { pinctrl-single,pins = <
- P9_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
- P9_15_gpio_input_pin: pinmux_P9_15_gpio_input_pin { pinctrl-single,pins = <
- P9_15( PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
+ P9_15_default_pin: pinmux_P9_15_default_pin { pinctrl-single,pins = < P9_15_DEFAULT >; };
+ P9_15_gpio_pin: pinmux_P9_15_gpio_pin { pinctrl-single,pins = < P9_15_GPIO >; };
+ P9_15_gpio_pu_pin: pinmux_P9_15_gpio_pu_pin { pinctrl-single,pins = < P9_15_GPIO_PU >; };
+ P9_15_gpio_pd_pin: pinmux_P9_15_gpio_pd_pin { pinctrl-single,pins = < P9_15_GPIO_PD >; };
+ P9_15_gpio_input_pin: pinmux_P9_15_gpio_input_pin { pinctrl-single,pins = < P9_15_GPIO_INPUT >; };
/* P9_16 (ball C5) gpio4_26 */
- P9_16_default_pin: pinmux_P9_16_default_pin { pinctrl-single,pins = <
- P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d18.gpio4_26 */
- P9_16_gpio_pin: pinmux_P9_16_gpio_pin { pinctrl-single,pins = <
- P9_16( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
- P9_16_gpio_pu_pin: pinmux_P9_16_gpio_pu_pin { pinctrl-single,pins = <
- P9_16( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
- P9_16_gpio_pd_pin: pinmux_P9_16_gpio_pd_pin { pinctrl-single,pins = <
- P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
- P9_16_gpio_input_pin: pinmux_P9_16_gpio_input_pin { pinctrl-single,pins = <
- P9_16( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
- P9_16_pwm_pin: pinmux_P9_16_pwm_pin { pinctrl-single,pins = <
- P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d18.ehrpwm3B */
+ P9_16_default_pin: pinmux_P9_16_default_pin { pinctrl-single,pins = < P9_16_DEFAULT >; };
+ P9_16_gpio_pin: pinmux_P9_16_gpio_pin { pinctrl-single,pins = < P9_16_GPIO >; };
+ P9_16_gpio_pu_pin: pinmux_P9_16_gpio_pu_pin { pinctrl-single,pins = < P9_16_GPIO_PU >; };
+ P9_16_gpio_pd_pin: pinmux_P9_16_gpio_pd_pin { pinctrl-single,pins = < P9_16_GPIO_PD >; };
+ P9_16_gpio_input_pin: pinmux_P9_16_gpio_input_pin { pinctrl-single,pins = < P9_16_GPIO_INPUT >; };
+ P9_16_pwm_pin: pinmux_P9_16_pwm_pin { pinctrl-single,pins = < P9_16_PWM >; };
/* P9_17a (ball B24) gpio7_17 */
- P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = <
- P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
- P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = <
- P9_17A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
- P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = <
- P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
- P9_17_gpio_pd_pin: pinmux_P9_17_gpio_pd_pin { pinctrl-single,pins = <
- P9_17A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
- P9_17_gpio_input_pin: pinmux_P9_17_gpio_input_pin { pinctrl-single,pins = <
- P9_17A( PIN_INPUT | MUX_MODE14) >; }; /* spi2_cs0.gpio7_17 */
- P9_17_spi_cs_pin: pinmux_P9_17_spi_cs_pin { pinctrl-single,pins = <
- P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_cs0.spi2_cs0 */
+ P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = < P9_17_DEFAULT >; };
+ P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = < P9_17_GPIO >; };
+ P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = < P9_17_GPIO_PU >; };
+ P9_17_gpio_pd_pin: pinmux_P9_17_gpio_pd_pin { pinctrl-single,pins = < P9_17_GPIO_PD >; };
+ P9_17_gpio_input_pin: pinmux_P9_17_gpio_input_pin { pinctrl-single,pins = < P9_17_GPIO_INPUT >; };
+ P9_17_spi_cs_pin: pinmux_P9_17_spi_cs_pin { pinctrl-single,pins = < P9_17_SPI >; };
/* P9_17b (ball F12) gpio5_3 */
- P9_17_i2c_pin: pinmux_P9_17_i2c_pin { pinctrl-single,pins = <
- P9_17B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr1.i2c5_scl */
- P9_17_uart_pin: pinmux_P9_17_pru_uart_pin { pinctrl-single,pins = <
- P9_17B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr1.uart6_txd */
+ P9_17_i2c_pin: pinmux_P9_17_i2c_pin { pinctrl-single,pins = < P9_17_I2C >; };
+ P9_17_uart_pin: pinmux_P9_17_pru_uart_pin { pinctrl-single,pins = < P9_17_UART >; };
/* P9_18a (ball G17) gpio7_16 */
- P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = <
- P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
- P9_18_gpio_pin: pinmux_P9_18_gpio_pin { pinctrl-single,pins = <
- P9_18A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
- P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin { pinctrl-single,pins = <
- P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
- P9_18_gpio_pd_pin: pinmux_P9_18_gpio_pd_pin { pinctrl-single,pins = <
- P9_18A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
- P9_18_gpio_input_pin: pinmux_P9_18_gpio_input_pin { pinctrl-single,pins = <
- P9_18A( PIN_INPUT | MUX_MODE14) >; }; /* spi2_d0.gpio7_16 */
- P9_18_spi_pin: pinmux_P9_18_spi_pin { pinctrl-single,pins = <
- P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_d0.spi2_d0 */
+ P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = < P9_18_DEFAULT >; };
+ P9_18_gpio_pin: pinmux_P9_18_gpio_pin { pinctrl-single,pins = < P9_18_GPIO >; };
+ P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin { pinctrl-single,pins = < P9_18_GPIO_PU >; };
+ P9_18_gpio_pd_pin: pinmux_P9_18_gpio_pd_pin { pinctrl-single,pins = < P9_18_GPIO_PD >; };
+ P9_18_gpio_input_pin: pinmux_P9_18_gpio_input_pin { pinctrl-single,pins = < P9_18_GPIO_INPUT >; };
+ P9_18_spi_pin: pinmux_P9_18_spi_pin { pinctrl-single,pins = < P9_18_SPI >; };
/* P9_18b (ball G12) gpio5_2 */
- P9_18_i2c_pin: pinmux_P9_18_i2c_pin { pinctrl-single,pins = <
- P9_18B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr0.i2c5_sda */
- P9_18_uart_pin: pinmux_P9_18_pru_uart_pin { pinctrl-single,pins = <
- P9_18B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr0.uart6_rxd */
+ P9_18_i2c_pin: pinmux_P9_18_i2c_pin { pinctrl-single,pins = < P9_18_I2C >; };
+ P9_18_uart_pin: pinmux_P9_18_pru_uart_pin { pinctrl-single,pins = < P9_18_UART >; };
/* P9_19a (ball R6) gpio7_3 */
- P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = <
- P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio7_3 */
- P9_19_gpio_pin: pinmux_P9_19_gpio_pin { pinctrl-single,pins = <
- P9_19A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
- P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin { pinctrl-single,pins = <
- P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
- P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin { pinctrl-single,pins = <
- P9_19A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
- P9_19_gpio_input_pin: pinmux_P9_19_gpio_input_pin { pinctrl-single,pins = <
- P9_19A( PIN_INPUT | MUX_MODE14) >; }; /* gpmc_a0.gpio7_3 */
- P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = <
- P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.i2c4_scl */
+ P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = < P9_19_DEFAULT >; };
+ P9_19_gpio_pin: pinmux_P9_19_gpio_pin { pinctrl-single,pins = < P9_19_GPIO >; };
+ P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin { pinctrl-single,pins = < P9_19_GPIO_PU >; };
+ P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin { pinctrl-single,pins = < P9_19_GPIO_PD >; };
+ P9_19_gpio_input_pin: pinmux_P9_19_gpio_input_pin { pinctrl-single,pins = < P9_19_GPIO_INPUT >; };
+ P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = < P9_19_I2C >; };
/* P9_19b (ball F4) gpio4_6 */
- P9_19_qep_pin: pinmux_P9_19_qep_pin { pinctrl-single,pins = <
- P9_19B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d5.eQEP2A_in */
+ P9_19_qep_pin: pinmux_P9_19_qep_pin { pinctrl-single,pins = < P9_19_QEP >; };
/* P9_20a (ball T9) gpio7_4 */
- P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = <
- P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio7_4 */
- P9_20_gpio_pin: pinmux_P9_20_gpio_pin { pinctrl-single,pins = <
- P9_20A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
- P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin { pinctrl-single,pins = <
- P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
- P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin { pinctrl-single,pins = <
- P9_20A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
- P9_20_gpio_input_pin: pinmux_P9_20_gpio_input_pin { pinctrl-single,pins = <
- P9_20A( PIN_INPUT | MUX_MODE14) >; }; /* gpmc_a1.gpio7_4 */
- P9_20_i2c_pin: pinmux_P9_20_i2c_pin { pinctrl-single,pins = <
- P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.i2c4_sda */
+ P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = < P9_20_DEFAULT >; };
+ P9_20_gpio_pin: pinmux_P9_20_gpio_pin { pinctrl-single,pins = < P9_20_GPIO >; };
+ P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin { pinctrl-single,pins = < P9_20_GPIO_PU >; };
+ P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin { pinctrl-single,pins = < P9_20_GPIO_PD >; };
+ P9_20_gpio_input_pin: pinmux_P9_20_gpio_input_pin { pinctrl-single,pins = < P9_20_GPIO_INPUT >; };
+ P9_20_i2c_pin: pinmux_P9_20_i2c_pin { pinctrl-single,pins = < P9_20_I2C >; };
/* P9_20b (ball D2) gpio4_5*/
- P9_20_pruout_pin: pinmux_P9_20_pruout_pin { pinctrl-single,pins = <
- P9_20B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d4.pr1_pru1_gpo1 */
- P9_20_pruin_pin: pinmux_P9_20_pruin_pin { pinctrl-single,pins = <
- P9_20B( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d4.pr1_pru1_gpi1 */
+ P9_20_pruout_pin: pinmux_P9_20_pruout_pin { pinctrl-single,pins = < P9_20_PRUOUT >; };
+ P9_20_pruin_pin: pinmux_P9_20_pruin_pin { pinctrl-single,pins = < P9_20_PRUIN >; };
/* P9_21a (ball AF8) gpio3_3 */
- P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = <
- P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
- P9_21_gpio_pin: pinmux_P9_21_gpio_pin { pinctrl-single,pins = <
- P9_21A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
- P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin { pinctrl-single,pins = <
- P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
- P9_21_gpio_pd_pin: pinmux_P9_21_gpio_pd_pin { pinctrl-single,pins = <
- P9_21A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
- P9_21_gpio_input_pin: pinmux_P9_21_gpio_input_pin { pinctrl-single,pins = <
- P9_21A( PIN_INPUT | MUX_MODE14) >; }; /* vin1a_vsync0.gpio3_3 */
- P9_21_qep_pin: pinmux_P9_21_qep_pin { pinctrl-single,pins = <
- P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_vsync0.eQEP1_strobe */
+ P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = < P9_21_DEFAULT >; };
+ P9_21_gpio_pin: pinmux_P9_21_gpio_pin { pinctrl-single,pins = < P9_21_GPIO >; };
+ P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin { pinctrl-single,pins = < P9_21_GPIO_PU >; };
+ P9_21_gpio_pd_pin: pinmux_P9_21_gpio_pd_pin { pinctrl-single,pins = < P9_21_GPIO_PD >; };
+ P9_21_gpio_input_pin: pinmux_P9_21_gpio_input_pin { pinctrl-single,pins = < P9_21_GPIO_INPUT >; };
+ P9_21_qep_pin: pinmux_P9_21_qep_pin { pinctrl-single,pins = < P9_21_QEP >; };
/* P9_21b (ball B22) gpio7_15 */
- P9_21_spi_pin: pinmux_P9_21_spi_pin { pinctrl-single,pins = <
- P9_21B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_d1.spi2_d1 */
- P9_21_uart_pin: pinmux_P9_21_uart_pin { pinctrl-single,pins = <
- P9_21B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi2_d1.uart3_txd */
+ P9_21_spi_pin: pinmux_P9_21_spi_pin { pinctrl-single,pins = < P9_21_SPI >; };
+ P9_21_uart_pin: pinmux_P9_21_uart_pin { pinctrl-single,pins = < P9_21_UART >; };
/* P9_22a (ball B26) gpio6_19 */
- P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
- P9_22A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
- P9_22_gpio_pin: pinmux_P9_22_gpio_pin { pinctrl-single,pins = <
- P9_22A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
- P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin { pinctrl-single,pins = <
- P9_22A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
- P9_22_gpio_pd_pin: pinmux_P9_22_gpio_pd_pin { pinctrl-single,pins = <
- P9_22A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
- P9_22_gpio_input_pin: pinmux_P9_22_gpio_input_pin { pinctrl-single,pins = <
- P9_22A( PIN_INPUT | MUX_MODE14) >; }; /* xref_clk2.gpio6_19 */
+ P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = < P9_22_DEFAULT >; };
+ P9_22_gpio_pin: pinmux_P9_22_gpio_pin { pinctrl-single,pins = < P9_22_GPIO >; };
+ P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin { pinctrl-single,pins = < P9_22_GPIO_PU >; };
+ P9_22_gpio_pd_pin: pinmux_P9_22_gpio_pd_pin { pinctrl-single,pins = < P9_22_GPIO_PD >; };
+ P9_22_gpio_input_pin: pinmux_P9_22_gpio_input_pin { pinctrl-single,pins = < P9_22_GPIO_INPUT >; };
/* P9_22b (ball A26) gpio7_14 */
- P9_22_spi_sclk_pin: pinmux_P9_22_spi_sclk_pin { pinctrl-single,pins = <
- P9_22B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi2_sclk.spi2_sclk */
- P9_22_uart_pin: pinmux_P9_22_uart_pin { pinctrl-single,pins = <
- P9_22B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi2_sclk.uart3_rxd */
+ P9_22_spi_sclk_pin: pinmux_P9_22_spi_sclk_pin { pinctrl-single,pins = < P9_22_SPI >; };
+ P9_22_uart_pin: pinmux_P9_22_uart_pin { pinctrl-single,pins = < P9_22_UART >; };
/* P9_23 (ball A22) gpio7_11 */
- P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = <
- P9_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
- P9_23_gpio_pin: pinmux_P9_23_gpio_pin { pinctrl-single,pins = <
- P9_23( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
- P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin { pinctrl-single,pins = <
- P9_23( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
- P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin { pinctrl-single,pins = <
- P9_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
- P9_23_gpio_input_pin: pinmux_P9_23_gpio_input_pin { pinctrl-single,pins = <
- P9_23( PIN_INPUT | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
+ P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = < P9_23_DEFAULT >; };
+ P9_23_gpio_pin: pinmux_P9_23_gpio_pin { pinctrl-single,pins = < P9_23_GPIO >; };
+ P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin { pinctrl-single,pins = < P9_23_GPIO_PU >; };
+ P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin { pinctrl-single,pins = < P9_23_GPIO_PD >; };
+ P9_23_gpio_input_pin: pinmux_P9_23_gpio_input_pin { pinctrl-single,pins = < P9_23_GPIO_INPUT >; };
/* P9_24 (ball F20) gpio6_15*/
- P9_24_default_pin: pinmux_P9_24_default_pin { pinctrl-single,pins = <
- P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
- P9_24_gpio_pin: pinmux_P9_24_gpio_pin { pinctrl-single,pins = <
- P9_24( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
- P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin { pinctrl-single,pins = <
- P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
- P9_24_gpio_pd_pin: pinmux_P9_24_gpio_pd_pin { pinctrl-single,pins = <
- P9_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
- P9_24_gpio_input_pin: pinmux_P9_24_gpio_input_pin { pinctrl-single,pins = <
- P9_24( PIN_INPUT | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
- P9_24_uart_pin: pinmux_P9_24_uart_pin { pinctrl-single,pins = <
- P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* gpio6_15.uart10_txd */
- P9_24_can_pin: pinmux_P9_24_can_pin { pinctrl-single,pins = <
- P9_24( PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* gpio6_15.dcan2_rx */
- P9_24_i2c_pin: pinmux_P9_24_i2c_pin { pinctrl-single,pins = <
- P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) >; }; /* gpio6_15.i2c3_scl */
+ P9_24_default_pin: pinmux_P9_24_default_pin { pinctrl-single,pins = < P9_24_DEFAULT >; };
+ P9_24_gpio_pin: pinmux_P9_24_gpio_pin { pinctrl-single,pins = < P9_24_GPIO >; };
+ P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin { pinctrl-single,pins = < P9_24_GPIO_PU >; };
+ P9_24_gpio_pd_pin: pinmux_P9_24_gpio_pd_pin { pinctrl-single,pins = < P9_24_GPIO_PD >; };
+ P9_24_gpio_input_pin: pinmux_P9_24_gpio_input_pin { pinctrl-single,pins = < P9_24_GPIO_INPUT >; };
+ P9_24_uart_pin: pinmux_P9_24_uart_pin { pinctrl-single,pins = < P9_24_UART >; };
+ P9_24_can_pin: pinmux_P9_24_can_pin { pinctrl-single,pins = < P9_24_CAN >; };
+ P9_24_i2c_pin: pinmux_P9_24_i2c_pin { pinctrl-single,pins = < P9_24_I2C >; };
/* P9_25 (ball D18) gpio6_17 */
- P9_25_default_pin: pinmux_P9_25_default_pin { pinctrl-single,pins = <
- P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
- P9_25_gpio_pin: pinmux_P9_25_gpio_pin { pinctrl-single,pins = <
- P9_25( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
- P9_25_gpio_pu_pin: pinmux_P9_25_gpio_pu_pin { pinctrl-single,pins = <
- P9_25( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
- P9_25_gpio_pd_pin: pinmux_P9_25_gpio_pd_pin { pinctrl-single,pins = <
- P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
- P9_25_gpio_input_pin: pinmux_P9_25_gpio_input_pin { pinctrl-single,pins = <
- P9_25( PIN_INPUT | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
- P9_25_pruout_pin: pinmux_P9_25_pruout_pin { pinctrl-single,pins = <
- P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* xref_clk0.pr2_pru1_gpo5 */
- P9_25_pruin_pin: pinmux_P9_25_pruin_pin { pinctrl-single,pins = <
- P9_25( PIN_INPUT | MUX_MODE12) >; }; /* xref_clk0.pr2_pru1_gpi5 */
+ P9_25_default_pin: pinmux_P9_25_default_pin { pinctrl-single,pins = < P9_25_DEFAULT >; };
+ P9_25_gpio_pin: pinmux_P9_25_gpio_pin { pinctrl-single,pins = < P9_25_GPIO >; };
+ P9_25_gpio_pu_pin: pinmux_P9_25_gpio_pu_pin { pinctrl-single,pins = < P9_25_GPIO_PU >; };
+ P9_25_gpio_pd_pin: pinmux_P9_25_gpio_pd_pin { pinctrl-single,pins = < P9_25_GPIO_PD >; };
+ P9_25_gpio_input_pin: pinmux_P9_25_gpio_input_pin { pinctrl-single,pins = < P9_25_GPIO_INPUT >; };
+ P9_25_pruout_pin: pinmux_P9_25_pruout_pin { pinctrl-single,pins = < P9_25_PRUOUT >; };
+ P9_25_pruin_pin: pinmux_P9_25_pruin_pin { pinctrl-single,pins = < P9_25_PRUIN >; };
/* P9_26a (ball E21) gpio6_14 */
- P9_26_default_pin: pinmux_P9_26_default_pin { pinctrl-single,pins = <
- P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
- P9_26_gpio_pin: pinmux_P9_26_gpio_pin { pinctrl-single,pins = <
- P9_26A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
- P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin { pinctrl-single,pins = <
- P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
- P9_26_gpio_pd_pin: pinmux_P9_26_gpio_pd_pin { pinctrl-single,pins = <
- P9_26A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
- P9_26_gpio_input_pin: pinmux_P9_26_gpio_input_pin { pinctrl-single,pins = <
- P9_26A( PIN_INPUT | MUX_MODE14) >; }; /* gpio6_14.gpio6_14 */
- P9_26_uart_pin: pinmux_P9_26_uart_pin { pinctrl-single,pins = <
- P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* gpio6_14.uart10_rxd */
- P9_26_can_pin: pinmux_P9_26_can_pin { pinctrl-single,pins = <
- P9_26A( PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* gpio6_14.dcan2_tx */
- P9_26_i2c_pin: pinmux_P9_26_i2c_pin { pinctrl-single,pins = <
- P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) >; }; /* gpio6_14.i2c3_sda */
+ P9_26_default_pin: pinmux_P9_26_default_pin { pinctrl-single,pins = < P9_26_DEFAULT >; };
+ P9_26_gpio_pin: pinmux_P9_26_gpio_pin { pinctrl-single,pins = < P9_26_GPIO >; };
+ P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin { pinctrl-single,pins = < P9_26_GPIO_PU >; };
+ P9_26_gpio_pd_pin: pinmux_P9_26_gpio_pd_pin { pinctrl-single,pins = < P9_26_GPIO_PD >; };
+ P9_26_gpio_input_pin: pinmux_P9_26_gpio_input_pin { pinctrl-single,pins = < P9_26_GPIO_INPUT >; };
+ P9_26_uart_pin: pinmux_P9_26_uart_pin { pinctrl-single,pins = < P9_26_UART >; };
+ P9_26_can_pin: pinmux_P9_26_can_pin { pinctrl-single,pins = < P9_26_CAN >; };
+ P9_26_i2c_pin: pinmux_P9_26_i2c_pin { pinctrl-single,pins = < P9_26_I2C >; };
/* P9_26b (ball AE2) gpio3_24 */
- P9_26_pruout_pin: pinmux_P9_26_pruout_pin { pinctrl-single,pins = <
- P9_26B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d20.pr1_pru0_gpo17*/
- P9_26_pruin_pin: pinmux_P9_26_pruin_pin { pinctrl-single,pins = <
- P9_26B( PIN_INPUT | MUX_MODE12) >; }; /* vin1a_d20.pr1_pru0_gpi17*/
+ P9_26_pruout_pin: pinmux_P9_26_pruout_pin { pinctrl-single,pins = < P9_26_PRUOUT >; };
+ P9_26_pruin_pin: pinmux_P9_26_pruin_pin { pinctrl-single,pins = < P9_26_PRUIN >; };
/* P9_27a (ball C3) gpio4_15 */
- P9_27_default_pin: pinmux_P9_27_default_pin { pinctrl-single,pins = <
- P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
- P9_27_gpio_pin: pinmux_P9_27_gpio_pin { pinctrl-single,pins = <
- P9_27A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
- P9_27_gpio_pu_pin: pinmux_P9_27_gpio_pu_pin { pinctrl-single,pins = <
- P9_27A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
- P9_27_gpio_pd_pin: pinmux_P9_27_gpio_pd_pin { pinctrl-single,pins = <
- P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
- P9_27_gpio_input_pin: pinmux_P9_27_gpio_input_pin { pinctrl-single,pins = <
- P9_27A( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d14.gpio4_15 */
- P9_27_qep_pin: pinmux_P9_27_qep_pin { pinctrl-single,pins = <
- P9_27A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d14.eQEP3B_in */
- P9_27_pruout_pin: pinmux_P9_27_pruout_pin { pinctrl-single,pins = <
- P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d14.pr1_pru1_gpo11 */
- P9_27_pruin_pin: pinmux_P9_27_pruin_pin { pinctrl-single,pins = <
- P9_27A( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d14.pr1_pru1_gpi11 */
+ P9_27_default_pin: pinmux_P9_27_default_pin { pinctrl-single,pins = < P9_27_DEFAULT >; };
+ P9_27_gpio_pin: pinmux_P9_27_gpio_pin { pinctrl-single,pins = < P9_27_GPIO >; };
+ P9_27_gpio_pu_pin: pinmux_P9_27_gpio_pu_pin { pinctrl-single,pins = < P9_27_GPIO_PU >; };
+ P9_27_gpio_pd_pin: pinmux_P9_27_gpio_pd_pin { pinctrl-single,pins = < P9_27_GPIO_PD >; };
+ P9_27_gpio_input_pin: pinmux_P9_27_gpio_input_pin { pinctrl-single,pins = < P9_27_GPIO_INPUT >; };
+ P9_27_qep_pin: pinmux_P9_27_qep_pin { pinctrl-single,pins = < P9_27_QEP >; };
+ P9_27_pruout_pin: pinmux_P9_27_pruout_pin { pinctrl-single,pins = < P9_27_PRUOUT >; };
+ P9_27_pruin_pin: pinmux_P9_27_pruin_pin { pinctrl-single,pins = < P9_27_PRUIN >; };
/* P9_27b (ball J14) gpio5_1 */
/* P9_28 (ball A12) gpio4_17 */
- P9_28_default_pin: pinmux_P9_28_default_pin { pinctrl-single,pins = <
- P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
- P9_28_gpio_pin: pinmux_P9_28_gpio_pin { pinctrl-single,pins = <
- P9_28( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
- P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin { pinctrl-single,pins = <
- P9_28( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
- P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin { pinctrl-single,pins = <
- P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
- P9_28_gpio_input_pin: pinmux_P9_28_gpio_input_pin { pinctrl-single,pins = <
- P9_28( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
- P9_28_spi_cs_pin: pinmux_P9_28_spi_cs_pin { pinctrl-single,pins = <
- P9_28( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr11.spi3_cs0 */
- P9_28_pruout_pin: pinmux_P9_28_pruout_pin { pinctrl-single,pins = <
- P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr11.pr2_pru1_gpo13 */
- P9_28_pruin_pin: pinmux_P9_28_pruin_pin { pinctrl-single,pins = <
- P9_28( PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr11.pr2_pru1_gpi13 */
+ P9_28_default_pin: pinmux_P9_28_default_pin { pinctrl-single,pins = < P9_28_DEFAULT >; };
+ P9_28_gpio_pin: pinmux_P9_28_gpio_pin { pinctrl-single,pins = < P9_28_GPIO >; };
+ P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin { pinctrl-single,pins = < P9_28_GPIO_PU >; };
+ P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin { pinctrl-single,pins = < P9_28_GPIO_PD >; };
+ P9_28_gpio_input_pin: pinmux_P9_28_gpio_input_pin { pinctrl-single,pins = < P9_28_GPIO_INPUT >; };
+ P9_28_spi_cs_pin: pinmux_P9_28_spi_cs_pin { pinctrl-single,pins = < P9_28_SPI >; };
+ P9_28_pruout_pin: pinmux_P9_28_pruout_pin { pinctrl-single,pins = < P9_28_PRUOUT >; };
+ P9_28_pruin_pin: pinmux_P9_28_pruin_pin { pinctrl-single,pins = < P9_28_PRUIN >; };
/* P9_29a (ball A11) gpio5_11*/
- P9_29_default_pin: pinmux_P9_29_default_pin { pinctrl-single,pins = <
- P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
- P9_29_gpio_pin: pinmux_P9_29_gpio_pin { pinctrl-single,pins = <
- P9_29A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
- P9_29_gpio_pu_pin: pinmux_P9_29_gpio_pu_pin { pinctrl-single,pins = <
- P9_29A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
- P9_29_gpio_pd_pin: pinmux_P9_29_gpio_pd_pin { pinctrl-single,pins = <
- P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
- P9_29_gpio_input_pin: pinmux_P9_29_gpio_input_pin { pinctrl-single,pins = <
- P9_29A( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr9.gpio5_11 */
- P9_29_spi_pin: pinmux_P9_29_spi_pin { pinctrl-single,pins = <
- P9_29A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr9.spi3_d1 */
- P9_29_pruout_pin: pinmux_P9_29_pruout_pin { pinctrl-single,pins = <
- P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr9.pr2_pru1_gpo11 */
- P9_29_pruin_pin: pinmux_P9_29_pruin_pin { pinctrl-single,pins = <
- P9_29A( PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr9.pr2_pru1_gpi11 */
+ P9_29_default_pin: pinmux_P9_29_default_pin { pinctrl-single,pins = < P9_29_DEFAULT >; };
+ P9_29_gpio_pin: pinmux_P9_29_gpio_pin { pinctrl-single,pins = < P9_29_GPIO >; };
+ P9_29_gpio_pu_pin: pinmux_P9_29_gpio_pu_pin { pinctrl-single,pins = < P9_29_GPIO_PU >; };
+ P9_29_gpio_pd_pin: pinmux_P9_29_gpio_pd_pin { pinctrl-single,pins = < P9_29_GPIO_PD >; };
+ P9_29_gpio_input_pin: pinmux_P9_29_gpio_input_pin { pinctrl-single,pins = < P9_29_GPIO_INPUT >; };
+ P9_29_spi_pin: pinmux_P9_29_spi_pin { pinctrl-single,pins = < P9_29_SPI >; };
+ P9_29_pruout_pin: pinmux_P9_29_pruout_pin { pinctrl-single,pins = < P9_29_PRUOUT >; };
+ P9_29_pruin_pin: pinmux_P9_29_pruin_pin { pinctrl-single,pins = < P9_29_PRUIN >; };
/* P9_29b (ball D14) gpio7_30 */
/* P9_30 (ball B13) gpio5_12*/
- P9_30_default_pin: pinmux_P9_30_default_pin { pinctrl-single,pins = <
- P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
- P9_30_gpio_pin: pinmux_P9_30_gpio_pin { pinctrl-single,pins = <
- P9_30( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
- P9_30_gpio_pu_pin: pinmux_P9_30_gpio_pu_pin { pinctrl-single,pins = <
- P9_30( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
- P9_30_gpio_pd_pin: pinmux_P9_30_gpio_pd_pin { pinctrl-single,pins = <
- P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
- P9_30_gpio_input_pin: pinmux_P9_30_gpio_input_pin { pinctrl-single,pins = <
- P9_30( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
- P9_30_spi_pin: pinmux_P9_30_spi_pin { pinctrl-single,pins = <
- P9_30( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr10.spi3_d0 */
- P9_30_pruout_pin: pinmux_P9_30_pruout_pin { pinctrl-single,pins = <
- P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr10.pr2_pru1_gpo12 */
- P9_30_pruin_pin: pinmux_P9_30_pruin_pin { pinctrl-single,pins = <
- P9_30( PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr10.pr2_pru1_gpi12 */
+ P9_30_default_pin: pinmux_P9_30_default_pin { pinctrl-single,pins = < P9_30_DEFAULT >; };
+ P9_30_gpio_pin: pinmux_P9_30_gpio_pin { pinctrl-single,pins = < P9_30_GPIO >; };
+ P9_30_gpio_pu_pin: pinmux_P9_30_gpio_pu_pin { pinctrl-single,pins = < P9_30_GPIO_PU >; };
+ P9_30_gpio_pd_pin: pinmux_P9_30_gpio_pd_pin { pinctrl-single,pins = < P9_30_GPIO_PD >; };
+ P9_30_gpio_input_pin: pinmux_P9_30_gpio_input_pin { pinctrl-single,pins = < P9_30_GPIO_INPUT >; };
+ P9_30_spi_pin: pinmux_P9_30_spi_pin { pinctrl-single,pins = < P9_30_SPI >; };
+ P9_30_pruout_pin: pinmux_P9_30_pruout_pin { pinctrl-single,pins = < P9_30_PRUOUT >; };
+ P9_30_pruin_pin: pinmux_P9_30_pruin_pin { pinctrl-single,pins = < P9_30_PRUIN >; };
/* P9_31a (ball B12) gpio5_10 */
- P9_31_default_pin: pinmux_P9_31_default_pin { pinctrl-single,pins = <
- P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
- P9_31_gpio_pin: pinmux_P9_31_gpio_pin { pinctrl-single,pins = <
- P9_31A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
- P9_31_gpio_pu_pin: pinmux_P9_31_gpio_pu_pin { pinctrl-single,pins = <
- P9_31A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
- P9_31_gpio_pd_pin: pinmux_P9_31_gpio_pd_pin { pinctrl-single,pins = <
- P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
- P9_31_gpio_input_pin: pinmux_P9_31_gpio_input_pin { pinctrl-single,pins = <
- P9_31A( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr8.gpio5_10 */
- P9_31_spi_sclk_pin: pinmux_P9_31_spi_sclk_pin { pinctrl-single,pins = <
- P9_31A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr8.spi3_sclk */
- P9_31_pruout_pin: pinmux_P9_31_pruout_pin { pinctrl-single,pins = <
- P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr8.pr2_pru1_gpo10 */
- P9_31_pruin_pin: pinmux_P9_31_pruin_pin { pinctrl-single,pins = <
- P9_31A( PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr8.pr2_pru1_gpi10 */
+ P9_31_default_pin: pinmux_P9_31_default_pin { pinctrl-single,pins = < P9_31_DEFAULT >; };
+ P9_31_gpio_pin: pinmux_P9_31_gpio_pin { pinctrl-single,pins = < P9_31_GPIO >; };
+ P9_31_gpio_pu_pin: pinmux_P9_31_gpio_pu_pin { pinctrl-single,pins = < P9_31_GPIO_PU >; };
+ P9_31_gpio_pd_pin: pinmux_P9_31_gpio_pd_pin { pinctrl-single,pins = < P9_31_GPIO_PD >; };
+ P9_31_gpio_input_pin: pinmux_P9_31_gpio_input_pin { pinctrl-single,pins = < P9_31_GPIO_INPUT >; };
+ P9_31_spi_sclk_pin: pinmux_P9_31_spi_sclk_pin { pinctrl-single,pins = < P9_31_SPI >; };
+ P9_31_pruout_pin: pinmux_P9_31_pruout_pin { pinctrl-single,pins = < P9_31_PRUOUT >; };
+ P9_31_pruin_pin: pinmux_P9_31_pruin_pin { pinctrl-single,pins = < P9_31_PRUIN >; };
/* P9_31b (ball C14) gpio7_31*/
@@ -1092,42 +671,27 @@
/* P9_40 AIN1*/
/* P9_41a (ball C23) gpio6_20 */
- P9_41_default_pin: pinmux_P9_41_default_pin { pinctrl-single,pins = <
- P9_41A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
- P9_41_gpio_pin: pinmux_P9_41_gpio_pin { pinctrl-single,pins = <
- P9_41A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
- P9_41_gpio_pu_pin: pinmux_P9_41_gpio_pu_pin { pinctrl-single,pins = <
- P9_41A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
- P9_41_gpio_pd_pin: pinmux_P9_41_gpio_pd_pin { pinctrl-single,pins = <
- P9_41A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
- P9_41_gpio_input_pin: pinmux_P9_41_gpio_input_pin { pinctrl-single,pins = <
- P9_41A( PIN_INPUT | MUX_MODE14) >; }; /* xref_clk3.gpio6_20 */
+ P9_41_default_pin: pinmux_P9_41_default_pin { pinctrl-single,pins = < P9_41_DEFAULT >; };
+ P9_41_gpio_pin: pinmux_P9_41_gpio_pin { pinctrl-single,pins = < P9_41_GPIO >; };
+ P9_41_gpio_pu_pin: pinmux_P9_41_gpio_pu_pin { pinctrl-single,pins = < P9_41_GPIO_PU >; };
+ P9_41_gpio_pd_pin: pinmux_P9_41_gpio_pd_pin { pinctrl-single,pins = < P9_41_GPIO_PD >; };
+ P9_41_gpio_input_pin: pinmux_P9_41_gpio_input_pin { pinctrl-single,pins = < P9_41_GPIO_INPUT >; };
/* P9_41b (ball C1) gpio4_7 */
- P9_41_pruout_pin: pinmux_P9_41_pruout_pin { pinctrl-single,pins = <
- P9_41B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d6.pr1_pru1_gpo3 */
- P9_41_pruin_pin: pinmux_P9_41_pruin_pin { pinctrl-single,pins = <
- P9_41B( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d6.pr1_pru1_gpi3 */
+ P9_41_pruout_pin: pinmux_P9_41_pruout_pin { pinctrl-single,pins = < P9_41_PRUOUT >; };
+ P9_41_pruin_pin: pinmux_P9_41_pruin_pin { pinctrl-single,pins = < P9_41_PRUIN >; };
/* P9_42a (ball E14) gpio4_18 */
- P9_42_default_pin: pinmux_P9_42_default_pin { pinctrl-single,pins = <
- P9_42A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
- P9_42_gpio_pin: pinmux_P9_42_gpio_pin { pinctrl-single,pins = <
- P9_42A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
- P9_42_gpio_pu_pin: pinmux_P9_42_gpio_pu_pin { pinctrl-single,pins = <
- P9_42A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
- P9_42_gpio_pd_pin: pinmux_P9_42_gpio_pd_pin { pinctrl-single,pins = <
- P9_42A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
- P9_42_gpio_input_pin: pinmux_P9_42_gpio_input_pin { pinctrl-single,pins = <
- P9_42A( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr12.gpio4_18 */
- P9_42_spi_cs_pin: pinmux_P9_42_spi_cs_pin { pinctrl-single,pins = <
- P9_42A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr12.spi3_cs1 */
+ P9_42_default_pin: pinmux_P9_42_default_pin { pinctrl-single,pins = < P9_42_DEFAULT >; };
+ P9_42_gpio_pin: pinmux_P9_42_gpio_pin { pinctrl-single,pins = < P9_42_GPIO >; };
+ P9_42_gpio_pu_pin: pinmux_P9_42_gpio_pu_pin { pinctrl-single,pins = < P9_42_GPIO_PU >; };
+ P9_42_gpio_pd_pin: pinmux_P9_42_gpio_pd_pin { pinctrl-single,pins = < P9_42_GPIO_PD >; };
+ P9_42_gpio_input_pin: pinmux_P9_42_gpio_input_pin { pinctrl-single,pins = < P9_42_GPIO_INPUT >; };
+ P9_42_spi_cs_pin: pinmux_P9_42_spi_cs_pin { pinctrl-single,pins = < P9_42_SPI >; };
/* P9_42b (ball C2) gpio4_14*/
- P9_42_pruout_pin: pinmux_P9_42_pruout_pin { pinctrl-single,pins = <
- P9_42B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d13.pr1_pru1_gpo10 */
- P9_42_pruin_pin: pinmux_P9_42_pruin_pin { pinctrl-single,pins = <
- P9_42B( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d13.pr1_pru1_gpi10 */
+ P9_42_pruout_pin: pinmux_P9_42_pruout_pin { pinctrl-single,pins = < P9_42_PRUOUT >; };
+ P9_42_pruin_pin: pinmux_P9_42_pruin_pin { pinctrl-single,pins = < P9_42_PRUIN >; };
/* P9_43 GND */
--
GitLab
From ba85595d211517d683ff021226c66899b59a25ca Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Sat, 11 Jul 2020 17:01:50 +0530
Subject: [PATCH 26/86] fix tabs
---
src/arm/am572x-bone-common-univ.dtsi | 903 ++++++++++++++-------------
1 file changed, 457 insertions(+), 446 deletions(-)
diff --git a/src/arm/am572x-bone-common-univ.dtsi b/src/arm/am572x-bone-common-univ.dtsi
index 105568e4..74d97770 100644
--- a/src/arm/am572x-bone-common-univ.dtsi
+++ b/src/arm/am572x-bone-common-univ.dtsi
@@ -19,395 +19,395 @@
/* P8_03 (ball AB8) gpio1_24 */
- P8_03_default_pin: pinmux_P8_03_default_pin { pinctrl-single,pins = < P8_03_DEFAULT >; };
- P8_03_gpio_pin: pinmux_P8_03_gpio_pin { pinctrl-single,pins = < P8_03_GPIO >; };
- P8_03_gpio_pu_pin: pinmux_P8_03_gpio_pu_pin { pinctrl-single,pins = < P8_03_GPIO_PU >; };
- P8_03_gpio_pd_pin: pinmux_P8_03_gpio_pd_pin { pinctrl-single,pins = < P8_03_GPIO_PD >; };
- P8_03_gpio_input_pin: pinmux_P8_03_gpio_input_pin { pinctrl-single,pins = < P8_03_GPIO_INPUT >; };
+ P8_03_default_pin: pinmux_P8_03_default_pin { pinctrl-single,pins = < P8_03_DEFAULT >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03_gpio_pin: pinmux_P8_03_gpio_pin { pinctrl-single,pins = < P8_03_GPIO >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03_gpio_pu_pin: pinmux_P8_03_gpio_pu_pin { pinctrl-single,pins = < P8_03_GPIO_PU >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03_gpio_pd_pin: pinmux_P8_03_gpio_pd_pin { pinctrl-single,pins = < P8_03_GPIO_PD >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03_gpio_input_pin: pinmux_P8_03_gpio_input_pin { pinctrl-single,pins = < P8_03_GPIO_INPUT >; }; /* mmc3_dat6.gpio1_24 */
/* P8_04 (ball AB5) gpio1_25 */
- P8_04_default_pin: pinmux_P8_04_default_pin { pinctrl-single,pins = < P8_04_DEFAULT >; };
- P8_04_gpio_pin: pinmux_P8_04_gpio_pin { pinctrl-single,pins = < P8_04_GPIO >; };
- P8_04_gpio_pu_pin: pinmux_P8_04_gpio_pu_pin { pinctrl-single,pins = < P8_04_GPIO_PU >; };
- P8_04_gpio_pd_pin: pinmux_P8_04_gpio_pd_pin { pinctrl-single,pins = < P8_04_GPIO_PD >; };
- P8_04_gpio_input_pin: pinmux_P8_04_gpio_input_pin { pinctrl-single,pins = < P8_04_GPIO_INPUT >; };
+ P8_04_default_pin: pinmux_P8_04_default_pin { pinctrl-single,pins = < P8_04_DEFAULT >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04_gpio_pin: pinmux_P8_04_gpio_pin { pinctrl-single,pins = < P8_04_GPIO >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04_gpio_pu_pin: pinmux_P8_04_gpio_pu_pin { pinctrl-single,pins = < P8_04_GPIO_PU >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04_gpio_pd_pin: pinmux_P8_04_gpio_pd_pin { pinctrl-single,pins = < P8_04_GPIO_PD >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04_gpio_input_pin: pinmux_P8_04_gpio_input_pin { pinctrl-single,pins = < P8_04_GPIO_INPUT >; }; /* mmc3_dat7.gpio1_25 */
/* P8_05 (ball AC9) gpio7_1 */
- P8_05_default_pin: pinmux_P8_05_default_pin { pinctrl-single,pins = < P8_05_DEFAULT >; };
- P8_05_gpio_pin: pinmux_P8_05_gpio_pin { pinctrl-single,pins = < P8_05_GPIO >; };
- P8_05_gpio_pu_pin: pinmux_P8_05_gpio_pu_pin { pinctrl-single,pins = < P8_05_GPIO_PU >; };
- P8_05_gpio_pd_pin: pinmux_P8_05_gpio_pd_pin { pinctrl-single,pins = < P8_05_GPIO_PD >; };
- P8_05_gpio_input_pin: pinmux_P8_05_gpio_input_pin { pinctrl-single,pins = < P8_05_GPIO_INPUT >; };
+ P8_05_default_pin: pinmux_P8_05_default_pin { pinctrl-single,pins = < P8_05_DEFAULT >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05_gpio_pin: pinmux_P8_05_gpio_pin { pinctrl-single,pins = < P8_05_GPIO >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05_gpio_pu_pin: pinmux_P8_05_gpio_pu_pin { pinctrl-single,pins = < P8_05_GPIO_PU >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05_gpio_pd_pin: pinmux_P8_05_gpio_pd_pin { pinctrl-single,pins = < P8_05_GPIO_PD >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05_gpio_input_pin: pinmux_P8_05_gpio_input_pin { pinctrl-single,pins = < P8_05_GPIO_INPUT >; }; /* mmc3_dat2.gpio7_1 */
/* P8_06 (ball AC3) gpio7_2 */
- P8_06_default_pin: pinmux_P8_06_default_pin { pinctrl-single,pins = < P8_06_DEFAULT >; };
- P8_06_gpio_pin: pinmux_P8_06_gpio_pin { pinctrl-single,pins = < P8_06_GPIO >; };
- P8_06_gpio_pu_pin: pinmux_P8_06_gpio_pu_pin { pinctrl-single,pins = < P8_06_GPIO_PU >; };
- P8_06_gpio_pd_pin: pinmux_P8_06_gpio_pd_pin { pinctrl-single,pins = < P8_06_GPIO_PD >; };
- P8_06_gpio_input_pin: pinmux_P8_06_gpio_input_pin { pinctrl-single,pins = < P8_06_GPIO_INPUT >; };
+ P8_06_default_pin: pinmux_P8_06_default_pin { pinctrl-single,pins = < P8_06_DEFAULT >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06_gpio_pin: pinmux_P8_06_gpio_pin { pinctrl-single,pins = < P8_06_GPIO >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06_gpio_pu_pin: pinmux_P8_06_gpio_pu_pin { pinctrl-single,pins = < P8_06_GPIO_PU >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06_gpio_pd_pin: pinmux_P8_06_gpio_pd_pin { pinctrl-single,pins = < P8_06_GPIO_PD >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06_gpio_input_pin: pinmux_P8_06_gpio_input_pin { pinctrl-single,pins = < P8_06_GPIO_INPUT >; }; /* mmc3_dat3.gpio7_2 */
/* P8_07 (ball G14) gpio6_5*/
- P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = < P8_07_DEFAULT >; };
- P8_07_gpio_pin: pinmux_P8_07_gpio_pin { pinctrl-single,pins = < P8_07_GPIO >; };
- P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin { pinctrl-single,pins = < P8_07_GPIO_PU >; };
- P8_07_gpio_pd_pin: pinmux_P8_07_gpio_pd_pin { pinctrl-single,pins = < P8_07_GPIO_PD >; };
- P8_07_gpio_input_pin: pinmux_P8_07_gpio_input_pin { pinctrl-single,pins = < P8_07_GPIO_INPUT >; };
- P8_07_timer_pin: pinmux_P8_07_timer_pin { pinctrl-single,pins = < P8_07_TIMER >; };
+ P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = < P8_07_DEFAULT >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07_gpio_pin: pinmux_P8_07_gpio_pin { pinctrl-single,pins = < P8_07_GPIO >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin { pinctrl-single,pins = < P8_07_GPIO_PU >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07_gpio_pd_pin: pinmux_P8_07_gpio_pd_pin { pinctrl-single,pins = < P8_07_GPIO_PD >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07_gpio_input_pin: pinmux_P8_07_gpio_input_pin { pinctrl-single,pins = < P8_07_GPIO_INPUT >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07_timer_pin: pinmux_P8_07_timer_pin { pinctrl-single,pins = < P8_07_TIMER >; }; /* mcasp1_axr14.timer11 */
/* P8_08 (ball F14) gpio6_6 */
- P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = < P8_08_DEFAULT >; };
- P8_08_gpio_pin: pinmux_P8_08_gpio_pin { pinctrl-single,pins = < P8_08_GPIO >; };
- P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin { pinctrl-single,pins = < P8_08_GPIO_PU >; };
- P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin { pinctrl-single,pins = < P8_08_GPIO_PD >; };
- P8_08_gpio_input_pin: pinmux_P8_08_gpio_input_pin { pinctrl-single,pins = < P8_08_GPIO_INPUT >; };
- P8_08_timer_pin: pinmux_P8_08_timer_pin { pinctrl-single,pins = < P8_08_TIMER >; };
+ P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = < P8_08_DEFAULT >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08_gpio_pin: pinmux_P8_08_gpio_pin { pinctrl-single,pins = < P8_08_GPIO >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin { pinctrl-single,pins = < P8_08_GPIO_PU >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin { pinctrl-single,pins = < P8_08_GPIO_PD >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08_gpio_input_pin: pinmux_P8_08_gpio_input_pin { pinctrl-single,pins = < P8_08_GPIO_INPUT >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08_timer_pin: pinmux_P8_08_timer_pin { pinctrl-single,pins = < P8_08_TIMER >; }; /* mcasp1_axr15.timer12 */
/* P8_09 (ball E17) gpio6_18 */
- P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = < P8_09_DEFAULT >; };
- P8_09_gpio_pin: pinmux_P8_09_gpio_pin { pinctrl-single,pins = < P8_09_GPIO >; };
- P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin { pinctrl-single,pins = < P8_09_GPIO_PU >; };
- P8_09_gpio_pd_pin: pinmux_P8_09_gpio_pd_pin { pinctrl-single,pins = < P8_09_GPIO_PD >; };
- P8_09_gpio_input_pin: pinmux_P8_09_gpio_input_pin { pinctrl-single,pins = < P8_09_GPIO_INPUT >; };
- P8_09_timer_pin: pinmux_P8_09_timer_pin { pinctrl-single,pins = < P8_09_TIMER >; };
+ P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = < P8_09_DEFAULT >; }; /* xref_clk1.gpio6_18 */
+ P8_09_gpio_pin: pinmux_P8_09_gpio_pin { pinctrl-single,pins = < P8_09_GPIO >; }; /* xref_clk1.gpio6_18 */
+ P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin { pinctrl-single,pins = < P8_09_GPIO_PU >; }; /* xref_clk1.gpio6_18 */
+ P8_09_gpio_pd_pin: pinmux_P8_09_gpio_pd_pin { pinctrl-single,pins = < P8_09_GPIO_PD >; }; /* xref_clk1.gpio6_18 */
+ P8_09_gpio_input_pin: pinmux_P8_09_gpio_input_pin { pinctrl-single,pins = < P8_09_GPIO_INPUT >; }; /* xref_clk1.gpio6_18 */
+ P8_09_timer_pin: pinmux_P8_09_timer_pin { pinctrl-single,pins = < P8_09_TIMER >; }; /* xref_clk1.timer14 */
/* P8_10 (ball A13) gpio6_4 */
- P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = < P8_10_DEFAULT >; };
- P8_10_gpio_pin: pinmux_P8_10_gpio_pin { pinctrl-single,pins = < P8_10_GPIO >; };
- P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin { pinctrl-single,pins = < P8_10_GPIO_PU >; };
- P8_10_gpio_pd_pin: pinmux_P8_10_gpio_pd_pin { pinctrl-single,pins = < P8_10_GPIO_PD >; };
- P8_10_gpio_input_pin: pinmux_P8_10_gpio_input_pin { pinctrl-single,pins = < P8_10_GPIO_INPUT >; };
- P8_10_timer_pin: pinmux_P8_10_timer_pin { pinctrl-single,pins = < P8_10_TIMER >; };
+ P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = < P8_10_DEFAULT >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10_gpio_pin: pinmux_P8_10_gpio_pin { pinctrl-single,pins = < P8_10_GPIO >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin { pinctrl-single,pins = < P8_10_GPIO_PU >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10_gpio_pd_pin: pinmux_P8_10_gpio_pd_pin { pinctrl-single,pins = < P8_10_GPIO_PD >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10_gpio_input_pin: pinmux_P8_10_gpio_input_pin { pinctrl-single,pins = < P8_10_GPIO_INPUT >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10_timer_pin: pinmux_P8_10_timer_pin { pinctrl-single,pins = < P8_10_TIMER >; }; /* mcasp1_axr13.timer10 */
/* P8_11 (ball AH4) gpio3_11 */
- P8_11_default_pin: pinmux_P8_11_default_pin { pinctrl-single,pins = < P8_11_DEFAULT >; };
- P8_11_gpio_pin: pinmux_P8_11_gpio_pin { pinctrl-single,pins = < P8_11_GPIO >; };
- P8_11_gpio_pu_pin: pinmux_P8_11_gpio_pu_pin { pinctrl-single,pins = < P8_11_GPIO_PU >; };
- P8_11_gpio_pd_pin: pinmux_P8_11_gpio_pd_pin { pinctrl-single,pins = < P8_11_GPIO_PD >; };
- P8_11_gpio_input_pin: pinmux_P8_11_gpio_input_pin { pinctrl-single,pins = < P8_11_GPIO_INPUT >; };
- P8_11_qep_pin: pinmux_P8_11_qep_pin { pinctrl-single,pins = < P8_11_QEP >; };
- P8_11_pruout_pin: pinmux_P8_11_pruout_pin { pinctrl-single,pins = < P8_11_PRUOUT >; };
+ P8_11_default_pin: pinmux_P8_11_default_pin { pinctrl-single,pins = < P8_11_DEFAULT >; }; /* vin1a_d7.gpio3_11 */
+ P8_11_gpio_pin: pinmux_P8_11_gpio_pin { pinctrl-single,pins = < P8_11_GPIO >; }; /* vin1a_d7.gpio3_11 */
+ P8_11_gpio_pu_pin: pinmux_P8_11_gpio_pu_pin { pinctrl-single,pins = < P8_11_GPIO_PU >; }; /* vin1a_d7.gpio3_11 */
+ P8_11_gpio_pd_pin: pinmux_P8_11_gpio_pd_pin { pinctrl-single,pins = < P8_11_GPIO_PD >; }; /* vin1a_d7.gpio3_11 */
+ P8_11_gpio_input_pin: pinmux_P8_11_gpio_input_pin { pinctrl-single,pins = < P8_11_GPIO_INPUT >; }; /* vin1a_d7.gpio3_11 */
+ P8_11_qep_pin: pinmux_P8_11_qep_pin { pinctrl-single,pins = < P8_11_QEP >; }; /* vin1a_d7.eQEP2B_in */
+ P8_11_pruout_pin: pinmux_P8_11_pruout_pin { pinctrl-single,pins = < P8_11_PRUOUT >; }; /* vin1a_d7.pr1_pru0_gpo4 */
/* P8_12 (ball AG6) gpio3_10 */
- P8_12_default_pin: pinmux_P8_12_default_pin { pinctrl-single,pins = < P8_12_DEFAULT >; };
- P8_12_gpio_pin: pinmux_P8_12_gpio_pin { pinctrl-single,pins = < P8_12_GPIO >; };
- P8_12_gpio_pu_pin: pinmux_P8_12_gpio_pu_pin { pinctrl-single,pins = < P8_12_GPIO_PU >; };
- P8_12_gpio_pd_pin: pinmux_P8_12_gpio_pd_pin { pinctrl-single,pins = < P8_12_GPIO_PD >; };
- P8_12_gpio_input_pin: pinmux_P8_12_gpio_input_pin { pinctrl-single,pins = < P8_12_GPIO_INPUT >; };
- P8_12_qep_pin: pinmux_P8_12_qep_pin { pinctrl-single,pins = < P8_12_QEP >; };
- P8_12_pruout_pin: pinmux_P8_12_pruout_pin { pinctrl-single,pins = < P8_12_TIMER >; };
+ P8_12_default_pin: pinmux_P8_12_default_pin { pinctrl-single,pins = < P8_12_DEFAULT >; }; /* vin1a_d6.gpio3_10 */
+ P8_12_gpio_pin: pinmux_P8_12_gpio_pin { pinctrl-single,pins = < P8_12_GPIO >; }; /* vin1a_d6.gpio3_10 */
+ P8_12_gpio_pu_pin: pinmux_P8_12_gpio_pu_pin { pinctrl-single,pins = < P8_12_GPIO_PU >; }; /* vin1a_d6.gpio3_10 */
+ P8_12_gpio_pd_pin: pinmux_P8_12_gpio_pd_pin { pinctrl-single,pins = < P8_12_GPIO_PD >; }; /* vin1a_d6.gpio3_10 */
+ P8_12_gpio_input_pin: pinmux_P8_12_gpio_input_pin { pinctrl-single,pins = < P8_12_GPIO_INPUT >; }; /* vin1a_d6.gpio3_10 */
+ P8_12_qep_pin: pinmux_P8_12_qep_pin { pinctrl-single,pins = < P8_12_QEP >; }; /* vin1a_d6.eQEP2A_in */
+ P8_12_pruout_pin: pinmux_P8_12_pruout_pin { pinctrl-single,pins = < P8_12_PRUOUT >; }; /* vin1a_d6.pr1_pru0_gpo3 */
/* P8_13 (ball D3) gpio4_11 */
- P8_13_default_pin: pinmux_P8_13_default_pin { pinctrl-single,pins = < P8_13_DEFAULT >; };
- P8_13_gpio_pin: pinmux_P8_13_gpio_pin { pinctrl-single,pins = < P8_13_GPIO >; };
- P8_13_gpio_pu_pin: pinmux_P8_13_gpio_pu_pin { pinctrl-single,pins = < P8_13_GPIO_PU >; };
- P8_13_gpio_pd_pin: pinmux_P8_13_gpio_pd_pin { pinctrl-single,pins = < P8_13_GPIO_PD >; };
- P8_13_gpio_input_pin: pinmux_P8_13_gpio_input_pin { pinctrl-single,pins = < P8_13_GPIO_INPUT >; };
- P8_13_pwm_pin: pinmux_P8_13_pwm_pin { pinctrl-single,pins = < P8_13_PWM >; };
+ P8_13_default_pin: pinmux_P8_13_default_pin { pinctrl-single,pins = < P8_13_DEFAULT >; }; /* vin2a_d10.gpio4_11 */
+ P8_13_gpio_pin: pinmux_P8_13_gpio_pin { pinctrl-single,pins = < P8_13_GPIO >; }; /* vin2a_d10.gpio4_11 */
+ P8_13_gpio_pu_pin: pinmux_P8_13_gpio_pu_pin { pinctrl-single,pins = < P8_13_GPIO_PU >; }; /* vin2a_d10.gpio4_11 */
+ P8_13_gpio_pd_pin: pinmux_P8_13_gpio_pd_pin { pinctrl-single,pins = < P8_13_GPIO_PD >; }; /* vin2a_d10.gpio4_11 */
+ P8_13_gpio_input_pin: pinmux_P8_13_gpio_input_pin { pinctrl-single,pins = < P8_13_GPIO_INPUT >; }; /* vin2a_d10.gpio4_11 */
+ P8_13_pwm_pin: pinmux_P8_13_pwm_pin { pinctrl-single,pins = < P8_13_PWM >; }; /* vin2a_d10.ehrpwm2B */
/* P8_14 (ball D5) gpio4_13*/
- P8_14_default_pin: pinmux_P8_14_default_pin { pinctrl-single,pins = < P8_14_DEFAULT >; };
- P8_14_gpio_pin: pinmux_P8_14_gpio_pin { pinctrl-single,pins = < P8_14_GPIO >; };
- P8_14_gpio_pu_pin: pinmux_P8_14_gpio_pu_pin { pinctrl-single,pins = < P8_14_GPIO_PU >; };
- P8_14_gpio_pd_pin: pinmux_P8_14_gpio_pd_pin { pinctrl-single,pins = < P8_14_GPIO_PD >; };
- P8_14_gpio_input_pin: pinmux_P8_14_gpio_input_pin { pinctrl-single,pins = < P8_14_GPIO_INPUT >; };
- P8_14_pwm_pin: pinmux_P8_14_pwm_pin { pinctrl-single,pins = < P8_14_PWM >; };
+ P8_14_default_pin: pinmux_P8_14_default_pin { pinctrl-single,pins = < P8_14_DEFAULT >; }; /* vin2a_d12.gpio4_13 */
+ P8_14_gpio_pin: pinmux_P8_14_gpio_pin { pinctrl-single,pins = < P8_14_GPIO >; }; /* vin2a_d12.gpio4_13 */
+ P8_14_gpio_pu_pin: pinmux_P8_14_gpio_pu_pin { pinctrl-single,pins = < P8_14_GPIO_PU >; }; /* vin2a_d12.gpio4_13 */
+ P8_14_gpio_pd_pin: pinmux_P8_14_gpio_pd_pin { pinctrl-single,pins = < P8_14_GPIO_PD >; }; /* vin2a_d12.gpio4_13 */
+ P8_14_gpio_input_pin: pinmux_P8_14_gpio_input_pin { pinctrl-single,pins = < P8_14_GPIO_INPUT >; }; /* vin2a_d12.gpio4_13 */
+ P8_14_pwm_pin: pinmux_P8_14_pwm_pin { pinctrl-single,pins = < P8_14_PWM >; }; /* vin2a_d12.eCAP2_in_PWM2_out */
/* P8_15a (ball D1) gpio4_3*/
- P8_15_default_pin: pinmux_P8_15_default_pin { pinctrl-single,pins = < P8_15_DEFAULT >; };
- P8_15_gpio_pin: pinmux_P8_15_gpio_pin { pinctrl-single,pins = < P8_15_GPIO >; };
- P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin { pinctrl-single,pins = < P8_15_GPIO_PU >; };
- P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin { pinctrl-single,pins = < P8_15_GPIO_PD >; };
- P8_15_gpio_input_pin: pinmux_P8_15_gpio_input_pin { pinctrl-single,pins = < P8_15_GPIO_INPUT >; };
- P8_15_pru_ecap_pin: pinmux_P8_15_pru_ecap_pin { pinctrl-single,pins = < P8_15_PRU_ECAP >; };
+ P8_15_default_pin: pinmux_P8_15_default_pin { pinctrl-single,pins = < P8_15_DEFAULT >; }; /* vin2a_d2.gpio4_3, vin2a_d19.off */
+ P8_15_gpio_pin: pinmux_P8_15_gpio_pin { pinctrl-single,pins = < P8_15_GPIO >; }; /* vin2a_d2.gpio4_3, vin2a_d19.off */
+ P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin { pinctrl-single,pins = < P8_15_GPIO_PU >; }; /* vin2a_d2.gpio4_3, vin2a_d19.off */
+ P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin { pinctrl-single,pins = < P8_15_GPIO_PD >; }; /* vin2a_d2.gpio4_3, vin2a_d19.off */
+ P8_15_gpio_input_pin: pinmux_P8_15_gpio_input_pin { pinctrl-single,pins = < P8_15_GPIO_INPUT >; }; /* vin2a_d2.gpio4_3, vin2a_d19.off */
+ P8_15_pru_ecap_pin: pinmux_P8_15_pru_ecap_pin { pinctrl-single,pins = < P8_15_PRU_ECAP >; }; /* vin2a_d2.pr1_ecap0_ecap_capin_apwm_o, vin2a_d19.off */
/* P8_15b (ball A3) gpio4_27 */
- P8_15_pruin_pin: pinmux_P8_15_pruin_pin { pinctrl-single,pins = < P8_15_PRUIN >; };
+ P8_15_pruin_pin: pinmux_P8_15_pruin_pin { pinctrl-single,pins = < P8_15_PRUIN >; }; /* vin2a_d19.pr1_pru1_gpi16, vin2a_d2.off */
/* P8_16 (ball B4) gpio4_29 */
- P8_16_default_pin: pinmux_P8_16_default_pin { pinctrl-single,pins = < P8_16_DEFAULT >; };
- P8_16_gpio_pin: pinmux_P8_16_gpio_pin { pinctrl-single,pins = < P8_16_GPIO >; };
- P8_16_gpio_pu_pin: pinmux_P8_16_gpio_pu_pin { pinctrl-single,pins = < P8_16_GPIO_PU >; };
- P8_16_gpio_pd_pin: pinmux_P8_16_gpio_pd_pin { pinctrl-single,pins = < P8_16_GPIO_PD >; };
- P8_16_gpio_input_pin: pinmux_P8_16_gpio_input_pin { pinctrl-single,pins = < P8_16_GPIO_INPUT >; };
- P8_16_pruin_pin: pinmux_P8_16_pruin_pin { pinctrl-single,pins = < P8_16_PRUIN >; };
+ P8_16_default_pin: pinmux_P8_16_default_pin { pinctrl-single,pins = < P8_16_DEFAULT >; }; /* vin2a_d21.gpio4_29 */
+ P8_16_gpio_pin: pinmux_P8_16_gpio_pin { pinctrl-single,pins = < P8_16_GPIO >; }; /* vin2a_d21.gpio4_29 */
+ P8_16_gpio_pu_pin: pinmux_P8_16_gpio_pu_pin { pinctrl-single,pins = < P8_16_GPIO_PU >; }; /* vin2a_d21.gpio4_29 */
+ P8_16_gpio_pd_pin: pinmux_P8_16_gpio_pd_pin { pinctrl-single,pins = < P8_16_GPIO_PD >; }; /* vin2a_d21.gpio4_29 */
+ P8_16_gpio_input_pin: pinmux_P8_16_gpio_input_pin { pinctrl-single,pins = < P8_16_GPIO_INPUT >; }; /* vin2a_d21.gpio4_29 */
+ P8_16_pruin_pin: pinmux_P8_16_pruin_pin { pinctrl-single,pins = < P8_16_PRUIN >; }; /* vin2a_d21.pr1_pru1_gpi18 */
/* P8_17 (ball A7) gpio8_18 */
- P8_17_default_pin: pinmux_P8_17_default_pin { pinctrl-single,pins = < P8_17_DEFAULT >; };
- P8_17_gpio_pin: pinmux_P8_17_gpio_pin { pinctrl-single,pins = < P8_17_GPIO >; };
- P8_17_gpio_pu_pin: pinmux_P8_17_gpio_pu_pin { pinctrl-single,pins = < P8_17_GPIO_PU >; };
- P8_17_gpio_pd_pin: pinmux_P8_17_gpio_pd_pin { pinctrl-single,pins = < P8_17_GPIO_PD >; };
- P8_17_gpio_input_pin: pinmux_P8_17_gpio_input_pin { pinctrl-single,pins = < P8_17_GPIO_INPUT >; };
+ P8_17_default_pin: pinmux_P8_17_default_pin { pinctrl-single,pins = < P8_17_DEFAULT >; }; /* vout1_d18.gpio8_18 */
+ P8_17_gpio_pin: pinmux_P8_17_gpio_pin { pinctrl-single,pins = < P8_17_GPIO >; }; /* vout1_d18.gpio8_18 */
+ P8_17_gpio_pu_pin: pinmux_P8_17_gpio_pu_pin { pinctrl-single,pins = < P8_17_GPIO_PU >; }; /* vout1_d18.gpio8_18 */
+ P8_17_gpio_pd_pin: pinmux_P8_17_gpio_pd_pin { pinctrl-single,pins = < P8_17_GPIO_PD >; }; /* vout1_d18.gpio8_18 */
+ P8_17_gpio_input_pin: pinmux_P8_17_gpio_input_pin { pinctrl-single,pins = < P8_17_GPIO_INPUT >; }; /* vout1_d18.gpio8_18 */
/* P8_18 (ball F5) gpio4_9 */
- P8_18_default_pin: pinmux_P8_18_default_pin { pinctrl-single,pins = < P8_18_DEFAULT >; };
- P8_18_gpio_pin: pinmux_P8_18_gpio_pin { pinctrl-single,pins = < P8_18_GPIO >; };
- P8_18_gpio_pu_pin: pinmux_P8_18_gpio_pu_pin { pinctrl-single,pins = < P8_18_GPIO_PU >; };
- P8_18_gpio_pd_pin: pinmux_P8_18_gpio_pd_pin { pinctrl-single,pins = < P8_18_GPIO_PD >; };
- P8_18_gpio_input_pin: pinmux_P8_18_gpio_input_pin { pinctrl-single,pins = < P8_18_GPIO_INPUT >; };
- P8_18_qep_pin: pinmux_P8_18_qep_pin { pinctrl-single,pins = < P8_18_QEP >; };
+ P8_18_default_pin: pinmux_P8_18_default_pin { pinctrl-single,pins = < P8_18_DEFAULT >; }; /* vin2a_d8.gpio4_9 */
+ P8_18_gpio_pin: pinmux_P8_18_gpio_pin { pinctrl-single,pins = < P8_18_GPIO >; }; /* vin2a_d8.gpio4_9 */
+ P8_18_gpio_pu_pin: pinmux_P8_18_gpio_pu_pin { pinctrl-single,pins = < P8_18_GPIO_PU >; }; /* vin2a_d8.gpio4_9 */
+ P8_18_gpio_pd_pin: pinmux_P8_18_gpio_pd_pin { pinctrl-single,pins = < P8_18_GPIO_PD >; }; /* vin2a_d8.gpio4_9 */
+ P8_18_gpio_input_pin: pinmux_P8_18_gpio_input_pin { pinctrl-single,pins = < P8_18_GPIO_INPUT >; }; /* vin2a_d8.gpio4_9 */
+ P8_18_qep_pin: pinmux_P8_18_qep_pin { pinctrl-single,pins = < P8_18_QEP >; }; /* vin2a_d8.eQEP2_strobe */
/* P8_19 (ball E6) gpio4_10 */
- P8_19_default_pin: pinmux_P8_19_default_pin { pinctrl-single,pins = < P8_19_DEFAULT >; };
- P8_19_gpio_pin: pinmux_P8_19_gpio_pin { pinctrl-single,pins = < P8_19_GPIO >; };
- P8_19_gpio_pu_pin: pinmux_P8_19_gpio_pu_pin { pinctrl-single,pins = < P8_19_GPIO_PU >; };
- P8_19_gpio_pd_pin: pinmux_P8_19_gpio_pd_pin { pinctrl-single,pins = < P8_19_GPIO_PD >; };
- P8_19_gpio_input_pin: pinmux_P8_19_gpio_input_pin { pinctrl-single,pins = < P8_19_GPIO_INPUT >; };
- P8_19_pwm_pin: pinmux_P8_19_pwm_pin { pinctrl-single,pins = < P8_19_PWM >; };
+ P8_19_default_pin: pinmux_P8_19_default_pin { pinctrl-single,pins = < P8_19_DEFAULT >; }; /* vin2a_d9.gpio4_10 */
+ P8_19_gpio_pin: pinmux_P8_19_gpio_pin { pinctrl-single,pins = < P8_19_GPIO >; }; /* vin2a_d9.gpio4_10 */
+ P8_19_gpio_pu_pin: pinmux_P8_19_gpio_pu_pin { pinctrl-single,pins = < P8_19_GPIO_PU >; }; /* vin2a_d9.gpio4_10 */
+ P8_19_gpio_pd_pin: pinmux_P8_19_gpio_pd_pin { pinctrl-single,pins = < P8_19_GPIO_PD >; }; /* vin2a_d9.gpio4_10 */
+ P8_19_gpio_input_pin: pinmux_P8_19_gpio_input_pin { pinctrl-single,pins = < P8_19_GPIO_INPUT >; }; /* vin2a_d9.gpio4_10 */
+ P8_19_pwm_pin: pinmux_P8_19_pwm_pin { pinctrl-single,pins = < P8_19_PWM >; }; /* vin2a_d9.ehrpwm2A */
/* P8_20 (ball AC4) gpio6_30 */
- P8_20_default_pin: pinmux_P8_20_default_pin { pinctrl-single,pins = < P8_20_DEFAULT >; };
- P8_20_gpio_pin: pinmux_P8_20_gpio_pin { pinctrl-single,pins = < P8_20_GPIO >; };
- P8_20_gpio_pu_pin: pinmux_P8_20_gpio_pu_pin { pinctrl-single,pins = < P8_20_GPIO_PU >; };
- P8_20_gpio_pd_pin: pinmux_P8_20_gpio_pd_pin { pinctrl-single,pins = < P8_20_GPIO_PD >; };
- P8_20_gpio_input_pin: pinmux_P8_20_gpio_input_pin { pinctrl-single,pins = < P8_20_GPIO_INPUT >; };
- P8_20_pruout_pin: pinmux_P8_20_pruout_pin { pinctrl-single,pins = < P8_20_PRUOUT >; };
- P8_20_pruin_pin: pinmux_P8_20_pruin_pin { pinctrl-single,pins = < P8_20_PRUIN >; };
+ P8_20_default_pin: pinmux_P8_20_default_pin { pinctrl-single,pins = < P8_20_DEFAULT >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20_gpio_pin: pinmux_P8_20_gpio_pin { pinctrl-single,pins = < P8_20_GPIO >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20_gpio_pu_pin: pinmux_P8_20_gpio_pu_pin { pinctrl-single,pins = < P8_20_GPIO_PU >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20_gpio_pd_pin: pinmux_P8_20_gpio_pd_pin { pinctrl-single,pins = < P8_20_GPIO_PD >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20_gpio_input_pin: pinmux_P8_20_gpio_input_pin { pinctrl-single,pins = < P8_20_GPIO_INPUT >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20_pruout_pin: pinmux_P8_20_pruout_pin { pinctrl-single,pins = < P8_20_PRUOUT >; }; /* mmc3_cmd.pr2_pru0_gpo3 */
+ P8_20_pruin_pin: pinmux_P8_20_pruin_pin { pinctrl-single,pins = < P8_20_PRUIN >; }; /* mmc3_cmd.pr2_pru0_gpi3 */
/* P8_21 (ball AD4) gpio6_29 */
- P8_21_default_pin: pinmux_P8_21_default_pin { pinctrl-single,pins = < P8_21_DEFAULT >; };
- P8_21_gpio_pin: pinmux_P8_21_gpio_pin { pinctrl-single,pins = < P8_21_GPIO >; };
- P8_21_gpio_pu_pin: pinmux_P8_21_gpio_pu_pin { pinctrl-single,pins = < P8_21_GPIO_PU >; };
- P8_21_gpio_pd_pin: pinmux_P8_21_gpio_pd_pin { pinctrl-single,pins = < P8_21_GPIO_PD >; };
- P8_21_gpio_input_pin: pinmux_P8_21_gpio_input_pin { pinctrl-single,pins = < P8_21_GPIO_INPUT >; };
- P8_21_pruout_pin: pinmux_P8_21_pruout_pin { pinctrl-single,pins = < P8_21_PRUOUT >; };
- P8_21_pruin_pin: pinmux_P8_21_pruin_pin { pinctrl-single,pins = < P8_21_PRUIN >; };
+ P8_21_default_pin: pinmux_P8_21_default_pin { pinctrl-single,pins = < P8_21_DEFAULT >; }; /* mmc3_clk.gpio6_29 */
+ P8_21_gpio_pin: pinmux_P8_21_gpio_pin { pinctrl-single,pins = < P8_21_GPIO >; }; /* mmc3_clk.gpio6_29 */
+ P8_21_gpio_pu_pin: pinmux_P8_21_gpio_pu_pin { pinctrl-single,pins = < P8_21_GPIO_PU >; }; /* mmc3_clk.gpio6_29 */
+ P8_21_gpio_pd_pin: pinmux_P8_21_gpio_pd_pin { pinctrl-single,pins = < P8_21_GPIO_PD >; }; /* mmc3_clk.gpio6_29 */
+ P8_21_gpio_input_pin: pinmux_P8_21_gpio_input_pin { pinctrl-single,pins = < P8_21_GPIO_INPUT >; }; /* mmc3_clk.gpio6_29 */
+ P8_21_pruout_pin: pinmux_P8_21_pruout_pin { pinctrl-single,pins = < P8_21_PRUOUT >; }; /* mmc3_clk.pr2_pru0_gpo2 */
+ P8_21_pruin_pin: pinmux_P8_21_pruin_pin { pinctrl-single,pins = < P8_21_PRUIN >; }; /* mmc3_clk.pr2_pru0_gpi2 */
/* P8_22 (ball AD6) gpio1_23 */
- P8_22_default_pin: pinmux_P8_22_default_pin { pinctrl-single,pins = < P8_22_DEFAULT >; };
- P8_22_gpio_pin: pinmux_P8_22_gpio_pin { pinctrl-single,pins = < P8_22_GPIO >; };
- P8_22_gpio_pu_pin: pinmux_P8_22_gpio_pu_pin { pinctrl-single,pins = < P8_22_GPIO_PU >; };
- P8_22_gpio_pd_pin: pinmux_P8_22_gpio_pd_pin { pinctrl-single,pins = < P8_22_GPIO_PD >; };
- P8_22_gpio_input_pin: pinmux_P8_22_gpio_input_pin { pinctrl-single,pins = < P8_22_GPIO_INPUT >; };
+ P8_22_default_pin: pinmux_P8_22_default_pin { pinctrl-single,pins = < P8_22_DEFAULT >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22_gpio_pin: pinmux_P8_22_gpio_pin { pinctrl-single,pins = < P8_22_GPIO >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22_gpio_pu_pin: pinmux_P8_22_gpio_pu_pin { pinctrl-single,pins = < P8_22_GPIO_PU >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22_gpio_pd_pin: pinmux_P8_22_gpio_pd_pin { pinctrl-single,pins = < P8_22_GPIO_PD >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22_gpio_input_pin: pinmux_P8_22_gpio_input_pin { pinctrl-single,pins = < P8_22_GPIO_INPUT >; }; /* mmc3_dat5.gpio1_23 */
/* P8_23 (ball AC8) gpio1_22 */
- P8_23_default_pin: pinmux_P8_23_default_pin { pinctrl-single,pins = < P8_23_DEFAULT >; };
- P8_23_gpio_pin: pinmux_P8_23_gpio_pin { pinctrl-single,pins = < P8_23_GPIO >; };
- P8_23_gpio_pu_pin: pinmux_P8_23_gpio_pu_pin { pinctrl-single,pins = < P8_23_GPIO_PU >; };
- P8_23_gpio_pd_pin: pinmux_P8_23_gpio_pd_pin { pinctrl-single,pins = < P8_23_GPIO_PD >; };
- P8_23_gpio_input_pin: pinmux_P8_23_gpio_input_pin { pinctrl-single,pins = < P8_23_GPIO_INPUT >; };
+ P8_23_default_pin: pinmux_P8_23_default_pin { pinctrl-single,pins = < P8_23_DEFAULT >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23_gpio_pin: pinmux_P8_23_gpio_pin { pinctrl-single,pins = < P8_23_GPIO >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23_gpio_pu_pin: pinmux_P8_23_gpio_pu_pin { pinctrl-single,pins = < P8_23_GPIO_PU >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23_gpio_pd_pin: pinmux_P8_23_gpio_pd_pin { pinctrl-single,pins = < P8_23_GPIO_PD >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23_gpio_input_pin: pinmux_P8_23_gpio_input_pin { pinctrl-single,pins = < P8_23_GPIO_INPUT >; }; /* mmc3_dat4.gpio1_22 */
/* P8_24 (ball AC6) gpio7_0 */
- P8_24_default_pin: pinmux_P8_24_default_pin { pinctrl-single,pins = < P8_24_DEFAULT >; };
- P8_24_gpio_pin: pinmux_P8_24_gpio_pin { pinctrl-single,pins = < P8_24_GPIO >; };
- P8_24_gpio_pu_pin: pinmux_P8_24_gpio_pu_pin { pinctrl-single,pins = < P8_24_GPIO_PU >; };
- P8_24_gpio_pd_pin: pinmux_P8_24_gpio_pd_pin { pinctrl-single,pins = < P8_24_GPIO_PD >; };
- P8_24_gpio_input_pin: pinmux_P8_24_gpio_input_pin { pinctrl-single,pins = < P8_24_GPIO_INPUT >; };
+ P8_24_default_pin: pinmux_P8_24_default_pin { pinctrl-single,pins = < P8_24_DEFAULT >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24_gpio_pin: pinmux_P8_24_gpio_pin { pinctrl-single,pins = < P8_24_GPIO >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24_gpio_pu_pin: pinmux_P8_24_gpio_pu_pin { pinctrl-single,pins = < P8_24_GPIO_PU >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24_gpio_pd_pin: pinmux_P8_24_gpio_pd_pin { pinctrl-single,pins = < P8_24_GPIO_PD >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24_gpio_input_pin: pinmux_P8_24_gpio_input_pin { pinctrl-single,pins = < P8_24_GPIO_INPUT >; }; /* mmc3_dat1.gpio7_0 */
/* P8_25 (ball AC7) gpio6_31 */
- P8_25_default_pin: pinmux_P8_25_default_pin { pinctrl-single,pins = < P8_25_DEFAULT >; };
- P8_25_gpio_pin: pinmux_P8_25_gpio_pin { pinctrl-single,pins = < P8_25_GPIO >; };
- P8_25_gpio_pu_pin: pinmux_P8_25_gpio_pu_pin { pinctrl-single,pins = < P8_25_GPIO_PU >; };
- P8_25_gpio_pd_pin: pinmux_P8_25_gpio_pd_pin { pinctrl-single,pins = < P8_25_GPIO_PD >; };
- P8_25_gpio_input_pin: pinmux_P8_25_gpio_input_pin { pinctrl-single,pins = < P8_25_GPIO_INPUT >; };
+ P8_25_default_pin: pinmux_P8_25_default_pin { pinctrl-single,pins = < P8_25_DEFAULT >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25_gpio_pin: pinmux_P8_25_gpio_pin { pinctrl-single,pins = < P8_25_GPIO >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25_gpio_pu_pin: pinmux_P8_25_gpio_pu_pin { pinctrl-single,pins = < P8_25_GPIO_PU >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25_gpio_pd_pin: pinmux_P8_25_gpio_pd_pin { pinctrl-single,pins = < P8_25_GPIO_PD >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25_gpio_input_pin: pinmux_P8_25_gpio_input_pin { pinctrl-single,pins = < P8_25_GPIO_INPUT >; }; /* mmc3_dat0.gpio6_31 */
/* P8_26 (ball B3) gpio4_28 */
- P8_26_default_pin: pinmux_P8_26_default_pin { pinctrl-single,pins = < P8_26_DEFAULT >; };
- P8_26_gpio_pin: pinmux_P8_26_gpio_pin { pinctrl-single,pins = < P8_26_GPIO >; };
- P8_26_gpio_pu_pin: pinmux_P8_26_gpio_pu_pin { pinctrl-single,pins = < P8_26_GPIO_PU >; };
- P8_26_gpio_pd_pin: pinmux_P8_26_gpio_pd_pin { pinctrl-single,pins = < P8_26_GPIO_PD >; };
- P8_26_gpio_input_pin: pinmux_P8_26_gpio_input_pin { pinctrl-single,pins = < P8_26_GPIO_INPUT >; };
+ P8_26_default_pin: pinmux_P8_26_default_pin { pinctrl-single,pins = < P8_26_DEFAULT >; }; /* vin2a_d20.gpio4_28 */
+ P8_26_gpio_pin: pinmux_P8_26_gpio_pin { pinctrl-single,pins = < P8_26_GPIO >; }; /* vin2a_d20.gpio4_28 */
+ P8_26_gpio_pu_pin: pinmux_P8_26_gpio_pu_pin { pinctrl-single,pins = < P8_26_GPIO_PU >; }; /* vin2a_d20.gpio4_28 */
+ P8_26_gpio_pd_pin: pinmux_P8_26_gpio_pd_pin { pinctrl-single,pins = < P8_26_GPIO_PD >; }; /* vin2a_d20.gpio4_28 */
+ P8_26_gpio_input_pin: pinmux_P8_26_gpio_input_pin { pinctrl-single,pins = < P8_26_GPIO_INPUT >; }; /* vin2a_d20.gpio4_28 */
/* P8_27a (ball E11) gpio4_23 */
- P8_27_default_pin: pinmux_P8_27_default_pin { pinctrl-single,pins = < P8_27_DEFAULT >; };
- P8_27_gpio_pin: pinmux_P8_27_gpio_pin { pinctrl-single,pins = < P8_27_GPIO >; };
- P8_27_gpio_pu_pin: pinmux_P8_27_gpio_pu_pin { pinctrl-single,pins = < P8_27_GPIO_PU >; };
- P8_27_gpio_pd_pin: pinmux_P8_27_gpio_pd_pin { pinctrl-single,pins = < P8_27_GPIO_PD >; };
- P8_27_gpio_input_pin: pinmux_P8_27_gpio_input_pin { pinctrl-single,pins = < P8_27_GPIO_INPUT >; };
+ P8_27_default_pin: pinmux_P8_27_default_pin { pinctrl-single,pins = < P8_27_DEFAULT >; }; /* vout1_vsync.gpio4_23, vout1_d19.off */
+ P8_27_gpio_pin: pinmux_P8_27_gpio_pin { pinctrl-single,pins = < P8_27_GPIO >; }; /* vout1_vsync.gpio4_23, vout1_d19.off */
+ P8_27_gpio_pu_pin: pinmux_P8_27_gpio_pu_pin { pinctrl-single,pins = < P8_27_GPIO_PU >; }; /* vout1_vsync.gpio4_23, vout1_d19.off */
+ P8_27_gpio_pd_pin: pinmux_P8_27_gpio_pd_pin { pinctrl-single,pins = < P8_27_GPIO_PD >; }; /* vout1_vsync.gpio4_23, vout1_d19.off */
+ P8_27_gpio_input_pin: pinmux_P8_27_gpio_input_pin { pinctrl-single,pins = < P8_27_GPIO_INPUT >; }; /* vout1_vsync.gpio4_23, vout1_d19.off */
/* P8_27b (ball A8) gpio8_19 */
- P8_27_pruout_pin: pinmux_P8_27_pruout_pin { pinctrl-single,pins = < P8_27_PRUOUT >; };
- P8_27_pruin_pin: pinmux_P8_27_pruin_pin { pinctrl-single,pins = < P8_27_PRUIN >; };
+ P8_27_pruout_pin: pinmux_P8_27_pruout_pin { pinctrl-single,pins = < P8_27_PRUOUT >; }; /* vout1_d19.pr2_pru0_gpo16, vout1_vsync.off */
+ P8_27_pruin_pin: pinmux_P8_27_pruin_pin { pinctrl-single,pins = < P8_27_PRUIN >; }; /* vout1_d19.pr2_pru0_gpi16, vout1_vsync.off */
/* P8_28a (ball D11) gpio4_19 */
- P8_28_default_pin: pinmux_P8_28_default_pin { pinctrl-single,pins = < P8_28A_DEFAULT >; };
- P8_28_gpio_pin: pinmux_P8_28_gpio_pin { pinctrl-single,pins = < P8_28A_GPIO >; };
- P8_28_gpio_pu_pin: pinmux_P8_28_gpio_pu_pin { pinctrl-single,pins = < P8_28A_GPIO_PU >; };
- P8_28_gpio_pd_pin: pinmux_P8_28_gpio_pd_pin { pinctrl-single,pins = < P8_28A_GPIO_PD >; };
- P8_28_gpio_input_pin: pinmux_P8_28_gpio_input_pin { pinctrl-single,pins = < P8_28A_GPIO_INPUT >; };
+ P8_28_default_pin: pinmux_P8_28_default_pin { pinctrl-single,pins = < P8_28A_DEFAULT >; }; /* vout1_clk.gpio4_19, vout1_d20.off */
+ P8_28_gpio_pin: pinmux_P8_28_gpio_pin { pinctrl-single,pins = < P8_28A_GPIO >; }; /* vout1_clk.gpio4_19, vout1_d20.off */
+ P8_28_gpio_pu_pin: pinmux_P8_28_gpio_pu_pin { pinctrl-single,pins = < P8_28A_GPIO_PU >; }; /* vout1_clk.gpio4_19, vout1_d20.off */
+ P8_28_gpio_pd_pin: pinmux_P8_28_gpio_pd_pin { pinctrl-single,pins = < P8_28A_GPIO_PD >; }; /* vout1_clk.gpio4_19, vout1_d20.off */
+ P8_28_gpio_input_pin: pinmux_P8_28_gpio_input_pin { pinctrl-single,pins = < P8_28A_GPIO_INPUT >; }; /* vout1_clk.gpio4_19, vout1_d20.off */
/* P8_28b (ball C9) gpio8_20 */
- P8_28_pruout_pin: pinmux_P8_28_pruout_pin { pinctrl-single,pins = < P8_28A_PRUOUT >; };
- P8_28_pruin_pin: pinmux_P8_28_pruin_pin { pinctrl-single,pins = < P8_28A_PRUIN >; };
+ P8_28_pruout_pin: pinmux_P8_28_pruout_pin { pinctrl-single,pins = < P8_28A_PRUOUT >; }; /* vout1_d20.pr2_pru0_gpo17, vout1_clk.off */
+ P8_28_pruin_pin: pinmux_P8_28_pruin_pin { pinctrl-single,pins = < P8_28A_PRUIN >; }; /* vout1_d20.pr2_pru0_gpi17, vout1_clk.off */
/* P8_29a (ball C11) gpio4_22 */
- P8_29_default_pin: pinmux_P8_29_default_pin { pinctrl-single,pins = < P8_29_DEFAULT >; };
- P8_29_gpio_pin: pinmux_P8_29_gpio_pin { pinctrl-single,pins = < P8_29_GPIO >; };
- P8_29_gpio_pu_pin: pinmux_P8_29_gpio_pu_pin { pinctrl-single,pins = < P8_29_GPIO_PU >; };
- P8_29_gpio_pd_pin: pinmux_P8_29_gpio_pd_pin { pinctrl-single,pins = < P8_29_GPIO_PD >; };
- P8_29_gpio_input_pin: pinmux_P8_29_gpio_input_pin { pinctrl-single,pins = < P8_29_GPIO_INPUT >; };
+ P8_29_default_pin: pinmux_P8_29_default_pin { pinctrl-single,pins = < P8_29_DEFAULT >; }; /* vout1_hsync.gpio4_22, vout1_d21.off */
+ P8_29_gpio_pin: pinmux_P8_29_gpio_pin { pinctrl-single,pins = < P8_29_GPIO >; }; /* vout1_hsync.gpio4_22, vout1_d21.off */
+ P8_29_gpio_pu_pin: pinmux_P8_29_gpio_pu_pin { pinctrl-single,pins = < P8_29_GPIO_PU >; }; /* vout1_hsync.gpio4_22, vout1_d21.off */
+ P8_29_gpio_pd_pin: pinmux_P8_29_gpio_pd_pin { pinctrl-single,pins = < P8_29_GPIO_PD >; }; /* vout1_hsync.gpio4_22, vout1_d21.off */
+ P8_29_gpio_input_pin: pinmux_P8_29_gpio_input_pin { pinctrl-single,pins = < P8_29_GPIO_INPUT >; }; /* vout1_hsync.gpio4_22, vout1_d21.off */
/* P8_29b (ball A9) gpio8_21 */
- P8_29_pruout_pin: pinmux_P8_29_pruout_pin { pinctrl-single,pins = < P8_29_PRUOUT >; };
- P8_29_pruin_pin: pinmux_P8_29_pruin_pin { pinctrl-single,pins = < P8_29_PRUIN >; };
+ P8_29_pruout_pin: pinmux_P8_29_pruout_pin { pinctrl-single,pins = < P8_29_PRUOUT >; }; /* vout1_d21.pr2_pru0_gpo18, vout1_hsync.off */
+ P8_29_pruin_pin: pinmux_P8_29_pruin_pin { pinctrl-single,pins = < P8_29_PRUIN >; }; /* vout1_d21.pr2_pru0_gpi18, vout1_hsync.off */
/* P8_30a (ball B10) gpio4_20 */
- P8_30_default_pin: pinmux_P8_30_default_pin { pinctrl-single,pins = < P8_30_DEFAULT >; };
- P8_30_gpio_pin: pinmux_P8_30_gpio_pin { pinctrl-single,pins = < P8_30_GPIO >; };
- P8_30_gpio_pu_pin: pinmux_P8_30_gpio_pu_pin { pinctrl-single,pins = < P8_30_GPIO_PU >; };
- P8_30_gpio_pd_pin: pinmux_P8_30_gpio_pd_pin { pinctrl-single,pins = < P8_30_GPIO_PD >; };
- P8_30_gpio_input_pin: pinmux_P8_30_gpio_input_pin { pinctrl-single,pins = < P8_30_GPIO_INPUT >; };
+ P8_30_default_pin: pinmux_P8_30_default_pin { pinctrl-single,pins = < P8_30_DEFAULT >; }; /* vout1_de.gpio4_20, vout1_d22.off */
+ P8_30_gpio_pin: pinmux_P8_30_gpio_pin { pinctrl-single,pins = < P8_30_GPIO >; }; /* vout1_de.gpio4_20, vout1_d22.off */
+ P8_30_gpio_pu_pin: pinmux_P8_30_gpio_pu_pin { pinctrl-single,pins = < P8_30_GPIO_PU >; }; /* vout1_de.gpio4_20, vout1_d22.off */
+ P8_30_gpio_pd_pin: pinmux_P8_30_gpio_pd_pin { pinctrl-single,pins = < P8_30_GPIO_PD >; }; /* vout1_de.gpio4_20, vout1_d22.off */
+ P8_30_gpio_input_pin: pinmux_P8_30_gpio_input_pin { pinctrl-single,pins = < P8_30_GPIO_INPUT >; }; /* vout1_de.gpio4_20, vout1_d22.off */
/* P8_30b (ball B9) gpio8_22 */
- P8_30_pruout_pin: pinmux_P8_30_pruout_pin { pinctrl-single,pins = < P8_30_PRUOUT >; };
- P8_30_pruin_pin: pinmux_P8_30_pruin_pin { pinctrl-single,pins = < P8_30_PRUIN >; };
+ P8_30_pruout_pin: pinmux_P8_30_pruout_pin { pinctrl-single,pins = < P8_30_PRUOUT >; }; /* vout1_d22.pr2_pru0_gpo19, vout1_de.off */
+ P8_30_pruin_pin: pinmux_P8_30_pruin_pin { pinctrl-single,pins = < P8_30_PRUIN >; }; /* vout1_d22.pr2_pru0_gpi19, vout1_de.off */
/* P8_31a (ball C8) gpio8_14 */
- P8_31_default_pin: pinmux_P8_31_default_pin { pinctrl-single,pins = < P8_31_DEFAULT >; };
- P8_31_gpio_pin: pinmux_P8_31_gpio_pin { pinctrl-single,pins = < P8_31_GPIO >; };
- P8_31_gpio_pu_pin: pinmux_P8_31_gpio_pu_pin { pinctrl-single,pins = < P8_31_GPIO_PU >; };
- P8_31_gpio_pd_pin: pinmux_P8_31_gpio_pd_pin { pinctrl-single,pins = < P8_31_GPIO_PD >; };
- P8_31_gpio_input_pin: pinmux_P8_31_gpio_input_pin { pinctrl-single,pins = < P8_31_GPIO_INPUT >; };
+ P8_31_default_pin: pinmux_P8_31_default_pin { pinctrl-single,pins = < P8_31_DEFAULT >; }; /* vout1_d14.gpio8_14, mcasp4_axr0.off */
+ P8_31_gpio_pin: pinmux_P8_31_gpio_pin { pinctrl-single,pins = < P8_31_GPIO >; }; /* vout1_d14.gpio8_14, mcasp4_axr0.off */
+ P8_31_gpio_pu_pin: pinmux_P8_31_gpio_pu_pin { pinctrl-single,pins = < P8_31_GPIO_PU >; }; /* vout1_d14.gpio8_14, mcasp4_axr0.off */
+ P8_31_gpio_pd_pin: pinmux_P8_31_gpio_pd_pin { pinctrl-single,pins = < P8_31_GPIO_PD >; }; /* vout1_d14.gpio8_14, mcasp4_axr0.off */
+ P8_31_gpio_input_pin: pinmux_P8_31_gpio_input_pin { pinctrl-single,pins = < P8_31_GPIO_INPUT >; }; /* vout1_d14.gpio8_14, mcasp4_axr0.off */
/* P8_31b (ball G16) */
- P8_31_uart_pin: pinmux_P8_31_uart_pin { pinctrl-single,pins = < P8_31_UART >; };
+ P8_31_uart_pin: pinmux_P8_31_uart_pin { pinctrl-single,pins = < P8_31_UART >; }; /* mcasp4_axr0.uart4_rxd,vout1_d14.off */
/* P8_32a (ball C7) gpio8_15 */
- P8_32_default_pin: pinmux_P8_32_default_pin { pinctrl-single,pins = < P8_32_DEFAULT >; };
- P8_32_gpio_pin: pinmux_P8_32_gpio_pin { pinctrl-single,pins = < P8_32_GPIO >; };
- P8_32_gpio_pu_pin: pinmux_P8_32_gpio_pu_pin { pinctrl-single,pins = < P8_32_GPIO_PU >; };
- P8_32_gpio_pd_pin: pinmux_P8_32_gpio_pd_pin { pinctrl-single,pins = < P8_32_GPIO_PD >; };
- P8_32_gpio_input_pin: pinmux_P8_32_gpio_input_pin { pinctrl-single,pins = < P8_32_GPIO_INPUT >; };
+ P8_32_default_pin: pinmux_P8_32_default_pin { pinctrl-single,pins = < P8_32_DEFAULT >; }; /* vout1_d15.gpio8_15, mcasp4_axr1.off */
+ P8_32_gpio_pin: pinmux_P8_32_gpio_pin { pinctrl-single,pins = < P8_32_GPIO >; }; /* vout1_d15.gpio8_15, mcasp4_axr1.off */
+ P8_32_gpio_pu_pin: pinmux_P8_32_gpio_pu_pin { pinctrl-single,pins = < P8_32_GPIO_PU >; }; /* vout1_d15.gpio8_15, mcasp4_axr1.off */
+ P8_32_gpio_pd_pin: pinmux_P8_32_gpio_pd_pin { pinctrl-single,pins = < P8_32_GPIO_PD >; }; /* vout1_d15.gpio8_15, mcasp4_axr1.off */
+ P8_32_gpio_input_pin: pinmux_P8_32_gpio_input_pin { pinctrl-single,pins = < P8_32_GPIO_INPUT >; }; /* vout1_d15.gpio8_15, mcasp4_axr1.off */
/* P8_32b (ball D17) */
- P8_32_uart_pin: pinmux_P8_32_uart_pin { pinctrl-single,pins = < P8_32_UART >; };
+ P8_32_uart_pin: pinmux_P8_32_uart_pin { pinctrl-single,pins = < P8_32_UART >; }; /* mcasp4_axr1.uart4_txd, vout1_d15.off */
/* P8_33a (ball C6) gpio8_13 */
- P8_33_default_pin: pinmux_P8_33_default_pin { pinctrl-single,pins = < P8_33_DEFAULT >; };
- P8_33_gpio_pin: pinmux_P8_33_gpio_pin { pinctrl-single,pins = < P8_33_GPIO >; };
- P8_33_gpio_pu_pin: pinmux_P8_33_gpio_pu_pin { pinctrl-single,pins = < P8_33_GPIO_PU >; };
- P8_33_gpio_pd_pin: pinmux_P8_33_gpio_pd_pin { pinctrl-single,pins = < P8_33_GPIO_PD >; };
- P8_33_gpio_input_pin: pinmux_P8_33_gpio_input_pin { pinctrl-single,pins = < P8_33_GPIO_INPUT >; };
+ P8_33_default_pin: pinmux_P8_33_default_pin { pinctrl-single,pins = < P8_33_DEFAULT >; }; /* vout1_d13.gpio8_13, vin1a_fld0.off */
+ P8_33_gpio_pin: pinmux_P8_33_gpio_pin { pinctrl-single,pins = < P8_33_GPIO >; }; /* vout1_d13.gpio8_13, vin1a_fld0.off */
+ P8_33_gpio_pu_pin: pinmux_P8_33_gpio_pu_pin { pinctrl-single,pins = < P8_33_GPIO_PU >; }; /* vout1_d13.gpio8_13, vin1a_fld0.off */
+ P8_33_gpio_pd_pin: pinmux_P8_33_gpio_pd_pin { pinctrl-single,pins = < P8_33_GPIO_PD >; }; /* vout1_d13.gpio8_13, vin1a_fld0.off */
+ P8_33_gpio_input_pin: pinmux_P8_33_gpio_input_pin { pinctrl-single,pins = < P8_33_GPIO_INPUT >; }; /* vout1_d13.gpio8_13, vin1a_fld0.off */
/* P8_33b (ball AF9) gpio3_1 */
- P8_33_qep_pin: pinmux_P8_33_qep_pin { pinctrl-single,pins = < P8_33_QEP >; };
+ P8_33_qep_pin: pinmux_P8_33_qep_pin { pinctrl-single,pins = < P8_33_QEP >; }; /* vin1a_fld0.eQEP1B_in, vout1_d13.off */
/* P8_34a (ball D8) gpio8_11 */
- P8_34_default_pin: pinmux_P8_34_default_pin { pinctrl-single,pins = < P8_34_DEFAULT >; };
- P8_34_gpio_pin: pinmux_P8_34_gpio_pin { pinctrl-single,pins = < P8_34_GPIO >; };
- P8_34_gpio_pu_pin: pinmux_P8_34_gpio_pu_pin { pinctrl-single,pins = < P8_34_GPIO_PU >; };
- P8_34_gpio_pd_pin: pinmux_P8_34_gpio_pd_pin { pinctrl-single,pins = < P8_34_GPIO_PD >; };
- P8_34_gpio_input_pin: pinmux_P8_34_gpio_input_pin { pinctrl-single,pins = < P8_34_GPIO_INPUT >; };
+ P8_34_default_pin: pinmux_P8_34_default_pin { pinctrl-single,pins = < P8_34_DEFAULT >; }; /* vout1_d11.gpio8_11, vin2a_vsync0.off */
+ P8_34_gpio_pin: pinmux_P8_34_gpio_pin { pinctrl-single,pins = < P8_34_GPIO >; }; /* vout1_d11.gpio8_11, vin2a_vsync0.off */
+ P8_34_gpio_pu_pin: pinmux_P8_34_gpio_pu_pin { pinctrl-single,pins = < P8_34_GPIO_PU >; }; /* vout1_d11.gpio8_11, vin2a_vsync0.off */
+ P8_34_gpio_pd_pin: pinmux_P8_34_gpio_pd_pin { pinctrl-single,pins = < P8_34_GPIO_PD >; }; /* vout1_d11.gpio8_11, vin2a_vsync0.off */
+ P8_34_gpio_input_pin: pinmux_P8_34_gpio_input_pin { pinctrl-single,pins = < P8_34_GPIO_INPUT >; }; /* vout1_d11.gpio8_11, vin2a_vsync0.off */
/* P8_34b (ball G6) gpio4_0 */
- P8_34_pwm_pin: pinmux_P8_34_pwm_pin { pinctrl-single,pins = < P8_34_PWM >; };
+ P8_34_pwm_pin: pinmux_P8_34_pwm_pin { pinctrl-single,pins = < P8_34_PWM >; }; /* vin2a_vsync0.ehrpwm1A, vout1_d11.off */
/* P8_35a (ball A5) gpio8_12 */
- P8_35_default_pin: pinmux_P8_35_default_pin { pinctrl-single,pins = < P8_35_DEFAULT >; };
- P8_35_gpio_pin: pinmux_P8_35_gpio_pin { pinctrl-single,pins = < P8_35_GPIO >; };
- P8_35_gpio_pu_pin: pinmux_P8_35_gpio_pu_pin { pinctrl-single,pins = < P8_35_GPIO_PU >; };
- P8_35_gpio_pd_pin: pinmux_P8_35_gpio_pd_pin { pinctrl-single,pins = < P8_35_GPIO_PD >; };
- P8_35_gpio_input_pin: pinmux_P8_35_gpio_input_pin { pinctrl-single,pins = < P8_35_GPIO_INPUT >; };
+ P8_35_default_pin: pinmux_P8_35_default_pin { pinctrl-single,pins = < P8_35_DEFAULT >; }; /* vout1_d12.gpio8_12, vin1a_de0.off */
+ P8_35_gpio_pin: pinmux_P8_35_gpio_pin { pinctrl-single,pins = < P8_35_GPIO >; }; /* vout1_d12.gpio8_12, vin1a_de0.off */
+ P8_35_gpio_pu_pin: pinmux_P8_35_gpio_pu_pin { pinctrl-single,pins = < P8_35_GPIO_PU >; }; /* vout1_d12.gpio8_12, vin1a_de0.off */
+ P8_35_gpio_pd_pin: pinmux_P8_35_gpio_pd_pin { pinctrl-single,pins = < P8_35_GPIO_PD >; }; /* vout1_d12.gpio8_12, vin1a_de0.off */
+ P8_35_gpio_input_pin: pinmux_P8_35_gpio_input_pin { pinctrl-single,pins = < P8_35_GPIO_INPUT >; }; /* vout1_d12.gpio8_12, vin1a_de0.off */
/* P8_35b (ball AD9) gpio3_0 */
- P8_35_qep_pin: pinmux_P8_35_qep_pin { pinctrl-single,pins = < P8_35_QEP >; };
+ P8_35_qep_pin: pinmux_P8_35_qep_pin { pinctrl-single,pins = < P8_35_QEP >; }; /* vin1a_de0.eQEP1A_in, vout1_d12.off */
/* P8_36a (ball D7) gpio8_10 */
- P8_36_default_pin: pinmux_P8_36_default_pin { pinctrl-single,pins = < P8_36_DEFAULT >; };
- P8_36_gpio_pin: pinmux_P8_36_gpio_pin { pinctrl-single,pins = < P8_36_GPIO >; };
- P8_36_gpio_pu_pin: pinmux_P8_36_gpio_pu_pin { pinctrl-single,pins = < P8_36_GPIO_PU >; };
- P8_36_gpio_pd_pin: pinmux_P8_36_gpio_pd_pin { pinctrl-single,pins = < P8_36_GPIO_PD >; };
- P8_36_gpio_input_pin: pinmux_P8_36_gpio_input_pin { pinctrl-single,pins = < P8_36_GPIO_INPUT >; };
+ P8_36_default_pin: pinmux_P8_36_default_pin { pinctrl-single,pins = < P8_36_DEFAULT >; }; /* vout1_d10.gpio8_10, vin2a_d0.off */
+ P8_36_gpio_pin: pinmux_P8_36_gpio_pin { pinctrl-single,pins = < P8_36_GPIO >; }; /* vout1_d10.gpio8_10, vin2a_d0.off */
+ P8_36_gpio_pu_pin: pinmux_P8_36_gpio_pu_pin { pinctrl-single,pins = < P8_36_GPIO_PU >; }; /* vout1_d10.gpio8_10, vin2a_d0.off */
+ P8_36_gpio_pd_pin: pinmux_P8_36_gpio_pd_pin { pinctrl-single,pins = < P8_36_GPIO_PD >; }; /* vout1_d10.gpio8_10, vin2a_d0.off */
+ P8_36_gpio_input_pin: pinmux_P8_36_gpio_input_pin { pinctrl-single,pins = < P8_36_GPIO_INPUT >; }; /* vout1_d10.gpio8_10, vin2a_d0.off */
/* P8_36b (ball F2) gpio4_1 */
- P8_36_pwm_pin: pinmux_P8_36_pwm_pin { pinctrl-single,pins = < P8_36_PWM >; };
+ P8_36_pwm_pin: pinmux_P8_36_pwm_pin { pinctrl-single,pins = < P8_36_PWM >; }; /* vin2a_d0.ehrpwm1B, vout1_d10.off */
/* P8_37a (ball E8) gpio8_8 */
- P8_37_default_pin: pinmux_P8_37_default_pin { pinctrl-single,pins = < P8_37_DEFAULT >; };
- P8_37_gpio_pin: pinmux_P8_37_gpio_pin { pinctrl-single,pins = < P8_37_GPIO >; };
- P8_37_gpio_pu_pin: pinmux_P8_37_gpio_pu_pin { pinctrl-single,pins = < P8_37_GPIO_PU >; };
- P8_37_gpio_pd_pin: pinmux_P8_37_gpio_pd_pin { pinctrl-single,pins = < P8_37_GPIO_PD >; };
- P8_37_gpio_input_pin: pinmux_P8_37_gpio_input_pin { pinctrl-single,pins = < P8_37_GPIO_INPUT >; };
+ P8_37_default_pin: pinmux_P8_37_default_pin { pinctrl-single,pins = < P8_37_DEFAULT >; }; /* vout1_d8.gpio8_8, mcasp4_fsx.off */
+ P8_37_gpio_pin: pinmux_P8_37_gpio_pin { pinctrl-single,pins = < P8_37_GPIO >; }; /* vout1_d8.gpio8_8, mcasp4_fsx.off */
+ P8_37_gpio_pu_pin: pinmux_P8_37_gpio_pu_pin { pinctrl-single,pins = < P8_37_GPIO_PU >; }; /* vout1_d8.gpio8_8, mcasp4_fsx.off */
+ P8_37_gpio_pd_pin: pinmux_P8_37_gpio_pd_pin { pinctrl-single,pins = < P8_37_GPIO_PD >; }; /* vout1_d8.gpio8_8, mcasp4_fsx.off */
+ P8_37_gpio_input_pin: pinmux_P8_37_gpio_input_pin { pinctrl-single,pins = < P8_37_GPIO_INPUT >; }; /* vout1_d8.gpio8_8, mcasp4_fsx.off */
/* P8_37b (ball A21) */
- P8_37_uart_pin: pinmux_P8_37_uart_pin { pinctrl-single,pins = < P8_37_UART >; };
+ P8_37_uart_pin: pinmux_P8_37_uart_pin { pinctrl-single,pins = < P8_37_UART >; }; /* mcasp4_fsx.uart8_txd. vout1_d8.off */
/* P8_38a (ball D9) gpio8_9 */
- P8_38_default_pin: pinmux_P8_38_default_pin { pinctrl-single,pins = < P8_38_DEFAULT >; };
- P8_38_gpio_pin: pinmux_P8_38_gpio_pin { pinctrl-single,pins = < P8_38_GPIO >; };
- P8_38_gpio_pu_pin: pinmux_P8_38_gpio_pu_pin { pinctrl-single,pins = < P8_38_GPIO_PU >; };
- P8_38_gpio_pd_pin: pinmux_P8_38_gpio_pd_pin { pinctrl-single,pins = < P8_38_GPIO_PD >; };
- P8_38_gpio_input_pin: pinmux_P8_38_gpio_input_pin { pinctrl-single,pins = < P8_38_GPIO_INPUT >; };
+ P8_38_default_pin: pinmux_P8_38_default_pin { pinctrl-single,pins = < P8_38_DEFAULT >; }; /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
+ P8_38_gpio_pin: pinmux_P8_38_gpio_pin { pinctrl-single,pins = < P8_38_GPIO >; }; /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
+ P8_38_gpio_pu_pin: pinmux_P8_38_gpio_pu_pin { pinctrl-single,pins = < P8_38_GPIO_PU >; }; /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
+ P8_38_gpio_pd_pin: pinmux_P8_38_gpio_pd_pin { pinctrl-single,pins = < P8_38_GPIO_PD >; }; /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
+ P8_38_gpio_input_pin: pinmux_P8_38_gpio_input_pin { pinctrl-single,pins = < P8_38_GPIO_INPUT >; }; /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
/* P8_38b (ball C18) */
- P8_38_uart_pin: pinmux_P8_38_uart_pin { pinctrl-single,pins = < P8_38_UART >; };
+ P8_38_uart_pin: pinmux_P8_38_uart_pin { pinctrl-single,pins = < P8_38_UART >; }; /* mcasp4_aclkx.uart8_rxd, vout1_d9.off */
/* P8_39 (ball F8) gpio8_6 */
- P8_39_default_pin: pinmux_P8_39_default_pin { pinctrl-single,pins = < P8_39_DEFAULT >; };
- P8_39_gpio_pin: pinmux_P8_39_gpio_pin { pinctrl-single,pins = < P8_39_GPIO >; };
- P8_39_gpio_pu_pin: pinmux_P8_39_gpio_pu_pin { pinctrl-single,pins = < P8_39_GPIO_PU >; };
- P8_39_gpio_pd_pin: pinmux_P8_39_gpio_pd_pin { pinctrl-single,pins = < P8_39_GPIO_PD >; };
- P8_39_gpio_input_pin: pinmux_P8_39_gpio_input_pin { pinctrl-single,pins = < P8_39_GPIO_INPUT >; };
- P8_39_pruout_pin: pinmux_P8_39_pruout_pin { pinctrl-single,pins = < P8_39_PRUOUT >; };
- P8_39_pruin_pin: pinmux_P8_39_pruin_pin { pinctrl-single,pins = < P8_39_PRUIN >; };
+ P8_39_default_pin: pinmux_P8_39_default_pin { pinctrl-single,pins = < P8_39_DEFAULT >; }; /* vout1_d6.gpio8_6 */
+ P8_39_gpio_pin: pinmux_P8_39_gpio_pin { pinctrl-single,pins = < P8_39_GPIO >; }; /* vout1_d6.gpio8_6 */
+ P8_39_gpio_pu_pin: pinmux_P8_39_gpio_pu_pin { pinctrl-single,pins = < P8_39_GPIO_PU >; }; /* vout1_d6.gpio8_6 */
+ P8_39_gpio_pd_pin: pinmux_P8_39_gpio_pd_pin { pinctrl-single,pins = < P8_39_GPIO_PD >; }; /* vout1_d6.gpio8_6 */
+ P8_39_gpio_input_pin: pinmux_P8_39_gpio_input_pin { pinctrl-single,pins = < P8_39_GPIO_INPUT >; }; /* vout1_d6.gpio8_6 */
+ P8_39_pruout_pin: pinmux_P8_39_pruout_pin { pinctrl-single,pins = < P8_39_PRUOUT >; }; /* vout1_d6.pr2_pru0_gpo3 */
+ P8_39_pruin_pin: pinmux_P8_39_pruin_pin { pinctrl-single,pins = < P8_39_PRUIN >; }; /* vout1_d6.pr2_pru0_gpi3 */
/* P8_40 (ball E7) gpio8_7 */
- P8_40_default_pin: pinmux_P8_40_default_pin { pinctrl-single,pins = < P8_40_DEFAULT >; };
- P8_40_gpio_pin: pinmux_P8_40_gpio_pin { pinctrl-single,pins = < P8_40_GPIO >; };
- P8_40_gpio_pu_pin: pinmux_P8_40_gpio_pu_pin { pinctrl-single,pins = < P8_40_GPIO_PU >; };
- P8_40_gpio_pd_pin: pinmux_P8_40_gpio_pd_pin { pinctrl-single,pins = < P8_40_GPIO_PD >; };
- P8_40_gpio_input_pin: pinmux_P8_40_gpio_input_pin { pinctrl-single,pins = < P8_40_GPIO_INPUT >; };
- P8_40_pruout_pin: pinmux_P8_40_pruout_pin { pinctrl-single,pins = < P8_40_PRUOUT >; };
- P8_40_pruin_pin: pinmux_P8_40_pruin_pin { pinctrl-single,pins = < P8_40_PRUIN >; };
+ P8_40_default_pin: pinmux_P8_40_default_pin { pinctrl-single,pins = < P8_40_DEFAULT >; }; /* vout1_d7.gpio8_7 */
+ P8_40_gpio_pin: pinmux_P8_40_gpio_pin { pinctrl-single,pins = < P8_40_GPIO >; }; /* vout1_d7.gpio8_7 */
+ P8_40_gpio_pu_pin: pinmux_P8_40_gpio_pu_pin { pinctrl-single,pins = < P8_40_GPIO_PU >; }; /* vout1_d7.gpio8_7 */
+ P8_40_gpio_pd_pin: pinmux_P8_40_gpio_pd_pin { pinctrl-single,pins = < P8_40_GPIO_PD >; }; /* vout1_d7.gpio8_7 */
+ P8_40_gpio_input_pin: pinmux_P8_40_gpio_input_pin { pinctrl-single,pins = < P8_40_GPIO_INPUT >; }; /* vout1_d7.gpio8_7 */
+ P8_40_pruout_pin: pinmux_P8_40_pruout_pin { pinctrl-single,pins = < P8_40_PRUOUT >; }; /* vout1_d7.pr2_pru0_gpo4 */
+ P8_40_pruin_pin: pinmux_P8_40_pruin_pin { pinctrl-single,pins = < P8_40_PRUIN >; }; /* vout1_d7.pr2_pru0_gpi4 */
/* P8_41 (ball E9) gpio8_4 */
- P8_41_default_pin: pinmux_P8_41_default_pin { pinctrl-single,pins = < P8_41_DEFAULT >; };
- P8_41_gpio_pin: pinmux_P8_41_gpio_pin { pinctrl-single,pins = < P8_41_GPIO >; };
- P8_41_gpio_pu_pin: pinmux_P8_41_gpio_pu_pin { pinctrl-single,pins = < P8_41_GPIO_PU >; };
- P8_41_gpio_pd_pin: pinmux_P8_41_gpio_pd_pin { pinctrl-single,pins = < P8_41_GPIO_PD >; };
- P8_41_gpio_input_pin: pinmux_P8_41_gpio_input_pin { pinctrl-single,pins = < P8_41_GPIO_INPUT >; };
- P8_41_pruout_pin: pinmux_P8_41_pruout_pin { pinctrl-single,pins = < P8_41_PRUOUT >; };
- P8_41_pruin_pin: pinmux_P8_41_pruin_pin { pinctrl-single,pins = < P8_41_PRUIN >; };
+ P8_41_default_pin: pinmux_P8_41_default_pin { pinctrl-single,pins = < P8_41_DEFAULT >; }; /* vout1_d4.gpio8_4 */
+ P8_41_gpio_pin: pinmux_P8_41_gpio_pin { pinctrl-single,pins = < P8_41_GPIO >; }; /* vout1_d4.gpio8_4 */
+ P8_41_gpio_pu_pin: pinmux_P8_41_gpio_pu_pin { pinctrl-single,pins = < P8_41_GPIO_PU >; }; /* vout1_d4.gpio8_4 */
+ P8_41_gpio_pd_pin: pinmux_P8_41_gpio_pd_pin { pinctrl-single,pins = < P8_41_GPIO_PD >; }; /* vout1_d4.gpio8_4 */
+ P8_41_gpio_input_pin: pinmux_P8_41_gpio_input_pin { pinctrl-single,pins = < P8_41_GPIO_INPUT >; }; /* vout1_d4.gpio8_4 */
+ P8_41_pruout_pin: pinmux_P8_41_pruout_pin { pinctrl-single,pins = < P8_41_PRUOUT >; }; /* vout1_d4.pr2_pru0_gpo1 */
+ P8_41_pruin_pin: pinmux_P8_41_pruin_pin { pinctrl-single,pins = < P8_41_PRUIN >; }; /* vout1_d4.pr2_pru0_gpi1 */
/* P8_42 (ball F9) gpio8_5 */
- P8_42_default_pin: pinmux_P8_42_default_pin { pinctrl-single,pins = < P8_42_DEFAULT >; };
- P8_42_gpio_pin: pinmux_P8_42_gpio_pin { pinctrl-single,pins = < P8_42_GPIO >; };
- P8_42_gpio_pu_pin: pinmux_P8_42_gpio_pu_pin { pinctrl-single,pins = < P8_42_GPIO_PU >; };
- P8_42_gpio_pd_pin: pinmux_P8_42_gpio_pd_pin { pinctrl-single,pins = < P8_42_GPIO_PD >; };
- P8_42_gpio_input_pin: pinmux_P8_42_gpio_input_pin { pinctrl-single,pins = < P8_42_GPIO_INPUT >; };
- P8_42_pruout_pin: pinmux_P8_42_pruout_pin { pinctrl-single,pins = < P8_42_PRUOUT >; };
- P8_42_pruin_pin: pinmux_P8_42_pruin_pin { pinctrl-single,pins = < P8_42_PRUIN >; };
+ P8_42_default_pin: pinmux_P8_42_default_pin { pinctrl-single,pins = < P8_42_DEFAULT >; }; /* vout1_d5.gpio8_5 */
+ P8_42_gpio_pin: pinmux_P8_42_gpio_pin { pinctrl-single,pins = < P8_42_GPIO >; }; /* vout1_d5.gpio8_5 */
+ P8_42_gpio_pu_pin: pinmux_P8_42_gpio_pu_pin { pinctrl-single,pins = < P8_42_GPIO_PU >; }; /* vout1_d5.gpio8_5 */
+ P8_42_gpio_pd_pin: pinmux_P8_42_gpio_pd_pin { pinctrl-single,pins = < P8_42_GPIO_PD >; }; /* vout1_d5.gpio8_5 */
+ P8_42_gpio_input_pin: pinmux_P8_42_gpio_input_pin { pinctrl-single,pins = < P8_42_GPIO_INPUT >; }; /* vout1_d5.gpio8_5 */
+ P8_42_pruout_pin: pinmux_P8_42_pruout_pin { pinctrl-single,pins = < P8_42_PRUOUT >; }; /* vout1_d5.pr2_pru0_gpo2 */
+ P8_42_pruin_pin: pinmux_P8_42_pruin_pin { pinctrl-single,pins = < P8_42_PRUIN >; }; /* vout1_d5.pr2_pru0_gpi2 */
/* P8_43 (ball F10) gpio8_2 */
- P8_43_default_pin: pinmux_P8_43_default_pin { pinctrl-single,pins = < P8_43_DEFAULT >; };
- P8_43_gpio_pin: pinmux_P8_43_gpio_pin { pinctrl-single,pins = < P8_43_GPIO >; };
- P8_43_gpio_pu_pin: pinmux_P8_43_gpio_pu_pin { pinctrl-single,pins = < P8_43_GPIO_PU >; };
- P8_43_gpio_pd_pin: pinmux_P8_43_gpio_pd_pin { pinctrl-single,pins = < P8_43_GPIO_PD >; };
- P8_43_gpio_input_pin: pinmux_P8_43_gpio_input_pin { pinctrl-single,pins = < P8_43_GPIO_INPUT >; };
- P8_43_pruout_pin: pinmux_P8_43_pruout_pin { pinctrl-single,pins = < P8_43_PRUOUT >; };
- P8_43_pruin_pin: pinmux_P8_43_pruin_pin { pinctrl-single,pins = < P8_43_PRUIN >; };
+ P8_43_default_pin: pinmux_P8_43_default_pin { pinctrl-single,pins = < P8_43_DEFAULT >; }; /* vout1_d2.gpio8_2 */
+ P8_43_gpio_pin: pinmux_P8_43_gpio_pin { pinctrl-single,pins = < P8_43_GPIO >; }; /* vout1_d2.gpio8_2 */
+ P8_43_gpio_pu_pin: pinmux_P8_43_gpio_pu_pin { pinctrl-single,pins = < P8_43_GPIO_PU >; }; /* vout1_d2.gpio8_2 */
+ P8_43_gpio_pd_pin: pinmux_P8_43_gpio_pd_pin { pinctrl-single,pins = < P8_43_GPIO_PD >; }; /* vout1_d2.gpio8_2 */
+ P8_43_gpio_input_pin: pinmux_P8_43_gpio_input_pin { pinctrl-single,pins = < P8_43_GPIO_INPUT >; }; /* vout1_d2.gpio8_2 */
+ P8_43_pruout_pin: pinmux_P8_43_pruout_pin { pinctrl-single,pins = < P8_43_PRUOUT >; }; /* vout1_d2.pr2_pru1_gpo20 */
+ P8_43_pruin_pin: pinmux_P8_43_pruin_pin { pinctrl-single,pins = < P8_43_PRUIN >; }; /* vout1_d2.pr2_pru1_gpi20 */
/* P8_44 (ball G11) gpio8_3 */
- P8_44_default_pin: pinmux_P8_44_default_pin { pinctrl-single,pins = < P8_44_DEFAULT >; };
- P8_44_gpio_pin: pinmux_P8_44_gpio_pin { pinctrl-single,pins = < P8_44_GPIO >; };
- P8_44_gpio_pu_pin: pinmux_P8_44_gpio_pu_pin { pinctrl-single,pins = < P8_44_GPIO_PU >; };
- P8_44_gpio_pd_pin: pinmux_P8_44_gpio_pd_pin { pinctrl-single,pins = < P8_44_GPIO_PD >; };
- P8_44_gpio_input_pin: pinmux_P8_44_gpio_input_pin { pinctrl-single,pins = < P8_44_GPIO_INPUT >; };
- P8_44_pruout_pin: pinmux_P8_44_pruout_pin { pinctrl-single,pins = < P8_44_PRUOUT >; };
- P8_44_pruin_pin: pinmux_P8_44_pruin_pin { pinctrl-single,pins = < P8_44_PRUIN >; };
+ P8_44_default_pin: pinmux_P8_44_default_pin { pinctrl-single,pins = < P8_44_DEFAULT >; }; /* vout1_d3.gpio8_3 */
+ P8_44_gpio_pin: pinmux_P8_44_gpio_pin { pinctrl-single,pins = < P8_44_GPIO >; }; /* vout1_d3.gpio8_3 */
+ P8_44_gpio_pu_pin: pinmux_P8_44_gpio_pu_pin { pinctrl-single,pins = < P8_44_GPIO_PU >; }; /* vout1_d3.gpio8_3 */
+ P8_44_gpio_pd_pin: pinmux_P8_44_gpio_pd_pin { pinctrl-single,pins = < P8_44_GPIO_PD >; }; /* vout1_d3.gpio8_3 */
+ P8_44_gpio_input_pin: pinmux_P8_44_gpio_input_pin { pinctrl-single,pins = < P8_44_GPIO_INPUT >; }; /* vout1_d3.gpio8_3 */
+ P8_44_pruout_pin: pinmux_P8_44_pruout_pin { pinctrl-single,pins = < P8_44_PRUOUT >; }; /* vout1_d3.pr2_pru0_gpo0 */
+ P8_44_pruin_pin: pinmux_P8_44_pruin_pin { pinctrl-single,pins = < P8_44_PRUIN >; }; /* vout1_d3.pr2_pru0_gpi0 */
/* P8_45a (ball F11) gpio8_0 */
- P8_45_default_pin: pinmux_P8_45_default_pin { pinctrl-single,pins = < P8_45_DEFAULT >; };
- P8_45_gpio_pin: pinmux_P8_45_gpio_pin { pinctrl-single,pins = < P8_45_GPIO >; };
- P8_45_gpio_pu_pin: pinmux_P8_45_gpio_pu_pin { pinctrl-single,pins = < P8_45_GPIO_PU >; };
- P8_45_gpio_pd_pin: pinmux_P8_45_gpio_pd_pin { pinctrl-single,pins = < P8_45_GPIO_PD >; };
- P8_45_gpio_input_pin: pinmux_P8_45_gpio_input_pin { pinctrl-single,pins = < P8_45_GPIO_INPUT >; };
+ P8_45_default_pin: pinmux_P8_45_default_pin { pinctrl-single,pins = < P8_45_DEFAULT >; }; /* vout1_d0.gpio8_0, vout1_d16.off */
+ P8_45_gpio_pin: pinmux_P8_45_gpio_pin { pinctrl-single,pins = < P8_45_GPIO >; }; /* vout1_d0.gpio8_0, vout1_d16.off */
+ P8_45_gpio_pu_pin: pinmux_P8_45_gpio_pu_pin { pinctrl-single,pins = < P8_45_GPIO_PU >; }; /* vout1_d0.gpio8_0, vout1_d16.off */
+ P8_45_gpio_pd_pin: pinmux_P8_45_gpio_pd_pin { pinctrl-single,pins = < P8_45_GPIO_PD >; }; /* vout1_d0.gpio8_0, vout1_d16.off */
+ P8_45_gpio_input_pin: pinmux_P8_45_gpio_input_pin { pinctrl-single,pins = < P8_45_GPIO_INPUT >; }; /* vout1_d0.gpio8_0, vout1_d16.off */
/* P8_45b (ball B7) gpio8_16 */
- P8_45_pruout_pin: pinmux_P8_45_pruout_pin { pinctrl-single,pins = < P8_45_PRUOUT >; };
- P8_45_pruin_pin: pinmux_P8_45_pruin_pin { pinctrl-single,pins = < P8_45_PRUIN >; };
+ P8_45_pruout_pin: pinmux_P8_45_pruout_pin { pinctrl-single,pins = < P8_45_PRUOUT >; }; /* vout1_d16.pr2_pru0_gpo13, vout1_d0.off */
+ P8_45_pruin_pin: pinmux_P8_45_pruin_pin { pinctrl-single,pins = < P8_45_PRUIN >; }; /* vout1_d16.pr2_pru0_gpi13, vout1_d0.off */
/* P8_46a (ball G10) gpio8_1 */
- P8_46_default_pin: pinmux_P8_46_default_pin { pinctrl-single,pins = < P8_46_DEFAULT >; };
- P8_46_gpio_pin: pinmux_P8_46_gpio_pin { pinctrl-single,pins = < P8_46_GPIO >; };
- P8_46_gpio_pu_pin: pinmux_P8_46_gpio_pu_pin { pinctrl-single,pins = < P8_46_GPIO_PU >; };
- P8_46_gpio_pd_pin: pinmux_P8_46_gpio_pd_pin { pinctrl-single,pins = < P8_46_GPIO_PD >; };
- P8_46_gpio_input_pin: pinmux_P8_46_gpio_input_pin { pinctrl-single,pins = < P8_46_GPIO_INPUT >; };
+ P8_46_default_pin: pinmux_P8_46_default_pin { pinctrl-single,pins = < P8_46_DEFAULT >; }; /* vout1_d1.gpio8_1, vout1_d23.off */
+ P8_46_gpio_pin: pinmux_P8_46_gpio_pin { pinctrl-single,pins = < P8_46_GPIO >; }; /* vout1_d1.gpio8_1, vout1_d23.off */
+ P8_46_gpio_pu_pin: pinmux_P8_46_gpio_pu_pin { pinctrl-single,pins = < P8_46_GPIO_PU >; }; /* vout1_d1.gpio8_1, vout1_d23.off */
+ P8_46_gpio_pd_pin: pinmux_P8_46_gpio_pd_pin { pinctrl-single,pins = < P8_46_GPIO_PD >; }; /* vout1_d1.gpio8_1, vout1_d23.off */
+ P8_46_gpio_input_pin: pinmux_P8_46_gpio_input_pin { pinctrl-single,pins = < P8_46_GPIO_INPUT >; }; /* vout1_d1.gpio8_1, vout1_d23.off */
/* P8_46b (ball A10) gpio8_23 */
- P8_46_pruout_pin: pinmux_P8_46_pruout_pin { pinctrl-single,pins = < P8_46_PRUOUT >; };
- P8_46_pruin_pin: pinmux_P8_46_pruin_pin { pinctrl-single,pins = < P8_46_PRUIN >; };
+ P8_46_pruout_pin: pinmux_P8_46_pruout_pin { pinctrl-single,pins = < P8_46_PRUOUT >; }; /* vout1_d23.pr2_pru0_gpo20, vout1_d1.off */
+ P8_46_pruin_pin: pinmux_P8_46_pruin_pin { pinctrl-single,pins = < P8_46_PRUIN >; }; /* vout1_d23.pr2_pru0_gpi20, vout1_d1.off */
/************************/
/* P9 Header */
@@ -434,221 +434,221 @@
/* P9_10 RSTn */
/* P9_11a (ball B19) */
- P9_11_uart_pin: pinmux_P9_11_uart_pin { pinctrl-single,pins = < P9_11_UART >; };
+ P9_11_uart_pin: pinmux_P9_11_uart_pin { pinctrl-single,pins = < P9_11_UART >; }; /* mcasp3_axr0.uart5_rxd, vout1_d17.off */
/* P9_11b (ball B8) gpio8_17 */
- P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = < P9_11_DEFAULT >; };
- P9_11_gpio_pin: pinmux_P9_11_gpio_pin { pinctrl-single,pins = < P9_11_GPIO >; };
- P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin { pinctrl-single,pins = < P9_11_GPIO_PU >; };
- P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin { pinctrl-single,pins = < P9_11_GPIO_PD >; };
- P9_11_gpio_input_pin: pinmux_P9_11_gpio_input_pin { pinctrl-single,pins = < P9_11_GPIO_INPUT >; };
+ P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = < P9_11_DEFAULT >; }; /* vout1_d17.gpio8_17, mcasp3_axr0.off */
+ P9_11_gpio_pin: pinmux_P9_11_gpio_pin { pinctrl-single,pins = < P9_11_GPIO >; }; /* vout1_d17.gpio8_17, mcasp3_axr0.off */
+ P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin { pinctrl-single,pins = < P9_11_GPIO_PU >; }; /* vout1_d17.gpio8_17, mcasp3_axr0.off */
+ P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin { pinctrl-single,pins = < P9_11_GPIO_PD >; }; /* vout1_d17.gpio8_17, mcasp3_axr0.off */
+ P9_11_gpio_input_pin: pinmux_P9_11_gpio_input_pin { pinctrl-single,pins = < P9_11_GPIO_INPUT >; }; /* vout1_d17.gpio8_17, mcasp3_axr0.off */
/* P9_12 (ball B14) gpio5_0 */
- P9_12_default_pin: pinmux_P9_12_default_pin { pinctrl-single,pins = < P9_12_DEFAULT >; };
- P9_12_gpio_pin: pinmux_P9_12_gpio_pin { pinctrl-single,pins = < P9_12_GPIO >; };
- P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin { pinctrl-single,pins = < P9_12_GPIO_PU >; };
- P9_12_gpio_pd_pin: pinmux_P9_12_gpio_pd_pin { pinctrl-single,pins = < P9_12_GPIO_PD >; };
- P9_12_gpio_input_pin: pinmux_P9_12_gpio_input_pin { pinctrl-single,pins = < P9_12_GPIO_INPUT >; };
+ P9_12_default_pin: pinmux_P9_12_default_pin { pinctrl-single,pins = < P9_12_DEFAULT >; }; /* mcasp1_aclkr.gpio5_0 */
+ P9_12_gpio_pin: pinmux_P9_12_gpio_pin { pinctrl-single,pins = < P9_12_GPIO >; }; /* mcasp1_aclkr.gpio5_0 */
+ P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin { pinctrl-single,pins = < P9_12_GPIO_PU >; }; /* mcasp1_aclkr.gpio5_0 */
+ P9_12_gpio_pd_pin: pinmux_P9_12_gpio_pd_pin { pinctrl-single,pins = < P9_12_GPIO_PD >; }; /* mcasp1_aclkr.gpio5_0 */
+ P9_12_gpio_input_pin: pinmux_P9_12_gpio_input_pin { pinctrl-single,pins = < P9_12_GPIO_INPUT >; }; /* mcasp1_aclkr.gpio5_0 */
/* P9_13a (ball C17) */
- P9_13_uart_pin: pinmux_P9_13_uart_pin { pinctrl-single,pins = < P9_13_UART >; };
+ P9_13_uart_pin: pinmux_P9_13_uart_pin { pinctrl-single,pins = < P9_13_UART >; }; /* mcasp3_axr1.uart5_txd, usb1_drvvbus.off */
/* P9_13b (ball AB10) gpio6_12 */
- P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = < P9_13_DEFAULT >; };
- P9_13_gpio_pin: pinmux_P9_13_gpio_pin { pinctrl-single,pins = < P9_13_GPIO >; };
- P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin { pinctrl-single,pins = < P9_13_GPIO_PU >; };
- P9_13_gpio_pd_pin: pinmux_P9_13_gpio_pd_pin { pinctrl-single,pins = < P9_13_GPIO_PD >; };
- P9_13_gpio_input_pin: pinmux_P9_13_gpio_input_pin { pinctrl-single,pins = < P9_13_GPIO_INPUT >; };
+ P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = < P9_13_DEFAULT >; }; /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
+ P9_13_gpio_pin: pinmux_P9_13_gpio_pin { pinctrl-single,pins = < P9_13_GPIO >; }; /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
+ P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin { pinctrl-single,pins = < P9_13_GPIO_PU >; }; /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
+ P9_13_gpio_pd_pin: pinmux_P9_13_gpio_pd_pin { pinctrl-single,pins = < P9_13_GPIO_PD >; }; /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
+ P9_13_gpio_input_pin: pinmux_P9_13_gpio_input_pin { pinctrl-single,pins = < P9_13_GPIO_INPUT >; }; /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
/* P9_14 (ball D6) gpio4_25 */
- P9_14_default_pin: pinmux_P9_14_default_pin { pinctrl-single,pins = < P9_14_DEFAULT >; };
- P9_14_gpio_pin: pinmux_P9_14_gpio_pin { pinctrl-single,pins = < P9_14_GPIO >; };
- P9_14_gpio_pu_pin: pinmux_P9_14_gpio_pu_pin { pinctrl-single,pins = < P9_14_GPIO_PU >; };
- P9_14_gpio_pd_pin: pinmux_P9_14_gpio_pd_pin { pinctrl-single,pins = < P9_14_GPIO_PD >; };
- P9_14_gpio_input_pin: pinmux_P9_14_gpio_input_pin { pinctrl-single,pins = < P9_14_GPIO_INPUT >; };
- P9_14_pwm_pin: pinmux_P9_14_pwm_pin { pinctrl-single,pins = < P9_14_PWM >; };
+ P9_14_default_pin: pinmux_P9_14_default_pin { pinctrl-single,pins = < P9_14_DEFAULT >; }; /* vin2a_d17.gpio4_25 */
+ P9_14_gpio_pin: pinmux_P9_14_gpio_pin { pinctrl-single,pins = < P9_14_GPIO >; }; /* vin2a_d17.gpio4_25 */
+ P9_14_gpio_pu_pin: pinmux_P9_14_gpio_pu_pin { pinctrl-single,pins = < P9_14_GPIO_PU >; }; /* vin2a_d17.gpio4_25 */
+ P9_14_gpio_pd_pin: pinmux_P9_14_gpio_pd_pin { pinctrl-single,pins = < P9_14_GPIO_PD >; }; /* vin2a_d17.gpio4_25 */
+ P9_14_gpio_input_pin: pinmux_P9_14_gpio_input_pin { pinctrl-single,pins = < P9_14_GPIO_INPUT >; }; /* vin2a_d17.gpio4_25 */
+ P9_14_pwm_pin: pinmux_P9_14_pwm_pin { pinctrl-single,pins = < P9_14_PWM >; }; /* vin2a_d17.ehrpwm3A */
/* P9_15 (ball AG4) gpio3_12 */
- P9_15_default_pin: pinmux_P9_15_default_pin { pinctrl-single,pins = < P9_15_DEFAULT >; };
- P9_15_gpio_pin: pinmux_P9_15_gpio_pin { pinctrl-single,pins = < P9_15_GPIO >; };
- P9_15_gpio_pu_pin: pinmux_P9_15_gpio_pu_pin { pinctrl-single,pins = < P9_15_GPIO_PU >; };
- P9_15_gpio_pd_pin: pinmux_P9_15_gpio_pd_pin { pinctrl-single,pins = < P9_15_GPIO_PD >; };
- P9_15_gpio_input_pin: pinmux_P9_15_gpio_input_pin { pinctrl-single,pins = < P9_15_GPIO_INPUT >; };
+ P9_15_default_pin: pinmux_P9_15_default_pin { pinctrl-single,pins = < P9_15_DEFAULT >; }; /* vin1a_d8.gpio3_12 */
+ P9_15_gpio_pin: pinmux_P9_15_gpio_pin { pinctrl-single,pins = < P9_15_GPIO >; }; /* vin1a_d8.gpio3_12 */
+ P9_15_gpio_pu_pin: pinmux_P9_15_gpio_pu_pin { pinctrl-single,pins = < P9_15_GPIO_PU >; }; /* vin1a_d8.gpio3_12 */
+ P9_15_gpio_pd_pin: pinmux_P9_15_gpio_pd_pin { pinctrl-single,pins = < P9_15_GPIO_PD >; }; /* vin1a_d8.gpio3_12 */
+ P9_15_gpio_input_pin: pinmux_P9_15_gpio_input_pin { pinctrl-single,pins = < P9_15_GPIO_INPUT >; }; /* vin1a_d8.gpio3_12 */
/* P9_16 (ball C5) gpio4_26 */
- P9_16_default_pin: pinmux_P9_16_default_pin { pinctrl-single,pins = < P9_16_DEFAULT >; };
- P9_16_gpio_pin: pinmux_P9_16_gpio_pin { pinctrl-single,pins = < P9_16_GPIO >; };
- P9_16_gpio_pu_pin: pinmux_P9_16_gpio_pu_pin { pinctrl-single,pins = < P9_16_GPIO_PU >; };
- P9_16_gpio_pd_pin: pinmux_P9_16_gpio_pd_pin { pinctrl-single,pins = < P9_16_GPIO_PD >; };
- P9_16_gpio_input_pin: pinmux_P9_16_gpio_input_pin { pinctrl-single,pins = < P9_16_GPIO_INPUT >; };
- P9_16_pwm_pin: pinmux_P9_16_pwm_pin { pinctrl-single,pins = < P9_16_PWM >; };
+ P9_16_default_pin: pinmux_P9_16_default_pin { pinctrl-single,pins = < P9_16_DEFAULT >; }; /* vin2a_d18.gpio4_26 */
+ P9_16_gpio_pin: pinmux_P9_16_gpio_pin { pinctrl-single,pins = < P9_16_GPIO >; }; /* vin2a_d18.gpio4_26 */
+ P9_16_gpio_pu_pin: pinmux_P9_16_gpio_pu_pin { pinctrl-single,pins = < P9_16_GPIO_PU >; }; /* vin2a_d18.gpio4_26 */
+ P9_16_gpio_pd_pin: pinmux_P9_16_gpio_pd_pin { pinctrl-single,pins = < P9_16_GPIO_PD >; }; /* vin2a_d18.gpio4_26 */
+ P9_16_gpio_input_pin: pinmux_P9_16_gpio_input_pin { pinctrl-single,pins = < P9_16_GPIO_INPUT >; }; /* vin2a_d18.gpio4_26 */
+ P9_16_pwm_pin: pinmux_P9_16_pwm_pin { pinctrl-single,pins = < P9_16_PWM >; }; /* vin2a_d18.ehrpwm3B */
/* P9_17a (ball B24) gpio7_17 */
- P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = < P9_17_DEFAULT >; };
- P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = < P9_17_GPIO >; };
- P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = < P9_17_GPIO_PU >; };
- P9_17_gpio_pd_pin: pinmux_P9_17_gpio_pd_pin { pinctrl-single,pins = < P9_17_GPIO_PD >; };
- P9_17_gpio_input_pin: pinmux_P9_17_gpio_input_pin { pinctrl-single,pins = < P9_17_GPIO_INPUT >; };
- P9_17_spi_cs_pin: pinmux_P9_17_spi_cs_pin { pinctrl-single,pins = < P9_17_SPI >; };
+ P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = < P9_17_DEFAULT >; }; /* spi2_cs0.gpio7_17 */
+ P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = < P9_17_GPIO >; }; /* spi2_cs0.gpio7_17 */
+ P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = < P9_17_GPIO_PU >; }; /* spi2_cs0.gpio7_17 */
+ P9_17_gpio_pd_pin: pinmux_P9_17_gpio_pd_pin { pinctrl-single,pins = < P9_17_GPIO_PD >; }; /* spi2_cs0.gpio7_17 */
+ P9_17_gpio_input_pin: pinmux_P9_17_gpio_input_pin { pinctrl-single,pins = < P9_17_GPIO_INPUT >; }; /* spi2_cs0.gpio7_17 */
+ P9_17_spi_cs_pin: pinmux_P9_17_spi_cs_pin { pinctrl-single,pins = < P9_17_SPI >; }; /* spi2_cs0.spi2_cs0 */
/* P9_17b (ball F12) gpio5_3 */
- P9_17_i2c_pin: pinmux_P9_17_i2c_pin { pinctrl-single,pins = < P9_17_I2C >; };
- P9_17_uart_pin: pinmux_P9_17_pru_uart_pin { pinctrl-single,pins = < P9_17_UART >; };
+ P9_17_i2c_pin: pinmux_P9_17_i2c_pin { pinctrl-single,pins = < P9_17_I2C >; }; /* mcasp1_axr1.i2c5_scl */
+ P9_17_uart_pin: pinmux_P9_17_pru_uart_pin { pinctrl-single,pins = < P9_17_UART >; }; /* mcasp1_axr1.uart6_txd */
/* P9_18a (ball G17) gpio7_16 */
- P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = < P9_18_DEFAULT >; };
- P9_18_gpio_pin: pinmux_P9_18_gpio_pin { pinctrl-single,pins = < P9_18_GPIO >; };
- P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin { pinctrl-single,pins = < P9_18_GPIO_PU >; };
- P9_18_gpio_pd_pin: pinmux_P9_18_gpio_pd_pin { pinctrl-single,pins = < P9_18_GPIO_PD >; };
- P9_18_gpio_input_pin: pinmux_P9_18_gpio_input_pin { pinctrl-single,pins = < P9_18_GPIO_INPUT >; };
- P9_18_spi_pin: pinmux_P9_18_spi_pin { pinctrl-single,pins = < P9_18_SPI >; };
+ P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = < P9_18_DEFAULT >; }; /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+ P9_18_gpio_pin: pinmux_P9_18_gpio_pin { pinctrl-single,pins = < P9_18_GPIO >; }; /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+ P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin { pinctrl-single,pins = < P9_18_GPIO_PU >; }; /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+ P9_18_gpio_pd_pin: pinmux_P9_18_gpio_pd_pin { pinctrl-single,pins = < P9_18_GPIO_PD >; }; /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+ P9_18_gpio_input_pin: pinmux_P9_18_gpio_input_pin { pinctrl-single,pins = < P9_18_GPIO_INPUT >; }; /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+ P9_18_spi_pin: pinmux_P9_18_spi_pin { pinctrl-single,pins = < P9_18_SPI >; }; /* spi2_d0.spi2_d0, mcasp1_axr0.off */
/* P9_18b (ball G12) gpio5_2 */
- P9_18_i2c_pin: pinmux_P9_18_i2c_pin { pinctrl-single,pins = < P9_18_I2C >; };
- P9_18_uart_pin: pinmux_P9_18_pru_uart_pin { pinctrl-single,pins = < P9_18_UART >; };
+ P9_18_i2c_pin: pinmux_P9_18_i2c_pin { pinctrl-single,pins = < P9_18_I2C >; }; /* mcasp1_axr0.i2c5_sda, spi2_d0.off */
+ P9_18_uart_pin: pinmux_P9_18_pru_uart_pin { pinctrl-single,pins = < P9_18_UART >; }; /* mcasp1_axr0.uart6_rxd, spi2_d0.off */
/* P9_19a (ball R6) gpio7_3 */
- P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = < P9_19_DEFAULT >; };
- P9_19_gpio_pin: pinmux_P9_19_gpio_pin { pinctrl-single,pins = < P9_19_GPIO >; };
- P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin { pinctrl-single,pins = < P9_19_GPIO_PU >; };
- P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin { pinctrl-single,pins = < P9_19_GPIO_PD >; };
- P9_19_gpio_input_pin: pinmux_P9_19_gpio_input_pin { pinctrl-single,pins = < P9_19_GPIO_INPUT >; };
- P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = < P9_19_I2C >; };
+ P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = < P9_19_DEFAULT >; }; /* gpmc_a0.gpio7_3, gpmc_a0.off */
+ P9_19_gpio_pin: pinmux_P9_19_gpio_pin { pinctrl-single,pins = < P9_19_GPIO >; }; /* gpmc_a0.gpio7_3, gpmc_a0.off */
+ P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin { pinctrl-single,pins = < P9_19_GPIO_PU >; }; /* gpmc_a0.gpio7_3, gpmc_a0.off */
+ P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin { pinctrl-single,pins = < P9_19_GPIO_PD >; }; /* gpmc_a0.gpio7_3, gpmc_a0.off */
+ P9_19_gpio_input_pin: pinmux_P9_19_gpio_input_pin { pinctrl-single,pins = < P9_19_GPIO_INPUT >; }; /* gpmc_a0.gpio7_3, gpmc_a0.off */
+ P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = < P9_19_I2C >; }; /* gpmc_a0.i2c4_scl, gpmc_a0.off */
/* P9_19b (ball F4) gpio4_6 */
- P9_19_qep_pin: pinmux_P9_19_qep_pin { pinctrl-single,pins = < P9_19_QEP >; };
+ P9_19_qep_pin: pinmux_P9_19_qep_pin { pinctrl-single,pins = < P9_19_QEP >; }; /* vin2a_d5.eQEP2A_in, gpmc_a0.off */
/* P9_20a (ball T9) gpio7_4 */
- P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = < P9_20_DEFAULT >; };
- P9_20_gpio_pin: pinmux_P9_20_gpio_pin { pinctrl-single,pins = < P9_20_GPIO >; };
- P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin { pinctrl-single,pins = < P9_20_GPIO_PU >; };
- P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin { pinctrl-single,pins = < P9_20_GPIO_PD >; };
- P9_20_gpio_input_pin: pinmux_P9_20_gpio_input_pin { pinctrl-single,pins = < P9_20_GPIO_INPUT >; };
- P9_20_i2c_pin: pinmux_P9_20_i2c_pin { pinctrl-single,pins = < P9_20_I2C >; };
+ P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = < P9_20_DEFAULT >; }; /* gpmc_a1.gpio7_4, vin2a_d4.off */
+ P9_20_gpio_pin: pinmux_P9_20_gpio_pin { pinctrl-single,pins = < P9_20_GPIO >; }; /* gpmc_a1.gpio7_4, vin2a_d4.off */
+ P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin { pinctrl-single,pins = < P9_20_GPIO_PU >; }; /* gpmc_a1.gpio7_4, vin2a_d4.off */
+ P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin { pinctrl-single,pins = < P9_20_GPIO_PD >; }; /* gpmc_a1.gpio7_4, vin2a_d4.off */
+ P9_20_gpio_input_pin: pinmux_P9_20_gpio_input_pin { pinctrl-single,pins = < P9_20_GPIO_INPUT >; }; /* gpmc_a1.gpio7_4, vin2a_d4.off */
+ P9_20_i2c_pin: pinmux_P9_20_i2c_pin { pinctrl-single,pins = < P9_20_I2C >; }; /* gpmc_a1.i2c4_sda, vin2a_d4.off */
/* P9_20b (ball D2) gpio4_5*/
- P9_20_pruout_pin: pinmux_P9_20_pruout_pin { pinctrl-single,pins = < P9_20_PRUOUT >; };
- P9_20_pruin_pin: pinmux_P9_20_pruin_pin { pinctrl-single,pins = < P9_20_PRUIN >; };
+ P9_20_pruout_pin: pinmux_P9_20_pruout_pin { pinctrl-single,pins = < P9_20_PRUOUT >; }; /* vin2a_d4.pr1_pru1_gpo1, gpmc_a1.off */
+ P9_20_pruin_pin: pinmux_P9_20_pruin_pin { pinctrl-single,pins = < P9_20_PRUIN >; }; /* vin2a_d4.pr1_pru1_gpi1, gpmc_a1.off */
/* P9_21a (ball AF8) gpio3_3 */
- P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = < P9_21_DEFAULT >; };
- P9_21_gpio_pin: pinmux_P9_21_gpio_pin { pinctrl-single,pins = < P9_21_GPIO >; };
- P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin { pinctrl-single,pins = < P9_21_GPIO_PU >; };
- P9_21_gpio_pd_pin: pinmux_P9_21_gpio_pd_pin { pinctrl-single,pins = < P9_21_GPIO_PD >; };
- P9_21_gpio_input_pin: pinmux_P9_21_gpio_input_pin { pinctrl-single,pins = < P9_21_GPIO_INPUT >; };
- P9_21_qep_pin: pinmux_P9_21_qep_pin { pinctrl-single,pins = < P9_21_QEP >; };
+ P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = < P9_21_DEFAULT >; }; /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+ P9_21_gpio_pin: pinmux_P9_21_gpio_pin { pinctrl-single,pins = < P9_21_GPIO >; }; /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+ P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin { pinctrl-single,pins = < P9_21_GPIO_PU >; }; /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+ P9_21_gpio_pd_pin: pinmux_P9_21_gpio_pd_pin { pinctrl-single,pins = < P9_21_GPIO_PD >; }; /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+ P9_21_gpio_input_pin: pinmux_P9_21_gpio_input_pin { pinctrl-single,pins = < P9_21_GPIO_INPUT >; }; /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+ P9_21_qep_pin: pinmux_P9_21_qep_pin { pinctrl-single,pins = < P9_21_QEP >; }; /* vin1a_vsync0.eQEP1_strobe,spi2_d1.off */
/* P9_21b (ball B22) gpio7_15 */
- P9_21_spi_pin: pinmux_P9_21_spi_pin { pinctrl-single,pins = < P9_21_SPI >; };
- P9_21_uart_pin: pinmux_P9_21_uart_pin { pinctrl-single,pins = < P9_21_UART >; };
+ P9_21_spi_pin: pinmux_P9_21_spi_pin { pinctrl-single,pins = < P9_21_SPI >; }; /* spi2_d1.spi2_d1, vin1a_vsync0.off */
+ P9_21_uart_pin: pinmux_P9_21_uart_pin { pinctrl-single,pins = < P9_21_UART >; }; /* spi2_d1.uart3_txd, vin1a_vsync0.off */
/* P9_22a (ball B26) gpio6_19 */
- P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = < P9_22_DEFAULT >; };
- P9_22_gpio_pin: pinmux_P9_22_gpio_pin { pinctrl-single,pins = < P9_22_GPIO >; };
- P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin { pinctrl-single,pins = < P9_22_GPIO_PU >; };
- P9_22_gpio_pd_pin: pinmux_P9_22_gpio_pd_pin { pinctrl-single,pins = < P9_22_GPIO_PD >; };
- P9_22_gpio_input_pin: pinmux_P9_22_gpio_input_pin { pinctrl-single,pins = < P9_22_GPIO_INPUT >; };
+ P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = < P9_22_DEFAULT >; }; /* xref_clk2.gpio6_19, spi2_sclk.off */
+ P9_22_gpio_pin: pinmux_P9_22_gpio_pin { pinctrl-single,pins = < P9_22_GPIO >; }; /* xref_clk2.gpio6_19, spi2_sclk.off */
+ P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin { pinctrl-single,pins = < P9_22_GPIO_PU >; }; /* xref_clk2.gpio6_19, spi2_sclk.off */
+ P9_22_gpio_pd_pin: pinmux_P9_22_gpio_pd_pin { pinctrl-single,pins = < P9_22_GPIO_PD >; }; /* xref_clk2.gpio6_19, spi2_sclk.off */
+ P9_22_gpio_input_pin: pinmux_P9_22_gpio_input_pin { pinctrl-single,pins = < P9_22_GPIO_INPUT >; }; /* xref_clk2.gpio6_19, spi2_sclk.off */
/* P9_22b (ball A26) gpio7_14 */
- P9_22_spi_sclk_pin: pinmux_P9_22_spi_sclk_pin { pinctrl-single,pins = < P9_22_SPI >; };
- P9_22_uart_pin: pinmux_P9_22_uart_pin { pinctrl-single,pins = < P9_22_UART >; };
+ P9_22_spi_sclk_pin: pinmux_P9_22_spi_sclk_pin { pinctrl-single,pins = < P9_22_SPI >; }; /* spi2_sclk.spi2_sclk, xref_clk2.off */
+ P9_22_uart_pin: pinmux_P9_22_uart_pin { pinctrl-single,pins = < P9_22_UART >; }; /* spi2_sclk.uart3_rxd, xref_clk2.off */
/* P9_23 (ball A22) gpio7_11 */
- P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = < P9_23_DEFAULT >; };
- P9_23_gpio_pin: pinmux_P9_23_gpio_pin { pinctrl-single,pins = < P9_23_GPIO >; };
- P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin { pinctrl-single,pins = < P9_23_GPIO_PU >; };
- P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin { pinctrl-single,pins = < P9_23_GPIO_PD >; };
- P9_23_gpio_input_pin: pinmux_P9_23_gpio_input_pin { pinctrl-single,pins = < P9_23_GPIO_INPUT >; };
+ P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = < P9_23_DEFAULT >; }; /* spi1_cs1.gpio7_11 */
+ P9_23_gpio_pin: pinmux_P9_23_gpio_pin { pinctrl-single,pins = < P9_23_GPIO >; }; /* spi1_cs1.gpio7_11 */
+ P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin { pinctrl-single,pins = < P9_23_GPIO_PU >; }; /* spi1_cs1.gpio7_11 */
+ P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin { pinctrl-single,pins = < P9_23_GPIO_PD >; }; /* spi1_cs1.gpio7_11 */
+ P9_23_gpio_input_pin: pinmux_P9_23_gpio_input_pin { pinctrl-single,pins = < P9_23_GPIO_INPUT >; }; /* spi1_cs1.gpio7_11 */
/* P9_24 (ball F20) gpio6_15*/
- P9_24_default_pin: pinmux_P9_24_default_pin { pinctrl-single,pins = < P9_24_DEFAULT >; };
- P9_24_gpio_pin: pinmux_P9_24_gpio_pin { pinctrl-single,pins = < P9_24_GPIO >; };
- P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin { pinctrl-single,pins = < P9_24_GPIO_PU >; };
- P9_24_gpio_pd_pin: pinmux_P9_24_gpio_pd_pin { pinctrl-single,pins = < P9_24_GPIO_PD >; };
- P9_24_gpio_input_pin: pinmux_P9_24_gpio_input_pin { pinctrl-single,pins = < P9_24_GPIO_INPUT >; };
- P9_24_uart_pin: pinmux_P9_24_uart_pin { pinctrl-single,pins = < P9_24_UART >; };
- P9_24_can_pin: pinmux_P9_24_can_pin { pinctrl-single,pins = < P9_24_CAN >; };
- P9_24_i2c_pin: pinmux_P9_24_i2c_pin { pinctrl-single,pins = < P9_24_I2C >; };
+ P9_24_default_pin: pinmux_P9_24_default_pin { pinctrl-single,pins = < P9_24_DEFAULT >; }; /* gpio6_15.gpio6_15 */
+ P9_24_gpio_pin: pinmux_P9_24_gpio_pin { pinctrl-single,pins = < P9_24_GPIO >; }; /* gpio6_15.gpio6_15 */
+ P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin { pinctrl-single,pins = < P9_24_GPIO_PU >; }; /* gpio6_15.gpio6_15 */
+ P9_24_gpio_pd_pin: pinmux_P9_24_gpio_pd_pin { pinctrl-single,pins = < P9_24_GPIO_PD >; }; /* gpio6_15.gpio6_15 */
+ P9_24_gpio_input_pin: pinmux_P9_24_gpio_input_pin { pinctrl-single,pins = < P9_24_GPIO_INPUT >; }; /* gpio6_15.gpio6_15 */
+ P9_24_uart_pin: pinmux_P9_24_uart_pin { pinctrl-single,pins = < P9_24_UART >; }; /* gpio6_15.uart10_txd */
+ P9_24_can_pin: pinmux_P9_24_can_pin { pinctrl-single,pins = < P9_24_CAN >; }; /* gpio6_15.dcan2_rx */
+ P9_24_i2c_pin: pinmux_P9_24_i2c_pin { pinctrl-single,pins = < P9_24_I2C >; }; /* gpio6_15.i2c3_scl */
/* P9_25 (ball D18) gpio6_17 */
- P9_25_default_pin: pinmux_P9_25_default_pin { pinctrl-single,pins = < P9_25_DEFAULT >; };
- P9_25_gpio_pin: pinmux_P9_25_gpio_pin { pinctrl-single,pins = < P9_25_GPIO >; };
- P9_25_gpio_pu_pin: pinmux_P9_25_gpio_pu_pin { pinctrl-single,pins = < P9_25_GPIO_PU >; };
- P9_25_gpio_pd_pin: pinmux_P9_25_gpio_pd_pin { pinctrl-single,pins = < P9_25_GPIO_PD >; };
- P9_25_gpio_input_pin: pinmux_P9_25_gpio_input_pin { pinctrl-single,pins = < P9_25_GPIO_INPUT >; };
- P9_25_pruout_pin: pinmux_P9_25_pruout_pin { pinctrl-single,pins = < P9_25_PRUOUT >; };
- P9_25_pruin_pin: pinmux_P9_25_pruin_pin { pinctrl-single,pins = < P9_25_PRUIN >; };
+ P9_25_default_pin: pinmux_P9_25_default_pin { pinctrl-single,pins = < P9_25_DEFAULT >; }; /* xref_clk0.gpio6_17 */
+ P9_25_gpio_pin: pinmux_P9_25_gpio_pin { pinctrl-single,pins = < P9_25_GPIO >; }; /* xref_clk0.gpio6_17 */
+ P9_25_gpio_pu_pin: pinmux_P9_25_gpio_pu_pin { pinctrl-single,pins = < P9_25_GPIO_PU >; }; /* xref_clk0.gpio6_17 */
+ P9_25_gpio_pd_pin: pinmux_P9_25_gpio_pd_pin { pinctrl-single,pins = < P9_25_GPIO_PD >; }; /* xref_clk0.gpio6_17 */
+ P9_25_gpio_input_pin: pinmux_P9_25_gpio_input_pin { pinctrl-single,pins = < P9_25_GPIO_INPUT >; }; /* xref_clk0.gpio6_17 */
+ P9_25_pruout_pin: pinmux_P9_25_pruout_pin { pinctrl-single,pins = < P9_25_PRUOUT >; }; /* xref_clk0.pr2_pru1_gpo5 */
+ P9_25_pruin_pin: pinmux_P9_25_pruin_pin { pinctrl-single,pins = < P9_25_PRUIN >; }; /* xref_clk0.pr2_pru1_gpi5 */
/* P9_26a (ball E21) gpio6_14 */
- P9_26_default_pin: pinmux_P9_26_default_pin { pinctrl-single,pins = < P9_26_DEFAULT >; };
- P9_26_gpio_pin: pinmux_P9_26_gpio_pin { pinctrl-single,pins = < P9_26_GPIO >; };
- P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin { pinctrl-single,pins = < P9_26_GPIO_PU >; };
- P9_26_gpio_pd_pin: pinmux_P9_26_gpio_pd_pin { pinctrl-single,pins = < P9_26_GPIO_PD >; };
- P9_26_gpio_input_pin: pinmux_P9_26_gpio_input_pin { pinctrl-single,pins = < P9_26_GPIO_INPUT >; };
- P9_26_uart_pin: pinmux_P9_26_uart_pin { pinctrl-single,pins = < P9_26_UART >; };
- P9_26_can_pin: pinmux_P9_26_can_pin { pinctrl-single,pins = < P9_26_CAN >; };
- P9_26_i2c_pin: pinmux_P9_26_i2c_pin { pinctrl-single,pins = < P9_26_I2C >; };
+ P9_26_default_pin: pinmux_P9_26_default_pin { pinctrl-single,pins = < P9_26_DEFAULT >; }; /* gpio6_14.gpio6_14, vin1a_d20.off */
+ P9_26_gpio_pin: pinmux_P9_26_gpio_pin { pinctrl-single,pins = < P9_26_GPIO >; }; /* gpio6_14.gpio6_14, vin1a_d20.off */
+ P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin { pinctrl-single,pins = < P9_26_GPIO_PU >; }; /* gpio6_14.gpio6_14, vin1a_d20.off */
+ P9_26_gpio_pd_pin: pinmux_P9_26_gpio_pd_pin { pinctrl-single,pins = < P9_26_GPIO_PD >; }; /* gpio6_14.gpio6_14, vin1a_d20.off */
+ P9_26_gpio_input_pin: pinmux_P9_26_gpio_input_pin { pinctrl-single,pins = < P9_26_GPIO_INPUT >; }; /* gpio6_14.gpio6_14, vin1a_d20.off */
+ P9_26_uart_pin: pinmux_P9_26_uart_pin { pinctrl-single,pins = < P9_26_UART >; }; /* gpio6_14.uart10_rxd, vin1a_d20.off */
+ P9_26_can_pin: pinmux_P9_26_can_pin { pinctrl-single,pins = < P9_26_CAN >; }; /* gpio6_14.dcan2_tx, vin1a_d20.off */
+ P9_26_i2c_pin: pinmux_P9_26_i2c_pin { pinctrl-single,pins = < P9_26_I2C >; }; /* gpio6_14.i2c3_sda, vin1a_d20.off */
/* P9_26b (ball AE2) gpio3_24 */
- P9_26_pruout_pin: pinmux_P9_26_pruout_pin { pinctrl-single,pins = < P9_26_PRUOUT >; };
- P9_26_pruin_pin: pinmux_P9_26_pruin_pin { pinctrl-single,pins = < P9_26_PRUIN >; };
+ P9_26_pruout_pin: pinmux_P9_26_pruout_pin { pinctrl-single,pins = < P9_26_PRUOUT >; }; /* vin1a_d20.pr1_pru0_gpo17, gpio6_14.off */
+ P9_26_pruin_pin: pinmux_P9_26_pruin_pin { pinctrl-single,pins = < P9_26_PRUIN >; }; /* vin1a_d20.pr1_pru0_gpi17, gpio6_14.off */
/* P9_27a (ball C3) gpio4_15 */
- P9_27_default_pin: pinmux_P9_27_default_pin { pinctrl-single,pins = < P9_27_DEFAULT >; };
- P9_27_gpio_pin: pinmux_P9_27_gpio_pin { pinctrl-single,pins = < P9_27_GPIO >; };
- P9_27_gpio_pu_pin: pinmux_P9_27_gpio_pu_pin { pinctrl-single,pins = < P9_27_GPIO_PU >; };
- P9_27_gpio_pd_pin: pinmux_P9_27_gpio_pd_pin { pinctrl-single,pins = < P9_27_GPIO_PD >; };
- P9_27_gpio_input_pin: pinmux_P9_27_gpio_input_pin { pinctrl-single,pins = < P9_27_GPIO_INPUT >; };
- P9_27_qep_pin: pinmux_P9_27_qep_pin { pinctrl-single,pins = < P9_27_QEP >; };
- P9_27_pruout_pin: pinmux_P9_27_pruout_pin { pinctrl-single,pins = < P9_27_PRUOUT >; };
- P9_27_pruin_pin: pinmux_P9_27_pruin_pin { pinctrl-single,pins = < P9_27_PRUIN >; };
+ P9_27_default_pin: pinmux_P9_27_default_pin { pinctrl-single,pins = < P9_27_DEFAULT >; }; /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+ P9_27_gpio_pin: pinmux_P9_27_gpio_pin { pinctrl-single,pins = < P9_27_GPIO >; }; /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+ P9_27_gpio_pu_pin: pinmux_P9_27_gpio_pu_pin { pinctrl-single,pins = < P9_27_GPIO_PU >; }; /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+ P9_27_gpio_pd_pin: pinmux_P9_27_gpio_pd_pin { pinctrl-single,pins = < P9_27_GPIO_PD >; }; /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+ P9_27_gpio_input_pin: pinmux_P9_27_gpio_input_pin { pinctrl-single,pins = < P9_27_GPIO_INPUT >; }; /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+ P9_27_qep_pin: pinmux_P9_27_qep_pin { pinctrl-single,pins = < P9_27_QEP >; }; /* vin2a_d14.eQEP3B_in, mcasp1_fsr.off */
+ P9_27_pruout_pin: pinmux_P9_27_pruout_pin { pinctrl-single,pins = < P9_27_PRUOUT >; }; /* vin2a_d14.pr1_pru1_gpo11, mcasp1_fsr.off */
+ P9_27_pruin_pin: pinmux_P9_27_pruin_pin { pinctrl-single,pins = < P9_27_PRUIN >; }; /* vin2a_d14.pr1_pru1_gpi11, mcasp1_fsr.off */
/* P9_27b (ball J14) gpio5_1 */
/* P9_28 (ball A12) gpio4_17 */
- P9_28_default_pin: pinmux_P9_28_default_pin { pinctrl-single,pins = < P9_28_DEFAULT >; };
- P9_28_gpio_pin: pinmux_P9_28_gpio_pin { pinctrl-single,pins = < P9_28_GPIO >; };
- P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin { pinctrl-single,pins = < P9_28_GPIO_PU >; };
- P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin { pinctrl-single,pins = < P9_28_GPIO_PD >; };
- P9_28_gpio_input_pin: pinmux_P9_28_gpio_input_pin { pinctrl-single,pins = < P9_28_GPIO_INPUT >; };
- P9_28_spi_cs_pin: pinmux_P9_28_spi_cs_pin { pinctrl-single,pins = < P9_28_SPI >; };
- P9_28_pruout_pin: pinmux_P9_28_pruout_pin { pinctrl-single,pins = < P9_28_PRUOUT >; };
- P9_28_pruin_pin: pinmux_P9_28_pruin_pin { pinctrl-single,pins = < P9_28_PRUIN >; };
+ P9_28_default_pin: pinmux_P9_28_default_pin { pinctrl-single,pins = < P9_28_DEFAULT >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28_gpio_pin: pinmux_P9_28_gpio_pin { pinctrl-single,pins = < P9_28_GPIO >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin { pinctrl-single,pins = < P9_28_GPIO_PU >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin { pinctrl-single,pins = < P9_28_GPIO_PD >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28_gpio_input_pin: pinmux_P9_28_gpio_input_pin { pinctrl-single,pins = < P9_28_GPIO_INPUT >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28_spi_cs_pin: pinmux_P9_28_spi_cs_pin { pinctrl-single,pins = < P9_28_SPI >; }; /* mcasp1_axr11.spi3_cs0 */
+ P9_28_pruout_pin: pinmux_P9_28_pruout_pin { pinctrl-single,pins = < P9_28_PRUOUT >; }; /* mcasp1_axr11.pr2_pru1_gpo13 */
+ P9_28_pruin_pin: pinmux_P9_28_pruin_pin { pinctrl-single,pins = < P9_28_PRUIN >; }; /* mcasp1_axr11.pr2_pru1_gpi13 */
/* P9_29a (ball A11) gpio5_11*/
- P9_29_default_pin: pinmux_P9_29_default_pin { pinctrl-single,pins = < P9_29_DEFAULT >; };
- P9_29_gpio_pin: pinmux_P9_29_gpio_pin { pinctrl-single,pins = < P9_29_GPIO >; };
- P9_29_gpio_pu_pin: pinmux_P9_29_gpio_pu_pin { pinctrl-single,pins = < P9_29_GPIO_PU >; };
- P9_29_gpio_pd_pin: pinmux_P9_29_gpio_pd_pin { pinctrl-single,pins = < P9_29_GPIO_PD >; };
- P9_29_gpio_input_pin: pinmux_P9_29_gpio_input_pin { pinctrl-single,pins = < P9_29_GPIO_INPUT >; };
- P9_29_spi_pin: pinmux_P9_29_spi_pin { pinctrl-single,pins = < P9_29_SPI >; };
- P9_29_pruout_pin: pinmux_P9_29_pruout_pin { pinctrl-single,pins = < P9_29_PRUOUT >; };
- P9_29_pruin_pin: pinmux_P9_29_pruin_pin { pinctrl-single,pins = < P9_29_PRUIN >; };
+ P9_29_default_pin: pinmux_P9_29_default_pin { pinctrl-single,pins = < P9_29_DEFAULT >; }; /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
+ P9_29_gpio_pin: pinmux_P9_29_gpio_pin { pinctrl-single,pins = < P9_29_GPIO >; }; /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
+ P9_29_gpio_pu_pin: pinmux_P9_29_gpio_pu_pin { pinctrl-single,pins = < P9_29_GPIO_PU >; }; /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
+ P9_29_gpio_pd_pin: pinmux_P9_29_gpio_pd_pin { pinctrl-single,pins = < P9_29_GPIO_PD >; }; /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
+ P9_29_gpio_input_pin: pinmux_P9_29_gpio_input_pin { pinctrl-single,pins = < P9_29_GPIO_INPUT >; }; /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
+ P9_29_spi_pin: pinmux_P9_29_spi_pin { pinctrl-single,pins = < P9_29_SPI >; }; /* mcasp1_axr9.spi3_d1, mcasp1_fsx.off */
+ P9_29_pruout_pin: pinmux_P9_29_pruout_pin { pinctrl-single,pins = < P9_29_PRUOUT >; }; /* mcasp1_axr9.pr2_pru1_gpo11, mcasp1_fsx.off */
+ P9_29_pruin_pin: pinmux_P9_29_pruin_pin { pinctrl-single,pins = < P9_29_PRUIN >; }; /* mcasp1_axr9.pr2_pru1_gpi11, mcasp1_fsx.off */
/* P9_29b (ball D14) gpio7_30 */
/* P9_30 (ball B13) gpio5_12*/
- P9_30_default_pin: pinmux_P9_30_default_pin { pinctrl-single,pins = < P9_30_DEFAULT >; };
- P9_30_gpio_pin: pinmux_P9_30_gpio_pin { pinctrl-single,pins = < P9_30_GPIO >; };
- P9_30_gpio_pu_pin: pinmux_P9_30_gpio_pu_pin { pinctrl-single,pins = < P9_30_GPIO_PU >; };
- P9_30_gpio_pd_pin: pinmux_P9_30_gpio_pd_pin { pinctrl-single,pins = < P9_30_GPIO_PD >; };
- P9_30_gpio_input_pin: pinmux_P9_30_gpio_input_pin { pinctrl-single,pins = < P9_30_GPIO_INPUT >; };
- P9_30_spi_pin: pinmux_P9_30_spi_pin { pinctrl-single,pins = < P9_30_SPI >; };
- P9_30_pruout_pin: pinmux_P9_30_pruout_pin { pinctrl-single,pins = < P9_30_PRUOUT >; };
- P9_30_pruin_pin: pinmux_P9_30_pruin_pin { pinctrl-single,pins = < P9_30_PRUIN >; };
+ P9_30_default_pin: pinmux_P9_30_default_pin { pinctrl-single,pins = < P9_30_DEFAULT >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30_gpio_pin: pinmux_P9_30_gpio_pin { pinctrl-single,pins = < P9_30_GPIO >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30_gpio_pu_pin: pinmux_P9_30_gpio_pu_pin { pinctrl-single,pins = < P9_30_GPIO_PU >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30_gpio_pd_pin: pinmux_P9_30_gpio_pd_pin { pinctrl-single,pins = < P9_30_GPIO_PD >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30_gpio_input_pin: pinmux_P9_30_gpio_input_pin { pinctrl-single,pins = < P9_30_GPIO_INPUT >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30_spi_pin: pinmux_P9_30_spi_pin { pinctrl-single,pins = < P9_30_SPI >; }; /* mcasp1_axr10.spi3_d0 */
+ P9_30_pruout_pin: pinmux_P9_30_pruout_pin { pinctrl-single,pins = < P9_30_PRUOUT >; }; /* mcasp1_axr10.pr2_pru1_gpo12 */
+ P9_30_pruin_pin: pinmux_P9_30_pruin_pin { pinctrl-single,pins = < P9_30_PRUIN >; }; /* mcasp1_axr10.pr2_pru1_gpi12 */
/* P9_31a (ball B12) gpio5_10 */
- P9_31_default_pin: pinmux_P9_31_default_pin { pinctrl-single,pins = < P9_31_DEFAULT >; };
- P9_31_gpio_pin: pinmux_P9_31_gpio_pin { pinctrl-single,pins = < P9_31_GPIO >; };
- P9_31_gpio_pu_pin: pinmux_P9_31_gpio_pu_pin { pinctrl-single,pins = < P9_31_GPIO_PU >; };
- P9_31_gpio_pd_pin: pinmux_P9_31_gpio_pd_pin { pinctrl-single,pins = < P9_31_GPIO_PD >; };
- P9_31_gpio_input_pin: pinmux_P9_31_gpio_input_pin { pinctrl-single,pins = < P9_31_GPIO_INPUT >; };
- P9_31_spi_sclk_pin: pinmux_P9_31_spi_sclk_pin { pinctrl-single,pins = < P9_31_SPI >; };
- P9_31_pruout_pin: pinmux_P9_31_pruout_pin { pinctrl-single,pins = < P9_31_PRUOUT >; };
- P9_31_pruin_pin: pinmux_P9_31_pruin_pin { pinctrl-single,pins = < P9_31_PRUIN >; };
+ P9_31_default_pin: pinmux_P9_31_default_pin { pinctrl-single,pins = < P9_31_DEFAULT >; }; /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
+ P9_31_gpio_pin: pinmux_P9_31_gpio_pin { pinctrl-single,pins = < P9_31_GPIO >; }; /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
+ P9_31_gpio_pu_pin: pinmux_P9_31_gpio_pu_pin { pinctrl-single,pins = < P9_31_GPIO_PU >; }; /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
+ P9_31_gpio_pd_pin: pinmux_P9_31_gpio_pd_pin { pinctrl-single,pins = < P9_31_GPIO_PD >; }; /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
+ P9_31_gpio_input_pin: pinmux_P9_31_gpio_input_pin { pinctrl-single,pins = < P9_31_GPIO_INPUT >; }; /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
+ P9_31_spi_sclk_pin: pinmux_P9_31_spi_sclk_pin { pinctrl-single,pins = < P9_31_SPI >; }; /* mcasp1_axr8.spi3_sclk, mcasp1_aclkx.off */
+ P9_31_pruout_pin: pinmux_P9_31_pruout_pin { pinctrl-single,pins = < P9_31_PRUOUT >; }; /* mcasp1_axr8.pr2_pru1_gpo10, mcasp1_aclkx.off */
+ P9_31_pruin_pin: pinmux_P9_31_pruin_pin { pinctrl-single,pins = < P9_31_PRUIN >; }; /* mcasp1_axr8.pr2_pru1_gpi10, mcasp1_aclkx.off */
/* P9_31b (ball C14) gpio7_31*/
@@ -671,27 +671,27 @@
/* P9_40 AIN1*/
/* P9_41a (ball C23) gpio6_20 */
- P9_41_default_pin: pinmux_P9_41_default_pin { pinctrl-single,pins = < P9_41_DEFAULT >; };
- P9_41_gpio_pin: pinmux_P9_41_gpio_pin { pinctrl-single,pins = < P9_41_GPIO >; };
- P9_41_gpio_pu_pin: pinmux_P9_41_gpio_pu_pin { pinctrl-single,pins = < P9_41_GPIO_PU >; };
- P9_41_gpio_pd_pin: pinmux_P9_41_gpio_pd_pin { pinctrl-single,pins = < P9_41_GPIO_PD >; };
- P9_41_gpio_input_pin: pinmux_P9_41_gpio_input_pin { pinctrl-single,pins = < P9_41_GPIO_INPUT >; };
+ P9_41_default_pin: pinmux_P9_41_default_pin { pinctrl-single,pins = < P9_41_DEFAULT >; }; /* xref_clk3.gpio6_20, vin2a_d6.off */
+ P9_41_gpio_pin: pinmux_P9_41_gpio_pin { pinctrl-single,pins = < P9_41_GPIO >; }; /* xref_clk3.gpio6_20, vin2a_d6.off */
+ P9_41_gpio_pu_pin: pinmux_P9_41_gpio_pu_pin { pinctrl-single,pins = < P9_41_GPIO_PU >; }; /* xref_clk3.gpio6_20, vin2a_d6.off */
+ P9_41_gpio_pd_pin: pinmux_P9_41_gpio_pd_pin { pinctrl-single,pins = < P9_41_GPIO_PD >; }; /* xref_clk3.gpio6_20, vin2a_d6.off */
+ P9_41_gpio_input_pin: pinmux_P9_41_gpio_input_pin { pinctrl-single,pins = < P9_41_GPIO_INPUT >; }; /* xref_clk3.gpio6_20, vin2a_d6.off */
/* P9_41b (ball C1) gpio4_7 */
- P9_41_pruout_pin: pinmux_P9_41_pruout_pin { pinctrl-single,pins = < P9_41_PRUOUT >; };
- P9_41_pruin_pin: pinmux_P9_41_pruin_pin { pinctrl-single,pins = < P9_41_PRUIN >; };
+ P9_41_pruout_pin: pinmux_P9_41_pruout_pin { pinctrl-single,pins = < P9_41_PRUOUT >; }; /* vin2a_d6.pr1_pru1_gpo3, xref_clk3.off */
+ P9_41_pruin_pin: pinmux_P9_41_pruin_pin { pinctrl-single,pins = < P9_41_PRUIN >; }; /* vin2a_d6.pr1_pru1_gpi3, xref_clk3.off */
/* P9_42a (ball E14) gpio4_18 */
- P9_42_default_pin: pinmux_P9_42_default_pin { pinctrl-single,pins = < P9_42_DEFAULT >; };
- P9_42_gpio_pin: pinmux_P9_42_gpio_pin { pinctrl-single,pins = < P9_42_GPIO >; };
- P9_42_gpio_pu_pin: pinmux_P9_42_gpio_pu_pin { pinctrl-single,pins = < P9_42_GPIO_PU >; };
- P9_42_gpio_pd_pin: pinmux_P9_42_gpio_pd_pin { pinctrl-single,pins = < P9_42_GPIO_PD >; };
- P9_42_gpio_input_pin: pinmux_P9_42_gpio_input_pin { pinctrl-single,pins = < P9_42_GPIO_INPUT >; };
- P9_42_spi_cs_pin: pinmux_P9_42_spi_cs_pin { pinctrl-single,pins = < P9_42_SPI >; };
+ P9_42_default_pin: pinmux_P9_42_default_pin { pinctrl-single,pins = < P9_42_DEFAULT >; }; /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+ P9_42_gpio_pin: pinmux_P9_42_gpio_pin { pinctrl-single,pins = < P9_42_GPIO >; }; /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+ P9_42_gpio_pu_pin: pinmux_P9_42_gpio_pu_pin { pinctrl-single,pins = < P9_42_GPIO_PU >; }; /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+ P9_42_gpio_pd_pin: pinmux_P9_42_gpio_pd_pin { pinctrl-single,pins = < P9_42_GPIO_PD >; }; /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+ P9_42_gpio_input_pin: pinmux_P9_42_gpio_input_pin { pinctrl-single,pins = < P9_42_GPIO_INPUT >; }; /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+ P9_42_spi_cs_pin: pinmux_P9_42_spi_cs_pin { pinctrl-single,pins = < P9_42_SPI >; }; /* mcasp1_axr12.spi3_cs1, vin2a_d13.off */
/* P9_42b (ball C2) gpio4_14*/
- P9_42_pruout_pin: pinmux_P9_42_pruout_pin { pinctrl-single,pins = < P9_42_PRUOUT >; };
- P9_42_pruin_pin: pinmux_P9_42_pruin_pin { pinctrl-single,pins = < P9_42_PRUIN >; };
+ P9_42_pruout_pin: pinmux_P9_42_pruout_pin { pinctrl-single,pins = < P9_42_PRUOUT >; }; /* vin2a_d13.pr1_pru1_gpo10, mcasp1_axr12.off */
+ P9_42_pruin_pin: pinmux_P9_42_pruin_pin { pinctrl-single,pins = < P9_42_PRUIN >; }; /* vin2a_d13.pr1_pru1_gpi10, mcasp1_axr12.off */
/* P9_43 GND */
@@ -1349,7 +1349,7 @@
P9_17_pinmux {
compatible = "bone-pinmux-helper";
status = "okay";
- pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "i2c";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "i2c", "uart";
pinctrl-0 = <&P9_17_default_pin>;
pinctrl-1 = <&P9_17_gpio_pin>;
pinctrl-2 = <&P9_17_gpio_pu_pin>;
@@ -1357,12 +1357,13 @@
pinctrl-4 = <&P9_17_gpio_input_pin>;
pinctrl-5 = <&P9_17_spi_cs_pin>;
pinctrl-6 = <&P9_17_i2c_pin>;
+ pinctrl-7 = <&P9_17_uart_pin>;
};
P9_18_pinmux {
compatible = "bone-pinmux-helper";
status = "okay";
- pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "i2c";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "i2c", "uart";
pinctrl-0 = <&P9_18_default_pin>;
pinctrl-1 = <&P9_18_gpio_pin>;
pinctrl-2 = <&P9_18_gpio_pu_pin>;
@@ -1370,30 +1371,34 @@
pinctrl-4 = <&P9_18_gpio_input_pin>;
pinctrl-5 = <&P9_18_spi_pin>;
pinctrl-6 = <&P9_18_i2c_pin>;
+ pinctrl-7 = <&P9_18_uart_pin>;
};
P9_19_pinmux {
compatible = "bone-pinmux-helper";
status = "okay";
- pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "i2c";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "i2c", "qep";
pinctrl-0 = <&P9_19_default_pin>;
pinctrl-1 = <&P9_19_gpio_pin>;
pinctrl-2 = <&P9_19_gpio_pu_pin>;
pinctrl-3 = <&P9_19_gpio_pd_pin>;
pinctrl-4 = <&P9_19_gpio_input_pin>;
pinctrl-5 = <&P9_19_i2c_pin>;
+ pinctrl-6 = <&P9_19_qep_pin>;
};
P9_20_pinmux {
compatible = "bone-pinmux-helper";
status = "okay";
- pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "i2c";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "i2c", "pruout", "pruin";
pinctrl-0 = <&P9_20_default_pin>;
pinctrl-1 = <&P9_20_gpio_pin>;
pinctrl-2 = <&P9_20_gpio_pu_pin>;
pinctrl-3 = <&P9_20_gpio_pd_pin>;
pinctrl-4 = <&P9_20_gpio_input_pin>;
pinctrl-5 = <&P9_20_i2c_pin>;
+ pinctrl-6 = <&P9_20_pruout_pin>;
+ pinctrl-7 = <&P9_20_pruin_pin>;
};
P9_21_pinmux {
@@ -1436,7 +1441,7 @@
P9_24_pinmux {
compatible = "bone-pinmux-helper";
status = "okay";
- pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c";
pinctrl-0 = <&P9_24_default_pin>;
pinctrl-1 = <&P9_24_gpio_pin>;
pinctrl-2 = <&P9_24_gpio_pu_pin>;
@@ -1444,6 +1449,7 @@
pinctrl-4 = <&P9_24_gpio_input_pin>;
pinctrl-5 = <&P9_24_uart_pin>;
pinctrl-6 = <&P9_24_can_pin>;
+ pinctrl-7 = <&P9_24_i2c_pin>;
};
P9_25_pinmux {
@@ -1462,7 +1468,7 @@
P9_26_pinmux {
compatible = "bone-pinmux-helper";
status = "okay";
- pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pruin";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pruout", "pruin";
pinctrl-0 = <&P9_26_default_pin>;
pinctrl-1 = <&P9_26_gpio_pin>;
pinctrl-2 = <&P9_26_gpio_pu_pin>;
@@ -1471,7 +1477,8 @@
pinctrl-5 = <&P9_26_uart_pin>;
pinctrl-6 = <&P9_26_can_pin>;
pinctrl-7 = <&P9_26_i2c_pin>;
- pinctrl-8 = <&P9_26_pruin_pin>;
+ pinctrl-8 = <&P9_26_pruout_pin>;
+ pinctrl-9 = <&P9_26_pruin_pin>;
};
P9_27_pinmux {
@@ -1565,24 +1572,28 @@
P9_41_pinmux {
compatible = "bone-pinmux-helper";
status = "okay";
- pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruin";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
pinctrl-0 = <&P9_41_default_pin>;
pinctrl-1 = <&P9_41_gpio_pin>;
pinctrl-2 = <&P9_41_gpio_pu_pin>;
pinctrl-3 = <&P9_41_gpio_pd_pin>;
pinctrl-4 = <&P9_41_gpio_input_pin>;
- pinctrl-5 = <&P9_41_pruin_pin>;
+ pinctrl-5 = <&P9_41_pruout_pin>;
+ pinctrl-6 = <&P9_41_pruin_pin>;
};
P9_42_pinmux {
compatible = "bone-pinmux-helper";
status = "okay";
- pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pruout", "pruin";
pinctrl-0 = <&P9_42_default_pin>;
pinctrl-1 = <&P9_42_gpio_pin>;
pinctrl-2 = <&P9_42_gpio_pu_pin>;
pinctrl-3 = <&P9_42_gpio_pd_pin>;
pinctrl-4 = <&P9_42_gpio_input_pin>;
+ pinctrl-5 = <&P9_42_spi_cs_pin>;
+ pinctrl-6 = <&P9_42_pruout_pin>;
+ pinctrl-7 = <&P9_42_pruin_pin>;
};
/* P9_43 GND */
--
GitLab
From be2da4340ae09c04d767ea7cab94b0668a43619d Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Sat, 11 Jul 2020 17:02:02 +0530
Subject: [PATCH 27/86] add comments
---
include/dt-bindings/board/am572x-bbai-pins.h | 636 +++++++++----------
1 file changed, 318 insertions(+), 318 deletions(-)
diff --git a/include/dt-bindings/board/am572x-bbai-pins.h b/include/dt-bindings/board/am572x-bbai-pins.h
index 21e7afb9..ac58031d 100644
--- a/include/dt-bindings/board/am572x-bbai-pins.h
+++ b/include/dt-bindings/board/am572x-bbai-pins.h
@@ -114,98 +114,98 @@
/* P8_02 GND */
/* P8_03 (ball AB8) gpio1_24 */
-#define P8_03_DEFAULT P8_03( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
-#define P8_03_GPIO P8_03( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
-#define P8_03_GPIO_PU P8_03( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
-#define P8_03_GPIO_PD P8_03( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
-#define P8_03_GPIO_INPUT P8_03( PIN_INPUT | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
+#define P8_03_DEFAULT P8_03( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
+#define P8_03_GPIO P8_03( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
+#define P8_03_GPIO_PU P8_03( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
+#define P8_03_GPIO_PD P8_03( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
+#define P8_03_GPIO_INPUT P8_03( PIN_INPUT | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
/* P8_04 (ball AB5) gpio1_25 */
-#define P8_04_DEFAULT P8_04( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
-#define P8_04_GPIO P8_04( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
-#define P8_04_GPIO_PU P8_04( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
-#define P8_04_GPIO_PD P8_04( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
-#define P8_04_GPIO_INPUT P8_04( PIN_INPUT | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
+#define P8_04_DEFAULT P8_04( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
+#define P8_04_GPIO P8_04( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
+#define P8_04_GPIO_PU P8_04( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
+#define P8_04_GPIO_PD P8_04( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
+#define P8_04_GPIO_INPUT P8_04( PIN_INPUT | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
/* P8_05 (ball AC9) gpio7_1 */
-#define P8_05_DEFAULT P8_05( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
-#define P8_05_GPIO P8_05( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
-#define P8_05_GPIO_PU P8_05( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
-#define P8_05_GPIO_PD P8_05( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
-#define P8_05_GPIO_INPUT P8_05( PIN_INPUT | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
+#define P8_05_DEFAULT P8_05( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
+#define P8_05_GPIO P8_05( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
+#define P8_05_GPIO_PU P8_05( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
+#define P8_05_GPIO_PD P8_05( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
+#define P8_05_GPIO_INPUT P8_05( PIN_INPUT | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
/* P8_06 (ball AC3) gpio7_2 */
-#define P8_06_DEFAULT P8_06( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
-#define P8_06_GPIO P8_06( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
-#define P8_06_GPIO_PU P8_06( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
-#define P8_06_GPIO_PD P8_06( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
-#define P8_06_GPIO_INPUT P8_06( PIN_INPUT | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
+#define P8_06_DEFAULT P8_06( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
+#define P8_06_GPIO P8_06( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
+#define P8_06_GPIO_PU P8_06( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
+#define P8_06_GPIO_PD P8_06( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
+#define P8_06_GPIO_INPUT P8_06( PIN_INPUT | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
/* P8_07 (ball G14) gpio6_5*/
-#define P8_07_DEFAULT P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
-#define P8_07_GPIO P8_07( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
-#define P8_07_GPIO_PU P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
-#define P8_07_GPIO_PD P8_07( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
-#define P8_07_GPIO_INPUT P8_07( PIN_INPUT | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
-#define P8_07_TIMER P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* mcasp1_axr14.timer11 */
+#define P8_07_DEFAULT P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
+#define P8_07_GPIO P8_07( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
+#define P8_07_GPIO_PU P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
+#define P8_07_GPIO_PD P8_07( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
+#define P8_07_GPIO_INPUT P8_07( PIN_INPUT | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
+#define P8_07_TIMER P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* mcasp1_axr14.timer11 */
/* P8_08 (ball F14) gpio6_6 */
-#define P8_08_DEFAULT P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
-#define P8_08_GPIO P8_08( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
-#define P8_08_GPIO_PU P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
-#define P8_08_GPIO_PD P8_08( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
-#define P8_08_GPIO_INPUT P8_08( PIN_INPUT | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
-#define P8_08_TIMER P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* mcasp1_axr15.timer12 */
+#define P8_08_DEFAULT P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
+#define P8_08_GPIO P8_08( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
+#define P8_08_GPIO_PU P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
+#define P8_08_GPIO_PD P8_08( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
+#define P8_08_GPIO_INPUT P8_08( PIN_INPUT | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
+#define P8_08_TIMER P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* mcasp1_axr15.timer12 */
/* P8_09 (ball E17) gpio6_18 */
-#define P8_09_DEFAULT P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* xref_clk1.gpio6_18 */
-#define P8_09_GPIO P8_09( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* xref_clk1.gpio6_18 */
-#define P8_09_GPIO_PU P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* xref_clk1.gpio6_18 */
-#define P8_09_GPIO_PD P8_09( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* xref_clk1.gpio6_18 */
-#define P8_09_GPIO_INPUT P8_09( PIN_INPUT | MUX_MODE14) /* xref_clk1.gpio6_18 */
-#define P8_09_TIMER P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* xref_clk1.timer14 */
+#define P8_09_DEFAULT P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* xref_clk1.gpio6_18 */
+#define P8_09_GPIO P8_09( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* xref_clk1.gpio6_18 */
+#define P8_09_GPIO_PU P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* xref_clk1.gpio6_18 */
+#define P8_09_GPIO_PD P8_09( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* xref_clk1.gpio6_18 */
+#define P8_09_GPIO_INPUT P8_09( PIN_INPUT | MUX_MODE14) /* xref_clk1.gpio6_18 */
+#define P8_09_TIMER P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* xref_clk1.timer14 */
/* P8_10 (ball A13) gpio6_4 */
-#define P8_10_DEFAULT P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
-#define P8_10_GPIO P8_10( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
-#define P8_10_GPIO_PU P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
-#define P8_10_GPIO_PD P8_10( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
-#define P8_10_GPIO_INPUT P8_10( PIN_INPUT | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
-#define P8_10_TIMER P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* mcasp1_axr13.timer10 */
+#define P8_10_DEFAULT P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
+#define P8_10_GPIO P8_10( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
+#define P8_10_GPIO_PU P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
+#define P8_10_GPIO_PD P8_10( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
+#define P8_10_GPIO_INPUT P8_10( PIN_INPUT | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
+#define P8_10_TIMER P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* mcasp1_axr13.timer10 */
/* P8_11 (ball AH4) gpio3_11 */
-#define P8_11_DEFAULT P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d7.gpio3_11 */
-#define P8_11_GPIO P8_11( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin1a_d7.gpio3_11 */
-#define P8_11_GPIO_PU P8_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin1a_d7.gpio3_11 */
-#define P8_11_GPIO_PD P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d7.gpio3_11 */
-#define P8_11_GPIO_INPUT P8_11( PIN_INPUT | MUX_MODE14) /* vin1a_d7.gpio3_11 */
-#define P8_11_QEP P8_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* vin1a_d7.eQEP2B_in */
-#define P8_11_PRUOUT P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vin1a_d7.pr1_pru0_gpo4 */
+#define P8_11_DEFAULT P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d7.gpio3_11 */
+#define P8_11_GPIO P8_11( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin1a_d7.gpio3_11 */
+#define P8_11_GPIO_PU P8_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin1a_d7.gpio3_11 */
+#define P8_11_GPIO_PD P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d7.gpio3_11 */
+#define P8_11_GPIO_INPUT P8_11( PIN_INPUT | MUX_MODE14) /* vin1a_d7.gpio3_11 */
+#define P8_11_QEP P8_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* vin1a_d7.eQEP2B_in */
+#define P8_11_PRUOUT P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vin1a_d7.pr1_pru0_gpo4 */
/* P8_12 (ball AG6) gpio3_10 */
-#define P8_12_DEFAULT P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d6.gpio3_10 */
-#define P8_12_GPIO P8_12( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin1a_d6.gpio3_10 */
-#define P8_12_GPIO_PU P8_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin1a_d6.gpio3_10 */
-#define P8_12_GPIO_PD P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d6.gpio3_10 */
-#define P8_12_GPIO_INPUT P8_12( PIN_INPUT | MUX_MODE14) /* vin1a_d6.gpio3_10 */
-#define P8_12_QEP P8_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* vin1a_d6.eQEP2A_in */
-#define P8_12_TIMER P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vin1a_d6.pr1_pru0_gpo3 */
+#define P8_12_DEFAULT P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d6.gpio3_10 */
+#define P8_12_GPIO P8_12( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin1a_d6.gpio3_10 */
+#define P8_12_GPIO_PU P8_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin1a_d6.gpio3_10 */
+#define P8_12_GPIO_PD P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d6.gpio3_10 */
+#define P8_12_GPIO_INPUT P8_12( PIN_INPUT | MUX_MODE14) /* vin1a_d6.gpio3_10 */
+#define P8_12_QEP P8_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* vin1a_d6.eQEP2A_in */
+#define P8_12_PRUOUT P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vin1a_d6.pr1_pru0_gpo3 */
/* P8_13 (ball D3) gpio4_11 */
-#define P8_13_DEFAULT P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d10.gpio4_11 */
-#define P8_13_GPIO P8_13( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d10.gpio4_11 */
-#define P8_13_GPIO_PU P8_13( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d10.gpio4_11 */
-#define P8_13_GPIO_PD P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d10.gpio4_11 */
-#define P8_13_GPIO_INPUT P8_13( PIN_INPUT | MUX_MODE14) /* vin2a_d10.gpio4_11 */
-#define P8_13_PWM P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d10.ehrpwm2B */
+#define P8_13_DEFAULT P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d10.gpio4_11 */
+#define P8_13_GPIO P8_13( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d10.gpio4_11 */
+#define P8_13_GPIO_PU P8_13( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d10.gpio4_11 */
+#define P8_13_GPIO_PD P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d10.gpio4_11 */
+#define P8_13_GPIO_INPUT P8_13( PIN_INPUT | MUX_MODE14) /* vin2a_d10.gpio4_11 */
+#define P8_13_PWM P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d10.ehrpwm2B */
/* P8_14 (ball D5) gpio4_13*/
-#define P8_14_DEFAULT P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d12.gpio4_13 */
-#define P8_14_GPIO P8_14( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d12.gpio4_13 */
-#define P8_14_GPIO_PU P8_14( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d12.gpio4_13 */
-#define P8_14_GPIO_PD P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d12.gpio4_13 */
-#define P8_14_GPIO_INPUT P8_14( PIN_INPUT | MUX_MODE14) /* vin2a_d12.gpio4_13 */
-#define P8_14_PWM P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d12.eCAP2_in_PWM2_out */
+#define P8_14_DEFAULT P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d12.gpio4_13 */
+#define P8_14_GPIO P8_14( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d12.gpio4_13 */
+#define P8_14_GPIO_PU P8_14( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d12.gpio4_13 */
+#define P8_14_GPIO_PD P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d12.gpio4_13 */
+#define P8_14_GPIO_INPUT P8_14( PIN_INPUT | MUX_MODE14) /* vin2a_d12.gpio4_13 */
+#define P8_14_PWM P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d12.eCAP2_in_PWM2_out */
/* P8_15 (ball D1) gpio4_3 & (ball A3) gpio4_27*/
#define P8_15_DEFAULT P8_15A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_15B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d2.gpio4_3, vin2a_d19.off */
@@ -217,88 +217,88 @@
#define P8_15_PRUIN P8_15B( PIN_INPUT | MUX_MODE12) P8_15A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d19.pr1_pru1_gpi16, vin2a_d2.off */
/* P8_16 (ball B4) gpio4_29 */
-#define P8_16_DEFAULT P8_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d21.gpio4_29 */
-#define P8_16_GPIO P8_16( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d21.gpio4_29 */
-#define P8_16_GPIO_PU P8_16( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d21.gpio4_29 */
-#define P8_16_GPIO_PD P8_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d21.gpio4_29 */
-#define P8_16_GPIO_INPUT P8_16( PIN_INPUT | MUX_MODE14) /* vin2a_d21.gpio4_29 */
-#define P8_16_PRUIN P8_16( PIN_INPUT | MUX_MODE12) /* vin2a_d21.pr1_pru1_gpi18 */
+#define P8_16_DEFAULT P8_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d21.gpio4_29 */
+#define P8_16_GPIO P8_16( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d21.gpio4_29 */
+#define P8_16_GPIO_PU P8_16( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d21.gpio4_29 */
+#define P8_16_GPIO_PD P8_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d21.gpio4_29 */
+#define P8_16_GPIO_INPUT P8_16( PIN_INPUT | MUX_MODE14) /* vin2a_d21.gpio4_29 */
+#define P8_16_PRUIN P8_16( PIN_INPUT | MUX_MODE12) /* vin2a_d21.pr1_pru1_gpi18 */
/* P8_17 (ball A7) gpio8_18 */
-#define P8_17_DEFAULT P8_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d18.gpio8_18 */
-#define P8_17_GPIO P8_17( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d18.gpio8_18 */
-#define P8_17_GPIO_PU P8_17( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d18.gpio8_18 */
-#define P8_17_GPIO_PD P8_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d18.gpio8_18 */
-#define P8_17_GPIO_INPUT P8_17( PIN_INPUT | MUX_MODE14) /* vout1_d18.gpio8_18 */
+#define P8_17_DEFAULT P8_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d18.gpio8_18 */
+#define P8_17_GPIO P8_17( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d18.gpio8_18 */
+#define P8_17_GPIO_PU P8_17( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d18.gpio8_18 */
+#define P8_17_GPIO_PD P8_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d18.gpio8_18 */
+#define P8_17_GPIO_INPUT P8_17( PIN_INPUT | MUX_MODE14) /* vout1_d18.gpio8_18 */
/* P8_18 (ball F5) gpio4_9 */
-#define P8_18_DEFAULT P8_18( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d8.gpio4_9 */
-#define P8_18_GPIO P8_18( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d8.gpio4_9 */
-#define P8_18_GPIO_PU P8_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d8.gpio4_9 */
-#define P8_18_GPIO_PD P8_18( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d8.gpio4_9 */
-#define P8_18_GPIO_INPUT P8_18( PIN_INPUT | MUX_MODE14) /* vin2a_d8.gpio4_9 */
-#define P8_18_QEP P8_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* vin2a_d8.eQEP2_strobe */
+#define P8_18_DEFAULT P8_18( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d8.gpio4_9 */
+#define P8_18_GPIO P8_18( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d8.gpio4_9 */
+#define P8_18_GPIO_PU P8_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d8.gpio4_9 */
+#define P8_18_GPIO_PD P8_18( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d8.gpio4_9 */
+#define P8_18_GPIO_INPUT P8_18( PIN_INPUT | MUX_MODE14) /* vin2a_d8.gpio4_9 */
+#define P8_18_QEP P8_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* vin2a_d8.eQEP2_strobe */
/* P8_19 (ball E6) gpio4_10 */
-#define P8_19_DEFAULT P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d9.gpio4_10 */
-#define P8_19_GPIO P8_19( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d9.gpio4_10 */
-#define P8_19_GPIO_PU P8_19( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d9.gpio4_10 */
-#define P8_19_GPIO_PD P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d9.gpio4_10 */
-#define P8_19_GPIO_INPUT P8_19( PIN_INPUT | MUX_MODE14) /* vin2a_d9.gpio4_10 */
-#define P8_19_PWM P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d9.ehrpwm2A */
+#define P8_19_DEFAULT P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d9.gpio4_10 */
+#define P8_19_GPIO P8_19( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d9.gpio4_10 */
+#define P8_19_GPIO_PU P8_19( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d9.gpio4_10 */
+#define P8_19_GPIO_PD P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d9.gpio4_10 */
+#define P8_19_GPIO_INPUT P8_19( PIN_INPUT | MUX_MODE14) /* vin2a_d9.gpio4_10 */
+#define P8_19_PWM P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d9.ehrpwm2A */
/* P8_20 (ball AC4) gpio6_30 */
-#define P8_20_DEFAULT P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
-#define P8_20_GPIO P8_20( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
-#define P8_20_GPIO_PU P8_20( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
-#define P8_20_GPIO_PD P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
-#define P8_20_GPIO_INPUT P8_20( PIN_INPUT | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
-#define P8_20_PRUOUT P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* mmc3_cmd.pr2_pru0_gpo3 */
-#define P8_20_PRUIN P8_20( PIN_INPUT | MUX_MODE12) /* mmc3_cmd.pr2_pru0_gpi3 */
+#define P8_20_DEFAULT P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
+#define P8_20_GPIO P8_20( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
+#define P8_20_GPIO_PU P8_20( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
+#define P8_20_GPIO_PD P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
+#define P8_20_GPIO_INPUT P8_20( PIN_INPUT | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
+#define P8_20_PRUOUT P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* mmc3_cmd.pr2_pru0_gpo3 */
+#define P8_20_PRUIN P8_20( PIN_INPUT | MUX_MODE12) /* mmc3_cmd.pr2_pru0_gpi3 */
/* P8_21 (ball AD4) gpio6_29 */
-#define P8_21_DEFAULT P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_clk.gpio6_29 */
-#define P8_21_GPIO P8_21( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_clk.gpio6_29 */
-#define P8_21_GPIO_PU P8_21( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_clk.gpio6_29 */
-#define P8_21_GPIO_PD P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_clk.gpio6_29 */
-#define P8_21_GPIO_INPUT P8_21( PIN_INPUT | MUX_MODE14) /* mmc3_clk.gpio6_29 */
-#define P8_21_PRUOUT P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* mmc3_clk.pr2_pru0_gpo2 */
-#define P8_21_PRUIN P8_21( PIN_INPUT | MUX_MODE12) /* mmc3_clk.pr2_pru0_gpi2 */
+#define P8_21_DEFAULT P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_clk.gpio6_29 */
+#define P8_21_GPIO P8_21( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_clk.gpio6_29 */
+#define P8_21_GPIO_PU P8_21( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_clk.gpio6_29 */
+#define P8_21_GPIO_PD P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_clk.gpio6_29 */
+#define P8_21_GPIO_INPUT P8_21( PIN_INPUT | MUX_MODE14) /* mmc3_clk.gpio6_29 */
+#define P8_21_PRUOUT P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* mmc3_clk.pr2_pru0_gpo2 */
+#define P8_21_PRUIN P8_21( PIN_INPUT | MUX_MODE12) /* mmc3_clk.pr2_pru0_gpi2 */
/* P8_22 (ball AD6) gpio1_23 */
-#define P8_22_DEFAULT P8_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
-#define P8_22_GPIO P8_22( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
-#define P8_22_GPIO_PU P8_22( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
-#define P8_22_GPIO_PD P8_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
-#define P8_22_GPIO_INPUT P8_22( PIN_INPUT | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
+#define P8_22_DEFAULT P8_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
+#define P8_22_GPIO P8_22( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
+#define P8_22_GPIO_PU P8_22( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
+#define P8_22_GPIO_PD P8_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
+#define P8_22_GPIO_INPUT P8_22( PIN_INPUT | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
/* P8_23 (ball AC8) gpio1_22 */
-#define P8_23_DEFAULT P8_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
-#define P8_23_GPIO P8_23( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
-#define P8_23_GPIO_PU P8_23( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
-#define P8_23_GPIO_PD P8_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
-#define P8_23_GPIO_INPUT P8_23( PIN_INPUT | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
+#define P8_23_DEFAULT P8_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
+#define P8_23_GPIO P8_23( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
+#define P8_23_GPIO_PU P8_23( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
+#define P8_23_GPIO_PD P8_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
+#define P8_23_GPIO_INPUT P8_23( PIN_INPUT | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
/* P8_24 (ball AC6) gpio7_0 */
-#define P8_24_DEFAULT P8_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
-#define P8_24_GPIO P8_24( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
-#define P8_24_GPIO_PU P8_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
-#define P8_24_GPIO_PD P8_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
-#define P8_24_GPIO_INPUT P8_24( PIN_INPUT | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
+#define P8_24_DEFAULT P8_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
+#define P8_24_GPIO P8_24( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
+#define P8_24_GPIO_PU P8_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
+#define P8_24_GPIO_PD P8_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
+#define P8_24_GPIO_INPUT P8_24( PIN_INPUT | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
/* P8_25 (ball AC7) gpio6_31 */
-#define P8_25_DEFAULT P8_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
-#define P8_25_GPIO P8_25( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
-#define P8_25_GPIO_PU P8_25( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
-#define P8_25_GPIO_PD P8_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
-#define P8_25_GPIO_INPUT P8_25( PIN_INPUT | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
+#define P8_25_DEFAULT P8_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
+#define P8_25_GPIO P8_25( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
+#define P8_25_GPIO_PU P8_25( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
+#define P8_25_GPIO_PD P8_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
+#define P8_25_GPIO_INPUT P8_25( PIN_INPUT | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
/* P8_26 (ball B3) gpio4_28 */
-#define P8_26_DEFAULT P8_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d20.gpio4_28 */
-#define P8_26_GPIO P8_26( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d20.gpio4_28 */
-#define P8_26_GPIO_PU P8_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d20.gpio4_28 */
-#define P8_26_GPIO_PD P8_26( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d20.gpio4_28 */
-#define P8_26_GPIO_INPUT P8_26( PIN_INPUT | MUX_MODE14) /* vin2a_d20.gpio4_28 */
+#define P8_26_DEFAULT P8_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d20.gpio4_28 */
+#define P8_26_GPIO P8_26( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d20.gpio4_28 */
+#define P8_26_GPIO_PU P8_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d20.gpio4_28 */
+#define P8_26_GPIO_PD P8_26( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d20.gpio4_28 */
+#define P8_26_GPIO_INPUT P8_26( PIN_INPUT | MUX_MODE14) /* vin2a_d20.gpio4_28 */
/* P8_27 (ball E11) gpio4_23 & (ball A8) gpio8_19 */
#define P8_27_DEFAULT P8_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_27B( PIN_OUTPUT | MUX_MODE15) /* vout1_vsync.gpio4_23, vout1_d19.off */
@@ -401,58 +401,58 @@
#define P8_38_UART P8_38B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P8_38A( PIN_OUTPUT | MUX_MODE15) /* mcasp4_aclkx.uart8_rxd, vout1_d9.off */
/* P8_39 (ball F8) gpio8_6 */
-#define P8_39_DEFAULT P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d6.gpio8_6 */
-#define P8_39_GPIO P8_39( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d6.gpio8_6 */
-#define P8_39_GPIO_PU P8_39( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d6.gpio8_6 */
-#define P8_39_GPIO_PD P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d6.gpio8_6 */
-#define P8_39_GPIO_INPUT P8_39( PIN_INPUT | MUX_MODE14) /* vout1_d6.gpio8_6 */
-#define P8_39_PRUOUT P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d6.pr2_pru0_gpo3 */
-#define P8_39_PRUIN P8_39( PIN_INPUT | MUX_MODE12) /* vout1_d6.pr2_pru0_gpi3 */
+#define P8_39_DEFAULT P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d6.gpio8_6 */
+#define P8_39_GPIO P8_39( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d6.gpio8_6 */
+#define P8_39_GPIO_PU P8_39( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d6.gpio8_6 */
+#define P8_39_GPIO_PD P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d6.gpio8_6 */
+#define P8_39_GPIO_INPUT P8_39( PIN_INPUT | MUX_MODE14) /* vout1_d6.gpio8_6 */
+#define P8_39_PRUOUT P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d6.pr2_pru0_gpo3 */
+#define P8_39_PRUIN P8_39( PIN_INPUT | MUX_MODE12) /* vout1_d6.pr2_pru0_gpi3 */
/* P8_40 (ball E7) gpio8_7 */
-#define P8_40_DEFAULT P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d7.gpio8_7 */
-#define P8_40_GPIO P8_40( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d7.gpio8_7 */
-#define P8_40_GPIO_PU P8_40( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d7.gpio8_7 */
-#define P8_40_GPIO_PD P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d7.gpio8_7 */
-#define P8_40_GPIO_INPUT P8_40( PIN_INPUT | MUX_MODE14) /* vout1_d7.gpio8_7 */
-#define P8_40_PRUOUT P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d7.pr2_pru0_gpo4 */
-#define P8_40_PRUIN P8_40( PIN_INPUT | MUX_MODE12) /* vout1_d7.pr2_pru0_gpi4 */
+#define P8_40_DEFAULT P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d7.gpio8_7 */
+#define P8_40_GPIO P8_40( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d7.gpio8_7 */
+#define P8_40_GPIO_PU P8_40( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d7.gpio8_7 */
+#define P8_40_GPIO_PD P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d7.gpio8_7 */
+#define P8_40_GPIO_INPUT P8_40( PIN_INPUT | MUX_MODE14) /* vout1_d7.gpio8_7 */
+#define P8_40_PRUOUT P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d7.pr2_pru0_gpo4 */
+#define P8_40_PRUIN P8_40( PIN_INPUT | MUX_MODE12) /* vout1_d7.pr2_pru0_gpi4 */
/* P8_41 (ball E9) gpio8_4 */
-#define P8_41_DEFAULT P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d4.gpio8_4 */
-#define P8_41_GPIO P8_41( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d4.gpio8_4 */
-#define P8_41_GPIO_PU P8_41( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d4.gpio8_4 */
-#define P8_41_GPIO_PD P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d4.gpio8_4 */
-#define P8_41_GPIO_INPUT P8_41( PIN_INPUT | MUX_MODE14) /* vout1_d4.gpio8_4 */
-#define P8_41_PRUOUT P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d4.pr2_pru0_gpo1 */
-#define P8_41_PRUIN P8_41( PIN_INPUT | MUX_MODE12) /* vout1_d4.pr2_pru0_gpi1 */
+#define P8_41_DEFAULT P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d4.gpio8_4 */
+#define P8_41_GPIO P8_41( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d4.gpio8_4 */
+#define P8_41_GPIO_PU P8_41( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d4.gpio8_4 */
+#define P8_41_GPIO_PD P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d4.gpio8_4 */
+#define P8_41_GPIO_INPUT P8_41( PIN_INPUT | MUX_MODE14) /* vout1_d4.gpio8_4 */
+#define P8_41_PRUOUT P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d4.pr2_pru0_gpo1 */
+#define P8_41_PRUIN P8_41( PIN_INPUT | MUX_MODE12) /* vout1_d4.pr2_pru0_gpi1 */
/* P8_42 (ball F9) gpio8_5 */
-#define P8_42_DEFAULT P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d5.gpio8_5 */
-#define P8_42_GPIO P8_42( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d5.gpio8_5 */
-#define P8_42_GPIO_PU P8_42( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d5.gpio8_5 */
-#define P8_42_GPIO_PD P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d5.gpio8_5 */
-#define P8_42_GPIO_INPUT P8_42( PIN_INPUT | MUX_MODE14) /* vout1_d5.gpio8_5 */
-#define P8_42_PRUOUT P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d5.pr2_pru0_gpo2 */
-#define P8_42_PRUIN P8_42( PIN_INPUT | MUX_MODE12) /* vout1_d5.pr2_pru0_gpi2 */
+#define P8_42_DEFAULT P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d5.gpio8_5 */
+#define P8_42_GPIO P8_42( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d5.gpio8_5 */
+#define P8_42_GPIO_PU P8_42( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d5.gpio8_5 */
+#define P8_42_GPIO_PD P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d5.gpio8_5 */
+#define P8_42_GPIO_INPUT P8_42( PIN_INPUT | MUX_MODE14) /* vout1_d5.gpio8_5 */
+#define P8_42_PRUOUT P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d5.pr2_pru0_gpo2 */
+#define P8_42_PRUIN P8_42( PIN_INPUT | MUX_MODE12) /* vout1_d5.pr2_pru0_gpi2 */
/* P8_43 (ball F10) gpio8_2 */
-#define P8_43_DEFAULT P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d2.gpio8_2 */
-#define P8_43_GPIO P8_43( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d2.gpio8_2 */
-#define P8_43_GPIO_PU P8_43( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d2.gpio8_2 */
-#define P8_43_GPIO_PD P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d2.gpio8_2 */
-#define P8_43_GPIO_INPUT P8_43( PIN_INPUT | MUX_MODE14) /* vout1_d2.gpio8_2 */
-#define P8_43_PRUOUT P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d2.pr2_pru1_gpo20 */
-#define P8_43_PRUIN P8_43( PIN_INPUT | MUX_MODE12) /* vout1_d2.pr2_pru1_gpi20 */
+#define P8_43_DEFAULT P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d2.gpio8_2 */
+#define P8_43_GPIO P8_43( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d2.gpio8_2 */
+#define P8_43_GPIO_PU P8_43( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d2.gpio8_2 */
+#define P8_43_GPIO_PD P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d2.gpio8_2 */
+#define P8_43_GPIO_INPUT P8_43( PIN_INPUT | MUX_MODE14) /* vout1_d2.gpio8_2 */
+#define P8_43_PRUOUT P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d2.pr2_pru1_gpo20 */
+#define P8_43_PRUIN P8_43( PIN_INPUT | MUX_MODE12) /* vout1_d2.pr2_pru1_gpi20 */
/* P8_44 (ball G11) gpio8_3 */
-#define P8_44_DEFAULT P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d3.gpio8_3 */
-#define P8_44_GPIO P8_44( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d3.gpio8_3 */
-#define P8_44_GPIO_PU P8_44( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d3.gpio8_3 */
-#define P8_44_GPIO_PD P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d3.gpio8_3 */
-#define P8_44_GPIO_INPUT P8_44( PIN_INPUT | MUX_MODE14) /* vout1_d3.gpio8_3 */
-#define P8_44_PRUOUT P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d3.pr2_pru0_gpo0 */
-#define P8_44_PRUIN P8_44( PIN_INPUT | MUX_MODE12) /* vout1_d3.pr2_pru0_gpi0 */
+#define P8_44_DEFAULT P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d3.gpio8_3 */
+#define P8_44_GPIO P8_44( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d3.gpio8_3 */
+#define P8_44_GPIO_PU P8_44( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d3.gpio8_3 */
+#define P8_44_GPIO_PD P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d3.gpio8_3 */
+#define P8_44_GPIO_INPUT P8_44( PIN_INPUT | MUX_MODE14) /* vout1_d3.gpio8_3 */
+#define P8_44_PRUOUT P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d3.pr2_pru0_gpo0 */
+#define P8_44_PRUIN P8_44( PIN_INPUT | MUX_MODE12) /* vout1_d3.pr2_pru0_gpi0 */
/* P8_45 (ball F11) gpio8_0 & (ball B7) gpio8_16*/
#define P8_45_DEFAULT P8_45A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_45B( PIN_OUTPUT | MUX_MODE15) /* vout1_d0.gpio8_0, vout1_d16.off */
@@ -488,194 +488,194 @@
/* P9_11 (ball B19) & (ball B8) gpio8_17*/
#define P9_11_UART P9_11A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) P9_11B( PIN_OUTPUT | MUX_MODE15) /* mcasp3_axr0.uart5_rxd, vout1_d17.off */
-#define P9_11_DEFAULT P9_11B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_11A( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.gpio8_17, mcasp3_axr0.off */
-#define P9_11_GPIO P9_11B( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_11A( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.gpio8_17, mcasp3_axr0.off */
-#define P9_11_GPIO_PU P9_11B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_11A( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.gpio8_17, mcasp3_axr0.off */
-#define P9_11_GPIO_PD P9_11B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_11A( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.gpio8_17, mcasp3_axr0.off */
+#define P9_11_DEFAULT P9_11B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_11A( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.gpio8_17, mcasp3_axr0.off */
+#define P9_11_GPIO P9_11B( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_11A( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.gpio8_17, mcasp3_axr0.off */
+#define P9_11_GPIO_PU P9_11B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_11A( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.gpio8_17, mcasp3_axr0.off */
+#define P9_11_GPIO_PD P9_11B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_11A( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.gpio8_17, mcasp3_axr0.off */
#define P9_11_GPIO_INPUT P9_11B( PIN_INPUT | MUX_MODE14) P9_11A( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.gpio8_17, mcasp3_axr0.off */
/* P9_12 (ball B14) gpio5_0 */
-#define P9_12_DEFAULT P9_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
-#define P9_12_GPIO P9_12( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
-#define P9_12_GPIO_PU P9_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
-#define P9_12_GPIO_PD P9_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
-#define P9_12_GPIO_INPUT P9_12( PIN_INPUT | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
+#define P9_12_DEFAULT P9_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
+#define P9_12_GPIO P9_12( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
+#define P9_12_GPIO_PU P9_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
+#define P9_12_GPIO_PD P9_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
+#define P9_12_GPIO_INPUT P9_12( PIN_INPUT | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
/* P9_13 (ball C17) & (ball AB10) gpio6_12*/
#define P9_13_UART P9_13A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) P9_13B( PIN_OUTPUT | MUX_MODE15) /* mcasp3_axr1.uart5_txd, usb1_drvvbus.off */
-#define P9_13_DEFAULT P9_13B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
-#define P9_13_GPIO P9_13B( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
-#define P9_13_GPIO_PU P9_13B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
-#define P9_13_GPIO_PD P9_13B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
-#define P9_13_GPIO_INPUT P9_13B( PIN_INPUT | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
+#define P9_13_DEFAULT P9_13B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
+#define P9_13_GPIO P9_13B( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
+#define P9_13_GPIO_PU P9_13B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
+#define P9_13_GPIO_PD P9_13B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
+#define P9_13_GPIO_INPUT P9_13B( PIN_INPUT | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
/* P9_14 (ball D6) gpio4_25 */
-#define P9_14_DEFAULT P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d17.gpio4_25 */
-#define P9_14_GPIO P9_14( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d17.gpio4_25 */
-#define P9_14_GPIO_PU P9_14( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d17.gpio4_25 */
-#define P9_14_GPIO_PD P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d17.gpio4_25 */
-#define P9_14_GPIO_INPUT P9_14( PIN_INPUT | MUX_MODE14) /* vin2a_d17.gpio4_25 */
-#define P9_14_PWM P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d17.ehrpwm3A */
+#define P9_14_DEFAULT P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d17.gpio4_25 */
+#define P9_14_GPIO P9_14( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d17.gpio4_25 */
+#define P9_14_GPIO_PU P9_14( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d17.gpio4_25 */
+#define P9_14_GPIO_PD P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d17.gpio4_25 */
+#define P9_14_GPIO_INPUT P9_14( PIN_INPUT | MUX_MODE14) /* vin2a_d17.gpio4_25 */
+#define P9_14_PWM P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d17.ehrpwm3A */
/* P9_15 (ball AG4) gpio3_12 */
-#define P9_15_DEFAULT P9_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d8.gpio3_12 */
-#define P9_15_GPIO P9_15( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin1a_d8.gpio3_12 */
-#define P9_15_GPIO_PU P9_15( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin1a_d8.gpio3_12 */
-#define P9_15_GPIO_PD P9_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d8.gpio3_12 */
-#define P9_15_GPIO_INPUT P9_15( PIN_INPUT | MUX_MODE14) /* vin1a_d8.gpio3_12 */
+#define P9_15_DEFAULT P9_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d8.gpio3_12 */
+#define P9_15_GPIO P9_15( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin1a_d8.gpio3_12 */
+#define P9_15_GPIO_PU P9_15( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin1a_d8.gpio3_12 */
+#define P9_15_GPIO_PD P9_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d8.gpio3_12 */
+#define P9_15_GPIO_INPUT P9_15( PIN_INPUT | MUX_MODE14) /* vin1a_d8.gpio3_12 */
/* P9_16 (ball C5) gpio4_26 */
-#define P9_16_DEFAULT P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d18.gpio4_26 */
-#define P9_16_GPIO P9_16( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d18.gpio4_26 */
-#define P9_16_GPIO_PU P9_16( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d18.gpio4_26 */
-#define P9_16_GPIO_PD P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d18.gpio4_26 */
-#define P9_16_GPIO_INPUT P9_16( PIN_INPUT | MUX_MODE14) /* vin2a_d18.gpio4_26 */
-#define P9_16_PWM P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d18.ehrpwm3B */
+#define P9_16_DEFAULT P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d18.gpio4_26 */
+#define P9_16_GPIO P9_16( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d18.gpio4_26 */
+#define P9_16_GPIO_PU P9_16( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d18.gpio4_26 */
+#define P9_16_GPIO_PD P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d18.gpio4_26 */
+#define P9_16_GPIO_INPUT P9_16( PIN_INPUT | MUX_MODE14) /* vin2a_d18.gpio4_26 */
+#define P9_16_PWM P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d18.ehrpwm3B */
/* P9_17 (ball B24) gpio7_17 and (ball F12) gpio5_3*/
-#define P9_17_DEFAULT P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
-#define P9_17_GPIO P9_17A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
-#define P9_17_GPIO_PU P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
-#define P9_17_GPIO_PD P9_17A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
-#define P9_17_GPIO_INPUT P9_17A( PIN_INPUT | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
-#define P9_17_SPI P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.spi2_cs0 */
+#define P9_17_DEFAULT P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
+#define P9_17_GPIO P9_17A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
+#define P9_17_GPIO_PU P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
+#define P9_17_GPIO_PD P9_17A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
+#define P9_17_GPIO_INPUT P9_17A( PIN_INPUT | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
+#define P9_17_SPI P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.spi2_cs0 */
#define P9_17_I2C P9_17B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P9_17A( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr1.i2c5_scl */
-#define P9_17_UART P9_17B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_17A( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr1.uart6_txd */
+#define P9_17_UART P9_17B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_17A( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr1.uart6_txd */
/* P9_18 (ball G17) gpio7_16 & (ball F4) gpio4_6*/
-#define P9_18_DEFAULT P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
-#define P9_18_GPIO P9_18A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
-#define P9_18_GPIO_PU P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
-#define P9_18_GPIO_PD P9_18A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
-#define P9_18_GPIO_INPUT P9_18A( PIN_INPUT | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
-#define P9_18_SPI P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.spi2_d0, mcasp1_axr0.off */
+#define P9_18_DEFAULT P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+#define P9_18_GPIO P9_18A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+#define P9_18_GPIO_PU P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+#define P9_18_GPIO_PD P9_18A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+#define P9_18_GPIO_INPUT P9_18A( PIN_INPUT | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+#define P9_18_SPI P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.spi2_d0, mcasp1_axr0.off */
#define P9_18_I2C P9_18B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P9_18A( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr0.i2c5_sda, spi2_d0.off */
#define P9_18_UART P9_18B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_18A( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr0.uart6_rxd, spi2_d0.off */
/* P9_19 (ball R6) gpio7_3 & (ball F4) gpio4_6*/
-#define P9_19_DEFAULT P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
-#define P9_19_GPIO P9_19A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
-#define P9_19_GPIO_PU P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
-#define P9_19_GPIO_PD P9_19A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
-#define P9_19_GPIO_INPUT P9_19A( PIN_INPUT | MUX_MODE14) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
-#define P9_19_I2C P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.i2c4_scl, gpmc_a0.off */
-#define P9_19_QEP P9_19B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P9_19A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d5.eQEP2A_in, gpmc_a0.off */
+#define P9_19_DEFAULT P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
+#define P9_19_GPIO P9_19A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
+#define P9_19_GPIO_PU P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
+#define P9_19_GPIO_PD P9_19A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
+#define P9_19_GPIO_INPUT P9_19A( PIN_INPUT | MUX_MODE14) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
+#define P9_19_I2C P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.i2c4_scl, gpmc_a0.off */
+#define P9_19_QEP P9_19B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P9_19A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d5.eQEP2A_in, gpmc_a0.off */
/* P9_20 (ball T9) gpio7_4 & (ball D2) gpio4_5*/
-#define P9_20_DEFAULT P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
-#define P9_20_GPIO P9_20A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
-#define P9_20_GPIO_PU P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
-#define P9_20_GPIO_PD P9_20A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
-#define P9_20_GPIO_INPUT P9_20A( PIN_INPUT | MUX_MODE14) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
-#define P9_20_I2C P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.i2c4_sda, vin2a_d4.off */
-#define P9_20_PRUOUT P9_20B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_20A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d4.pr1_pru1_gpo1, gpmc_a1.off */
+#define P9_20_DEFAULT P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
+#define P9_20_GPIO P9_20A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
+#define P9_20_GPIO_PU P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
+#define P9_20_GPIO_PD P9_20A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
+#define P9_20_GPIO_INPUT P9_20A( PIN_INPUT | MUX_MODE14) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
+#define P9_20_I2C P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.i2c4_sda, vin2a_d4.off */
+#define P9_20_PRUOUT P9_20B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_20A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d4.pr1_pru1_gpo1, gpmc_a1.off */
#define P9_20_PRUIN P9_20B( PIN_INPUT | MUX_MODE12) P9_20A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d4.pr1_pru1_gpi1, gpmc_a1.off */
/* P9_21 (ball AF8) gpio3_3 & (ball B22) gpio7_15*/
-#define P9_21_DEFAULT P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
-#define P9_21_GPIO P9_21A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
-#define P9_21_GPIO_PU P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
-#define P9_21_GPIO_PD P9_21A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
-#define P9_21_GPIO_INPUT P9_21A( PIN_INPUT | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
-#define P9_21_QEP P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.eQEP1_strobe,spi2_d1.off */
-#define P9_21_SPI P9_21B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) P9_21A( PIN_OUTPUT | MUX_MODE15) /* spi2_d1.spi2_d1, vin1a_vsync0.off */
+#define P9_21_DEFAULT P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+#define P9_21_GPIO P9_21A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+#define P9_21_GPIO_PU P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+#define P9_21_GPIO_PD P9_21A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+#define P9_21_GPIO_INPUT P9_21A( PIN_INPUT | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+#define P9_21_QEP P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.eQEP1_strobe,spi2_d1.off */
+#define P9_21_SPI P9_21B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) P9_21A( PIN_OUTPUT | MUX_MODE15) /* spi2_d1.spi2_d1, vin1a_vsync0.off */
#define P9_21_UART P9_21B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) P9_21A( PIN_OUTPUT | MUX_MODE15) /* spi2_d1.uart3_txd, vin1a_vsync0.off */
/* P9_22 (ball B26) gpio6_19 & ball A26) gpio7_14*/
-#define P9_22_DEFAULT P9_22A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
-#define P9_22_GPIO P9_22A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
-#define P9_22_GPIO_PU P9_22A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
-#define P9_22_GPIO_PD P9_22A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
-#define P9_22_GPIO_INPUT P9_22A( PIN_INPUT | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
-#define P9_22_SPI P9_22B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) P9_22A( PIN_OUTPUT | MUX_MODE15) /* spi2_sclk.spi2_sclk, xref_clk2.off */
+#define P9_22_DEFAULT P9_22A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
+#define P9_22_GPIO P9_22A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
+#define P9_22_GPIO_PU P9_22A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
+#define P9_22_GPIO_PD P9_22A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
+#define P9_22_GPIO_INPUT P9_22A( PIN_INPUT | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
+#define P9_22_SPI P9_22B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) P9_22A( PIN_OUTPUT | MUX_MODE15) /* spi2_sclk.spi2_sclk, xref_clk2.off */
#define P9_22_UART P9_22B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) P9_22A( PIN_OUTPUT | MUX_MODE15) /* spi2_sclk.uart3_rxd, xref_clk2.off */
/* P9_23 (ball A22) gpio7_11 */
-#define P9_23_DEFAULT P9_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* spi1_cs1.gpio7_11 */
-#define P9_23_GPIO P9_23( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* spi1_cs1.gpio7_11 */
-#define P9_23_GPIO_PU P9_23( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* spi1_cs1.gpio7_11 */
-#define P9_23_GPIO_PD P9_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* spi1_cs1.gpio7_11 */
-#define P9_23_GPIO_INPUT P9_23( PIN_INPUT | MUX_MODE14) /* spi1_cs1.gpio7_11 */
+#define P9_23_DEFAULT P9_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* spi1_cs1.gpio7_11 */
+#define P9_23_GPIO P9_23( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* spi1_cs1.gpio7_11 */
+#define P9_23_GPIO_PU P9_23( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* spi1_cs1.gpio7_11 */
+#define P9_23_GPIO_PD P9_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* spi1_cs1.gpio7_11 */
+#define P9_23_GPIO_INPUT P9_23( PIN_INPUT | MUX_MODE14) /* spi1_cs1.gpio7_11 */
/* P9_24 (ball F20) gpio6_15*/
-#define P9_24_DEFAULT P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* gpio6_15.gpio6_15 */
-#define P9_24_GPIO P9_24( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* gpio6_15.gpio6_15 */
-#define P9_24_GPIO_PU P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* gpio6_15.gpio6_15 */
-#define P9_24_GPIO_PD P9_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* gpio6_15.gpio6_15 */
-#define P9_24_GPIO_INPUT P9_24( PIN_INPUT | MUX_MODE14) /* gpio6_15.gpio6_15 */
-#define P9_24_UART P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) /* gpio6_15.uart10_txd */
-#define P9_24_CAN P9_24( PIN_INPUT_PULLUP | MUX_MODE2) /* gpio6_15.dcan2_rx */
-#define P9_24_I2C P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) /* gpio6_15.i2c3_scl */
+#define P9_24_DEFAULT P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* gpio6_15.gpio6_15 */
+#define P9_24_GPIO P9_24( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* gpio6_15.gpio6_15 */
+#define P9_24_GPIO_PU P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* gpio6_15.gpio6_15 */
+#define P9_24_GPIO_PD P9_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* gpio6_15.gpio6_15 */
+#define P9_24_GPIO_INPUT P9_24( PIN_INPUT | MUX_MODE14) /* gpio6_15.gpio6_15 */
+#define P9_24_UART P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) /* gpio6_15.uart10_txd */
+#define P9_24_CAN P9_24( PIN_INPUT_PULLUP | MUX_MODE2) /* gpio6_15.dcan2_rx */
+#define P9_24_I2C P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) /* gpio6_15.i2c3_scl */
/* P9_25 (ball D18) gpio6_17 */
-#define P9_25_DEFAULT P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* xref_clk0.gpio6_17 */
-#define P9_25_GPIO P9_25( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* xref_clk0.gpio6_17 */
-#define P9_25_GPIO_PU P9_25( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* xref_clk0.gpio6_17 */
-#define P9_25_GPIO_PD P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* xref_clk0.gpio6_17 */
-#define P9_25_GPIO_INPUT P9_25( PIN_INPUT | MUX_MODE14) /* xref_clk0.gpio6_17 */
-#define P9_25_PRUOUT P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* xref_clk0.pr2_pru1_gpo5 */
-#define P9_25_PRUIN P9_25( PIN_INPUT | MUX_MODE12) /* xref_clk0.pr2_pru1_gpi5 */
+#define P9_25_DEFAULT P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* xref_clk0.gpio6_17 */
+#define P9_25_GPIO P9_25( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* xref_clk0.gpio6_17 */
+#define P9_25_GPIO_PU P9_25( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* xref_clk0.gpio6_17 */
+#define P9_25_GPIO_PD P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* xref_clk0.gpio6_17 */
+#define P9_25_GPIO_INPUT P9_25( PIN_INPUT | MUX_MODE14) /* xref_clk0.gpio6_17 */
+#define P9_25_PRUOUT P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* xref_clk0.pr2_pru1_gpo5 */
+#define P9_25_PRUIN P9_25( PIN_INPUT | MUX_MODE12) /* xref_clk0.pr2_pru1_gpi5 */
/* P9_26 (ball E21) gpio6_14 & (ball AE2) gpio3_24 */
-#define P9_26_DEFAULT P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
-#define P9_26_GPIO P9_26A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
-#define P9_26_GPIO_PU P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
-#define P9_26_GPIO_PD P9_26A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
-#define P9_26_GPIO_INPUT P9_26A( PIN_INPUT | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
-#define P9_26_UART P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.uart10_rxd, vin1a_d20.off */
-#define P9_26_CAN P9_26A( PIN_OUTPUT_PULLUP | MUX_MODE2) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.dcan2_tx, vin1a_d20.off */
+#define P9_26_DEFAULT P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
+#define P9_26_GPIO P9_26A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
+#define P9_26_GPIO_PU P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
+#define P9_26_GPIO_PD P9_26A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
+#define P9_26_GPIO_INPUT P9_26A( PIN_INPUT | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
+#define P9_26_UART P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.uart10_rxd, vin1a_d20.off */
+#define P9_26_CAN P9_26A( PIN_OUTPUT_PULLUP | MUX_MODE2) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.dcan2_tx, vin1a_d20.off */
#define P9_26_I2C P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.i2c3_sda, vin1a_d20.off */
#define P9_26_PRUOUT P9_26B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_26A( PIN_OUTPUT | MUX_MODE15) /* vin1a_d20.pr1_pru0_gpo17, gpio6_14.off */
#define P9_26_PRUIN P9_26B( PIN_INPUT | MUX_MODE12) P9_26A( PIN_OUTPUT | MUX_MODE15) /* vin1a_d20.pr1_pru0_gpi17, gpio6_14.off */
/* P9_27 (ball C3) gpio4_15 & (ball J14) gpio5_1*/
-#define P9_27_DEFAULT P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
-#define P9_27_GPIO P9_27A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
-#define P9_27_GPIO_PU P9_27A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
-#define P9_27_GPIO_PD P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
-#define P9_27_GPIO_INPUT P9_27A( PIN_INPUT | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
-#define P9_27_QEP P9_27A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.eQEP3B_in, mcasp1_fsr.off */
-#define P9_27_PRUOUT P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.pr1_pru1_gpo11, mcasp1_fsr.off */
-#define P9_27_PRUIN P9_27A( PIN_INPUT | MUX_MODE12) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.pr1_pru1_gpi11, mcasp1_fsr.off */
+#define P9_27_DEFAULT P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+#define P9_27_GPIO P9_27A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+#define P9_27_GPIO_PU P9_27A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+#define P9_27_GPIO_PD P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+#define P9_27_GPIO_INPUT P9_27A( PIN_INPUT | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+#define P9_27_QEP P9_27A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.eQEP3B_in, mcasp1_fsr.off */
+#define P9_27_PRUOUT P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.pr1_pru1_gpo11, mcasp1_fsr.off */
+#define P9_27_PRUIN P9_27A( PIN_INPUT | MUX_MODE12) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.pr1_pru1_gpi11, mcasp1_fsr.off */
/* P9_28 (ball A12) gpio4_17 */
-#define P9_28_DEFAULT P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
-#define P9_28_GPIO P9_28( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
-#define P9_28_GPIO_PU P9_28( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
-#define P9_28_GPIO_PD P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
-#define P9_28_GPIO_INPUT P9_28( PIN_INPUT | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
-#define P9_28_SPI P9_28( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) /* mcasp1_axr11.spi3_cs0 */
-#define P9_28_PRUOUT P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* mcasp1_axr11.pr2_pru1_gpo13 */
-#define P9_28_PRUIN P9_28( PIN_INPUT | MUX_MODE12) /* mcasp1_axr11.pr2_pru1_gpi13 */
+#define P9_28_DEFAULT P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
+#define P9_28_GPIO P9_28( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
+#define P9_28_GPIO_PU P9_28( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
+#define P9_28_GPIO_PD P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
+#define P9_28_GPIO_INPUT P9_28( PIN_INPUT | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
+#define P9_28_SPI P9_28( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) /* mcasp1_axr11.spi3_cs0 */
+#define P9_28_PRUOUT P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* mcasp1_axr11.pr2_pru1_gpo13 */
+#define P9_28_PRUIN P9_28( PIN_INPUT | MUX_MODE12) /* mcasp1_axr11.pr2_pru1_gpi13 */
/* P9_29 (ball A11) gpio5_11 & (ball D14) gpio7_30*/
-#define P9_29_DEFAULT P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
-#define P9_29_GPIO P9_29A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
-#define P9_29_GPIO_PU P9_29A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
-#define P9_29_GPIO_PD P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
+#define P9_29_DEFAULT P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
+#define P9_29_GPIO P9_29A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
+#define P9_29_GPIO_PU P9_29A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
+#define P9_29_GPIO_PD P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
#define P9_29_GPIO_INPUT P9_29A( PIN_INPUT | MUX_MODE14) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
-#define P9_29_SPI P9_29A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.spi3_d1, mcasp1_fsx.off */
-#define P9_29_PRUOUT P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.pr2_pru1_gpo11, mcasp1_fsx.off */
+#define P9_29_SPI P9_29A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.spi3_d1, mcasp1_fsx.off */
+#define P9_29_PRUOUT P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.pr2_pru1_gpo11, mcasp1_fsx.off */
#define P9_29_PRUIN P9_29A( PIN_INPUT | MUX_MODE12) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.pr2_pru1_gpi11, mcasp1_fsx.off */
/* P9_30 (ball B13) gpio5_12*/
-#define P9_30_DEFAULT P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
-#define P9_30_GPIO P9_30( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
-#define P9_30_GPIO_PU P9_30( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
-#define P9_30_GPIO_PD P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
-#define P9_30_GPIO_INPUT P9_30( PIN_INPUT | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
-#define P9_30_SPI P9_30( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) /* mcasp1_axr10.spi3_d0 */
-#define P9_30_PRUOUT P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* mcasp1_axr10.pr2_pru1_gpo12 */
-#define P9_30_PRUIN P9_30( PIN_INPUT | MUX_MODE12) /* mcasp1_axr10.pr2_pru1_gpi12 */
+#define P9_30_DEFAULT P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
+#define P9_30_GPIO P9_30( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
+#define P9_30_GPIO_PU P9_30( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
+#define P9_30_GPIO_PD P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
+#define P9_30_GPIO_INPUT P9_30( PIN_INPUT | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
+#define P9_30_SPI P9_30( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) /* mcasp1_axr10.spi3_d0 */
+#define P9_30_PRUOUT P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* mcasp1_axr10.pr2_pru1_gpo12 */
+#define P9_30_PRUIN P9_30( PIN_INPUT | MUX_MODE12) /* mcasp1_axr10.pr2_pru1_gpi12 */
/* P9_31 (ball B12) gpio5_10 & (ball C14) gpio7_31*/
-#define P9_31_DEFAULT P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
-#define P9_31_GPIO P9_31A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
-#define P9_31_GPIO_PU P9_31A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
-#define P9_31_GPIO_PD P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
+#define P9_31_DEFAULT P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
+#define P9_31_GPIO P9_31A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
+#define P9_31_GPIO_PU P9_31A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
+#define P9_31_GPIO_PD P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
#define P9_31_GPIO_INPUT P9_31A( PIN_INPUT | MUX_MODE14) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
-#define P9_31_SPI P9_31A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.spi3_sclk, mcasp1_aclkx.off */
-#define P9_31_PRUOUT P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.pr2_pru1_gpo10, mcasp1_aclkx.off */
+#define P9_31_SPI P9_31A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.spi3_sclk, mcasp1_aclkx.off */
+#define P9_31_PRUOUT P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.pr2_pru1_gpo10, mcasp1_aclkx.off */
#define P9_31_PRUIN P9_31A( PIN_INPUT | MUX_MODE12) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.pr2_pru1_gpi10, mcasp1_aclkx.off */
/* P9_32 VADC */
@@ -689,21 +689,21 @@
/* P9_40 AIN1 */
/* P9_41 (ball C23) gpio6_20 & (ball C1) gpio4_7*/
-#define P9_41_DEFAULT P9_41A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_41B( PIN_OUTPUT | MUX_MODE15) /* xref_clk3.gpio6_20, vin2a_d6.off */
-#define P9_41_GPIO P9_41A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_41B( PIN_OUTPUT | MUX_MODE15) /* xref_clk3.gpio6_20, vin2a_d6.off */
-#define P9_41_GPIO_PU P9_41A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_41B( PIN_OUTPUT | MUX_MODE15) /* xref_clk3.gpio6_20, vin2a_d6.off */
-#define P9_41_GPIO_PD P9_41A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_41B( PIN_OUTPUT | MUX_MODE15) /* xref_clk3.gpio6_20, vin2a_d6.off */
+#define P9_41_DEFAULT P9_41A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_41B( PIN_OUTPUT | MUX_MODE15) /* xref_clk3.gpio6_20, vin2a_d6.off */
+#define P9_41_GPIO P9_41A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_41B( PIN_OUTPUT | MUX_MODE15) /* xref_clk3.gpio6_20, vin2a_d6.off */
+#define P9_41_GPIO_PU P9_41A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_41B( PIN_OUTPUT | MUX_MODE15) /* xref_clk3.gpio6_20, vin2a_d6.off */
+#define P9_41_GPIO_PD P9_41A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_41B( PIN_OUTPUT | MUX_MODE15) /* xref_clk3.gpio6_20, vin2a_d6.off */
#define P9_41_GPIO_INPUT P9_41A( PIN_INPUT | MUX_MODE14) P9_41B( PIN_OUTPUT | MUX_MODE15) /* xref_clk3.gpio6_20, vin2a_d6.off */
#define P9_41_PRUOUT P9_41B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_41A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d6.pr1_pru1_gpo3, xref_clk3.off */
#define P9_41_PRUIN P9_41B( PIN_INPUT | MUX_MODE12) P9_41A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d6.pr1_pru1_gpi3, xref_clk3.off */
/* P9_42 (ball E14) gpio4_18 & (ball C2) gpio4_14*/
-#define P9_42_DEFAULT P9_42A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
-#define P9_42_GPIO P9_42A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
-#define P9_42_GPIO_PU P9_42A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
-#define P9_42_GPIO_PD P9_42A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
-#define P9_42_GPIO_INPUT P9_42A( PIN_INPUT | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
-#define P9_42_SPI P9_42A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.spi3_cs1, vin2a_d13.off */
+#define P9_42_DEFAULT P9_42A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+#define P9_42_GPIO P9_42A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+#define P9_42_GPIO_PU P9_42A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+#define P9_42_GPIO_PD P9_42A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+#define P9_42_GPIO_INPUT P9_42A( PIN_INPUT | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+#define P9_42_SPI P9_42A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.spi3_cs1, vin2a_d13.off */
#define P9_42_PRUOUT P9_42B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_42A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d13.pr1_pru1_gpo10, mcasp1_axr12.off */
#define P9_42_PRUIN P9_42B( PIN_INPUT | MUX_MODE12) P9_42A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d13.pr1_pru1_gpi10, mcasp1_axr12.off */
--
GitLab
From 85c3cb82acfb2cf0c8bb8413e98626d9774505dd Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Sun, 12 Jul 2020 19:57:12 +0530
Subject: [PATCH 28/86] cape_pins no longer needed
The new code in src/arm/am572x-bone-common-univ.dtsi configures the header pins uisng "bone-pinmux-helper" thus this pin configuration node is no longer needed.
---
src/arm/am5729-beagleboneai.dts | 210 ++++++++++++++++----------------
1 file changed, 105 insertions(+), 105 deletions(-)
diff --git a/src/arm/am5729-beagleboneai.dts b/src/arm/am5729-beagleboneai.dts
index 4136aac6..685d1fe7 100644
--- a/src/arm/am5729-beagleboneai.dts
+++ b/src/arm/am5729-beagleboneai.dts
@@ -240,11 +240,11 @@
pinctrl-0 = <&unused_pins_default>;
};
- cape_pins: cape_pins {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&cape_pins_default>;
- };
+ // cape_pins: cape_pins {
+ // compatible = "gpio-leds";
+ // pinctrl-names = "default";
+ // pinctrl-0 = <&cape_pins_default>;
+ // };
extcon_usb1: extcon_usb1 {
compatible = "linux,extcon-usb-gpio";
@@ -435,7 +435,7 @@
DRA7XX_CORE_IOPAD(0x3644, MUX_MODE15) /* U3: N/C */
- DRA7XX_CORE_IOPAD(0x3680, MUX_MODE15) /* AB10: N/C */
+ // DRA7XX_CORE_IOPAD(0x3680, MUX_MODE15) /* AB10: N/C: P9.13B BBAI revA2 */
DRA7XX_CORE_IOPAD(0x36BC, MUX_MODE15) /* G13: N/C */
@@ -480,105 +480,105 @@
>;
};
- cape_pins_default: cape_pins_default {
- pinctrl-single,pins = <
- DRA7XX_CORE_IOPAD(0x379C, MUX_MODE14) /* AB8: P8.3: mmc3_dat6.off */
- DRA7XX_CORE_IOPAD(0x37A0, MUX_MODE14) /* AB5: P8.4: mmc3_dat7.off */
- DRA7XX_CORE_IOPAD(0x378C, MUX_MODE14) /* AC9: P8.5: mmc3_dat2.off */
- DRA7XX_CORE_IOPAD(0x3790, MUX_MODE14) /* AC3: P8.6: mmc3_dat3.off */
- DRA7XX_CORE_IOPAD(0x36EC, MUX_MODE14) /* G14: P8.7: mcasp1_axr14.off */
- DRA7XX_CORE_IOPAD(0x36F0, MUX_MODE14) /* F14: P8.8: mcasp1_axr15.off */
- DRA7XX_CORE_IOPAD(0x3698, MUX_MODE14) /* E17: P8.9: xref_clk1.off */
- DRA7XX_CORE_IOPAD(0x36E8, MUX_MODE14) /* A13: P8.10: mcasp1_axr13.off */
- DRA7XX_CORE_IOPAD(0x3510, MUX_MODE14) /* AH4: P8.11: vin1a_d7.off */
- DRA7XX_CORE_IOPAD(0x350C, MUX_MODE14) /* AG6: P8.12: vin1a_d6.off */
- DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE12) /* D3: P8.13: vin2a_d10.off */
- DRA7XX_CORE_IOPAD(0x3598, MUX_MODE14) /* D5: P8.14: vin2a_d12.off */
- DRA7XX_CORE_IOPAD(0x3570, MUX_MODE14) /* D1: P8.15a: vin2a_d2.off */
- DRA7XX_CORE_IOPAD(0x35B4, MUX_MODE13) /* A3: P8.15b: vin2a_d19.off */
- DRA7XX_CORE_IOPAD(0x35BC, MUX_MODE13) /* B4: P8.16: vin2a_d21.off */
- DRA7XX_CORE_IOPAD(0x3624, MUX_MODE14) /* A7: P8.17: vout1_d18.off */
- DRA7XX_CORE_IOPAD(0x3588, PIN_INPUT | MUX_MODE12) /* F5: P8.18: vin2a_d8.off */
- DRA7XX_CORE_IOPAD(0x358C, PIN_INPUT | MUX_MODE12) /* E6: P8.19: vin2a_d9.off */
- DRA7XX_CORE_IOPAD(0x3780, MUX_MODE14) /* AC4: P8.20: mmc3_cmd.off */
- DRA7XX_CORE_IOPAD(0x377C, MUX_MODE14) /* AD4: P8.21: mmc3_clk.off */
- DRA7XX_CORE_IOPAD(0x3798, MUX_MODE14) /* AD6: P8.22: mmc3_dat5.off */
- DRA7XX_CORE_IOPAD(0x3794, MUX_MODE14) /* AC8: P8.23: mmc3_dat4.off */
- DRA7XX_CORE_IOPAD(0x3788, MUX_MODE14) /* AC6: P8.24: mmc3_dat1.off */
- DRA7XX_CORE_IOPAD(0x3784, MUX_MODE14) /* AC7: P8.25: mmc3_dat0.off */
- DRA7XX_CORE_IOPAD(0x35B8, MUX_MODE13) /* B3: P8.26: vin2a_d20.off */
- DRA7XX_CORE_IOPAD(0x35D8, MUX_MODE14) /* E11: P8.27a: vout1_vsync.off */
- DRA7XX_CORE_IOPAD(0x3628, MUX_MODE14) /* A8: P8.27b: vout1_d19.off */
- DRA7XX_CORE_IOPAD(0x35C8, MUX_MODE14) /* D11: P8.28a: vout1_clk.off */
- DRA7XX_CORE_IOPAD(0x362C, MUX_MODE14) /* C9: P8.28b: vout1_d20.off */
- DRA7XX_CORE_IOPAD(0x35D4, MUX_MODE14) /* C11: P8.29a: vout1_hsync.off */
- DRA7XX_CORE_IOPAD(0x3630, MUX_MODE14) /* A9: P8.29b: vout1_d21.off */
- DRA7XX_CORE_IOPAD(0x35CC, MUX_MODE14) /* B10: P8.30a: vout1_de.off */
- DRA7XX_CORE_IOPAD(0x3634, MUX_MODE14) /* B9: P8.30b: vout1_d22.off */
- DRA7XX_CORE_IOPAD(0x3614, MUX_MODE14) /* C8: P8.31a: vout1_d14.off */
- DRA7XX_CORE_IOPAD(0x373C, MUX_MODE14) /* G16: P8.31b: mcasp4_axr0.off */
- DRA7XX_CORE_IOPAD(0x3618, MUX_MODE14) /* C7: P8.32a: vout1_d15.off */
- DRA7XX_CORE_IOPAD(0x3740, MUX_MODE14) /* D17: P8.32b: mcasp4_axr1.off */
- DRA7XX_CORE_IOPAD(0x3610, MUX_MODE14) /* C6: P8.33a: vout1_d13.off */
- DRA7XX_CORE_IOPAD(0x34E8, MUX_MODE14) /* AF9: P8.33b: vin1a_fld0.off */
- DRA7XX_CORE_IOPAD(0x3608, MUX_MODE14) /* D8: P8.34a: vout1_d11.off */
- DRA7XX_CORE_IOPAD(0x3564, MUX_MODE14) /* G6: P8.34b: vin2a_vsync0.off */
- DRA7XX_CORE_IOPAD(0x360C, MUX_MODE14) /* A5: P8.35a: vout1_d12.off */
- DRA7XX_CORE_IOPAD(0x34E4, MUX_MODE14) /* AD9: P8.35b: vin1a_de0.off */
- DRA7XX_CORE_IOPAD(0x3604, MUX_MODE14) /* D7: P8.36a: vout1_d10.off */
- DRA7XX_CORE_IOPAD(0x3568, MUX_MODE14) /* F2: P8.36b: vin2a_d0.off */
- DRA7XX_CORE_IOPAD(0x35FC, MUX_MODE14) /* E8: P8.37a: vout1_d8.off */
- DRA7XX_CORE_IOPAD(0x3738, MUX_MODE14) /* A21: P8.37b: mcasp4_fsx.off */
- DRA7XX_CORE_IOPAD(0x3600, MUX_MODE14) /* D9: P8.38a: vout1_d9.off */
- DRA7XX_CORE_IOPAD(0x3734, MUX_MODE14) /* C18: P8.38b: mcasp4_aclkx.off */
- DRA7XX_CORE_IOPAD(0x35F4, MUX_MODE14) /* F8: P8.39: vout1_d6.off */
- DRA7XX_CORE_IOPAD(0x35F8, MUX_MODE14) /* E7: P8.40: vout1_d7.off */
- DRA7XX_CORE_IOPAD(0x35EC, MUX_MODE14) /* E9: P8.41: vout1_d4.off */
- DRA7XX_CORE_IOPAD(0x35F0, MUX_MODE14) /* F9: P8.42: vout1_d5.off */
- DRA7XX_CORE_IOPAD(0x35E4, MUX_MODE14) /* F10: P8.43: vout1_d2.off */
- DRA7XX_CORE_IOPAD(0x35E8, MUX_MODE14) /* G11: P8.44: vout1_d3.off */
- DRA7XX_CORE_IOPAD(0x35DC, MUX_MODE14) /* F11: P8.45a: vout1_d0.off */
- DRA7XX_CORE_IOPAD(0x361C, MUX_MODE14) /* B7: P8.45b: vout1_d16.off */
- DRA7XX_CORE_IOPAD(0x35E0, MUX_MODE14) /* G10: P8.46a: vout1_d1.off */
- DRA7XX_CORE_IOPAD(0x3638, MUX_MODE14) /* A10: P8.46b: vout1_d23.off */
- DRA7XX_CORE_IOPAD(0x372C, MUX_MODE14) /* B19: P9.11a: mcasp3_axr0.off */
- DRA7XX_CORE_IOPAD(0x3620, MUX_MODE14) /* B8: P9.11b: vout1_d17.off */
- DRA7XX_CORE_IOPAD(0x36AC, MUX_MODE14) /* B14: P9.12: mcasp1_aclkr.off */
- DRA7XX_CORE_IOPAD(0x3730, MUX_MODE14) /* C17: P9.13: mcasp3_axr1.off */
- DRA7XX_CORE_IOPAD(0x35AC, MUX_MODE10) /* D6: P9.14: vin2a_d17.off */
- DRA7XX_CORE_IOPAD(0x3514, MUX_MODE14) /* AG4: P9.15: vin1a_d8.off */
- DRA7XX_CORE_IOPAD(0x35B0, MUX_MODE13) /* C5: P9.16: vin2a_d18.off */
- DRA7XX_CORE_IOPAD(0x37CC, MUX_MODE14) /* B24: P9.17a: spi2_cs0.off */
- DRA7XX_CORE_IOPAD(0x36B8, MUX_MODE14) /* F12: P9.17b: mcasp1_axr1.off */
- DRA7XX_CORE_IOPAD(0x37C8, MUX_MODE14) /* G17: P9.18a: spi2_d0.off */
- DRA7XX_CORE_IOPAD(0x36B4, MUX_MODE14) /* G12: P9.18b: mcasp1_axr0.off */
- DRA7XX_CORE_IOPAD(0x3440, PIN_INPUT_PULLUP | MUX_MODE7) /* R6: P9.19a: gpmc_a0.i2c4_scl */
- DRA7XX_CORE_IOPAD(0x357C, PIN_INPUT_PULLUP | MUX_MODE12 ) /* F4: P9.19b: vin2a_d5.pr1_pru1_gpi2 */
- DRA7XX_CORE_IOPAD(0x3444, PIN_INPUT_PULLUP | MUX_MODE7) /* T9: P9.20a: gpmc_a1.i2c4_sda */
- DRA7XX_CORE_IOPAD(0x3578, PIN_INPUT_PULLUP | MUX_MODE12) /* D2: P9.20b: vin2a_d4.pr1_pru1_gpi1 */
- DRA7XX_CORE_IOPAD(0x34F0, MUX_MODE14) /* AF8: P9.21a: vin1a_vsync0.off */
- DRA7XX_CORE_IOPAD(0x37C4, MUX_MODE14) /* B22: P9.21b: spi2_d1.off */
- DRA7XX_CORE_IOPAD(0x369C, MUX_MODE14) /* B26: P9.22a: xref_clk2.off */
- DRA7XX_CORE_IOPAD(0x37C0, MUX_MODE14) /* A26: P9.22b: spi2_sclk.off */
- DRA7XX_CORE_IOPAD(0x37B4, MUX_MODE14) /* A22: P9.23: spi1_cs1.off */
- DRA7XX_CORE_IOPAD(0x368C, MUX_MODE14) /* F20: P9.24: gpio6_15.off */
- DRA7XX_CORE_IOPAD(0x3694, MUX_MODE14) /* D18: P9.25: xref_clk0.off */
- DRA7XX_CORE_IOPAD(0x3688, MUX_MODE14) /* E21: P9.26a: gpio6_14.off */
- DRA7XX_CORE_IOPAD(0x3544, MUX_MODE14) /* AE2: P9.26b: vin1a_d20.off */
- DRA7XX_CORE_IOPAD(0x35A0, MUX_MODE14) /* C3: P9.27a: vin2a_d14.off */
- DRA7XX_CORE_IOPAD(0x36B0, MUX_MODE14) /* J14: P9.27b: mcasp1_fsr.off */
- DRA7XX_CORE_IOPAD(0x36E0, MUX_MODE14) /* A12: P9.28: mcasp1_axr11.off */
- DRA7XX_CORE_IOPAD(0x36D8, MUX_MODE14) /* A11: P9.29a: mcasp1_axr9.off */
- DRA7XX_CORE_IOPAD(0x36A8, MUX_MODE14) /* D14: P9.29b: mcasp1_fsx.off */
- DRA7XX_CORE_IOPAD(0x36DC, MUX_MODE14) /* B13: P9.30: mcasp1_axr10.off */
- DRA7XX_CORE_IOPAD(0x36D4, MUX_MODE14) /* B12: P9.31a: mcasp1_axr8.off */
- DRA7XX_CORE_IOPAD(0x36A4, MUX_MODE14) /* C14: P9.31b: mcasp1_aclkx.off */
- DRA7XX_CORE_IOPAD(0x36A0, MUX_MODE14) /* C23: P9.41a: xref_clk3.off */
- DRA7XX_CORE_IOPAD(0x3580, MUX_MODE14) /* C1: P9.41b: vin2a_d6.off */
- DRA7XX_CORE_IOPAD(0x36E4, MUX_MODE14) /* E14: P9.42a: mcasp1_axr12.off */
- DRA7XX_CORE_IOPAD(0x359C, MUX_MODE14) /* C2: P9.42b: vin2a_d13.off */
- >;
- };
+ // cape_pins_default: cape_pins_default {
+ // pinctrl-single,pins = <
+ // DRA7XX_CORE_IOPAD(0x379C, MUX_MODE14) /* AB8: P8.3: mmc3_dat6.off */
+ // DRA7XX_CORE_IOPAD(0x37A0, MUX_MODE14) /* AB5: P8.4: mmc3_dat7.off */
+ // DRA7XX_CORE_IOPAD(0x378C, MUX_MODE14) /* AC9: P8.5: mmc3_dat2.off */
+ // DRA7XX_CORE_IOPAD(0x3790, MUX_MODE14) /* AC3: P8.6: mmc3_dat3.off */
+ // DRA7XX_CORE_IOPAD(0x36EC, MUX_MODE14) /* G14: P8.7: mcasp1_axr14.off */
+ // DRA7XX_CORE_IOPAD(0x36F0, MUX_MODE14) /* F14: P8.8: mcasp1_axr15.off */
+ // DRA7XX_CORE_IOPAD(0x3698, MUX_MODE14) /* E17: P8.9: xref_clk1.off */
+ // DRA7XX_CORE_IOPAD(0x36E8, MUX_MODE14) /* A13: P8.10: mcasp1_axr13.off */
+ // DRA7XX_CORE_IOPAD(0x3510, MUX_MODE14) /* AH4: P8.11: vin1a_d7.off */
+ // DRA7XX_CORE_IOPAD(0x350C, MUX_MODE14) /* AG6: P8.12: vin1a_d6.off */
+ // DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE12) /* D3: P8.13: vin2a_d10.off */
+ // DRA7XX_CORE_IOPAD(0x3598, MUX_MODE14) /* D5: P8.14: vin2a_d12.off */
+ // DRA7XX_CORE_IOPAD(0x3570, MUX_MODE14) /* D1: P8.15a: vin2a_d2.off */
+ // DRA7XX_CORE_IOPAD(0x35B4, MUX_MODE13) /* A3: P8.15b: vin2a_d19.off */
+ // DRA7XX_CORE_IOPAD(0x35BC, MUX_MODE13) /* B4: P8.16: vin2a_d21.off */
+ // DRA7XX_CORE_IOPAD(0x3624, MUX_MODE14) /* A7: P8.17: vout1_d18.off */
+ // DRA7XX_CORE_IOPAD(0x3588, PIN_INPUT | MUX_MODE12) /* F5: P8.18: vin2a_d8.off */
+ // DRA7XX_CORE_IOPAD(0x358C, PIN_INPUT | MUX_MODE12) /* E6: P8.19: vin2a_d9.off */
+ // DRA7XX_CORE_IOPAD(0x3780, MUX_MODE14) /* AC4: P8.20: mmc3_cmd.off */
+ // DRA7XX_CORE_IOPAD(0x377C, MUX_MODE14) /* AD4: P8.21: mmc3_clk.off */
+ // DRA7XX_CORE_IOPAD(0x3798, MUX_MODE14) /* AD6: P8.22: mmc3_dat5.off */
+ // DRA7XX_CORE_IOPAD(0x3794, MUX_MODE14) /* AC8: P8.23: mmc3_dat4.off */
+ // DRA7XX_CORE_IOPAD(0x3788, MUX_MODE14) /* AC6: P8.24: mmc3_dat1.off */
+ // DRA7XX_CORE_IOPAD(0x3784, MUX_MODE14) /* AC7: P8.25: mmc3_dat0.off */
+ // DRA7XX_CORE_IOPAD(0x35B8, MUX_MODE13) /* B3: P8.26: vin2a_d20.off */
+ // DRA7XX_CORE_IOPAD(0x35D8, MUX_MODE14) /* E11: P8.27a: vout1_vsync.off */
+ // DRA7XX_CORE_IOPAD(0x3628, MUX_MODE14) /* A8: P8.27b: vout1_d19.off */
+ // DRA7XX_CORE_IOPAD(0x35C8, MUX_MODE14) /* D11: P8.28a: vout1_clk.off */
+ // DRA7XX_CORE_IOPAD(0x362C, MUX_MODE14) /* C9: P8.28b: vout1_d20.off */
+ // DRA7XX_CORE_IOPAD(0x35D4, MUX_MODE14) /* C11: P8.29a: vout1_hsync.off */
+ // DRA7XX_CORE_IOPAD(0x3630, MUX_MODE14) /* A9: P8.29b: vout1_d21.off */
+ // DRA7XX_CORE_IOPAD(0x35CC, MUX_MODE14) /* B10: P8.30a: vout1_de.off */
+ // DRA7XX_CORE_IOPAD(0x3634, MUX_MODE14) /* B9: P8.30b: vout1_d22.off */
+ // DRA7XX_CORE_IOPAD(0x3614, MUX_MODE14) /* C8: P8.31a: vout1_d14.off */
+ // DRA7XX_CORE_IOPAD(0x373C, MUX_MODE14) /* G16: P8.31b: mcasp4_axr0.off */
+ // DRA7XX_CORE_IOPAD(0x3618, MUX_MODE14) /* C7: P8.32a: vout1_d15.off */
+ // DRA7XX_CORE_IOPAD(0x3740, MUX_MODE14) /* D17: P8.32b: mcasp4_axr1.off */
+ // DRA7XX_CORE_IOPAD(0x3610, MUX_MODE14) /* C6: P8.33a: vout1_d13.off */
+ // DRA7XX_CORE_IOPAD(0x34E8, MUX_MODE14) /* AF9: P8.33b: vin1a_fld0.off */
+ // DRA7XX_CORE_IOPAD(0x3608, MUX_MODE14) /* D8: P8.34a: vout1_d11.off */
+ // DRA7XX_CORE_IOPAD(0x3564, MUX_MODE14) /* G6: P8.34b: vin2a_vsync0.off */
+ // DRA7XX_CORE_IOPAD(0x360C, MUX_MODE14) /* A5: P8.35a: vout1_d12.off */
+ // DRA7XX_CORE_IOPAD(0x34E4, MUX_MODE14) /* AD9: P8.35b: vin1a_de0.off */
+ // DRA7XX_CORE_IOPAD(0x3604, MUX_MODE14) /* D7: P8.36a: vout1_d10.off */
+ // DRA7XX_CORE_IOPAD(0x3568, MUX_MODE14) /* F2: P8.36b: vin2a_d0.off */
+ // DRA7XX_CORE_IOPAD(0x35FC, MUX_MODE14) /* E8: P8.37a: vout1_d8.off */
+ // DRA7XX_CORE_IOPAD(0x3738, MUX_MODE14) /* A21: P8.37b: mcasp4_fsx.off */
+ // DRA7XX_CORE_IOPAD(0x3600, MUX_MODE14) /* D9: P8.38a: vout1_d9.off */
+ // DRA7XX_CORE_IOPAD(0x3734, MUX_MODE14) /* C18: P8.38b: mcasp4_aclkx.off */
+ // DRA7XX_CORE_IOPAD(0x35F4, MUX_MODE14) /* F8: P8.39: vout1_d6.off */
+ // DRA7XX_CORE_IOPAD(0x35F8, MUX_MODE14) /* E7: P8.40: vout1_d7.off */
+ // DRA7XX_CORE_IOPAD(0x35EC, MUX_MODE14) /* E9: P8.41: vout1_d4.off */
+ // DRA7XX_CORE_IOPAD(0x35F0, MUX_MODE14) /* F9: P8.42: vout1_d5.off */
+ // DRA7XX_CORE_IOPAD(0x35E4, MUX_MODE14) /* F10: P8.43: vout1_d2.off */
+ // DRA7XX_CORE_IOPAD(0x35E8, MUX_MODE14) /* G11: P8.44: vout1_d3.off */
+ // DRA7XX_CORE_IOPAD(0x35DC, MUX_MODE14) /* F11: P8.45a: vout1_d0.off */
+ // DRA7XX_CORE_IOPAD(0x361C, MUX_MODE14) /* B7: P8.45b: vout1_d16.off */
+ // DRA7XX_CORE_IOPAD(0x35E0, MUX_MODE14) /* G10: P8.46a: vout1_d1.off */
+ // DRA7XX_CORE_IOPAD(0x3638, MUX_MODE14) /* A10: P8.46b: vout1_d23.off */
+ // DRA7XX_CORE_IOPAD(0x372C, MUX_MODE14) /* B19: P9.11a: mcasp3_axr0.off */
+ // DRA7XX_CORE_IOPAD(0x3620, MUX_MODE14) /* B8: P9.11b: vout1_d17.off */
+ // DRA7XX_CORE_IOPAD(0x36AC, MUX_MODE14) /* B14: P9.12: mcasp1_aclkr.off */
+ // DRA7XX_CORE_IOPAD(0x3730, MUX_MODE14) /* C17: P9.13: mcasp3_axr1.off */
+ // DRA7XX_CORE_IOPAD(0x35AC, MUX_MODE10) /* D6: P9.14: vin2a_d17.off */
+ // DRA7XX_CORE_IOPAD(0x3514, MUX_MODE14) /* AG4: P9.15: vin1a_d8.off */
+ // DRA7XX_CORE_IOPAD(0x35B0, MUX_MODE13) /* C5: P9.16: vin2a_d18.off */
+ // DRA7XX_CORE_IOPAD(0x37CC, MUX_MODE14) /* B24: P9.17a: spi2_cs0.off */
+ // DRA7XX_CORE_IOPAD(0x36B8, MUX_MODE14) /* F12: P9.17b: mcasp1_axr1.off */
+ // DRA7XX_CORE_IOPAD(0x37C8, MUX_MODE14) /* G17: P9.18a: spi2_d0.off */
+ // DRA7XX_CORE_IOPAD(0x36B4, MUX_MODE14) /* G12: P9.18b: mcasp1_axr0.off */
+ // DRA7XX_CORE_IOPAD(0x3440, PIN_INPUT_PULLUP | MUX_MODE7) /* R6: P9.19a: gpmc_a0.i2c4_scl */
+ // DRA7XX_CORE_IOPAD(0x357C, PIN_INPUT_PULLUP | MUX_MODE12 ) /* F4: P9.19b: vin2a_d5.pr1_pru1_gpi2 */
+ // DRA7XX_CORE_IOPAD(0x3444, PIN_INPUT_PULLUP | MUX_MODE7) /* T9: P9.20a: gpmc_a1.i2c4_sda */
+ // DRA7XX_CORE_IOPAD(0x3578, PIN_INPUT_PULLUP | MUX_MODE12) /* D2: P9.20b: vin2a_d4.pr1_pru1_gpi1 */
+ // DRA7XX_CORE_IOPAD(0x34F0, MUX_MODE14) /* AF8: P9.21a: vin1a_vsync0.off */
+ // DRA7XX_CORE_IOPAD(0x37C4, MUX_MODE14) /* B22: P9.21b: spi2_d1.off */
+ // DRA7XX_CORE_IOPAD(0x369C, MUX_MODE14) /* B26: P9.22a: xref_clk2.off */
+ // DRA7XX_CORE_IOPAD(0x37C0, MUX_MODE14) /* A26: P9.22b: spi2_sclk.off */
+ // DRA7XX_CORE_IOPAD(0x37B4, MUX_MODE14) /* A22: P9.23: spi1_cs1.off */
+ // DRA7XX_CORE_IOPAD(0x368C, MUX_MODE14) /* F20: P9.24: gpio6_15.off */
+ // DRA7XX_CORE_IOPAD(0x3694, MUX_MODE14) /* D18: P9.25: xref_clk0.off */
+ // DRA7XX_CORE_IOPAD(0x3688, MUX_MODE14) /* E21: P9.26a: gpio6_14.off */
+ // DRA7XX_CORE_IOPAD(0x3544, MUX_MODE14) /* AE2: P9.26b: vin1a_d20.off */
+ // DRA7XX_CORE_IOPAD(0x35A0, MUX_MODE14) /* C3: P9.27a: vin2a_d14.off */
+ // DRA7XX_CORE_IOPAD(0x36B0, MUX_MODE14) /* J14: P9.27b: mcasp1_fsr.off */
+ // DRA7XX_CORE_IOPAD(0x36E0, MUX_MODE14) /* A12: P9.28: mcasp1_axr11.off */
+ // DRA7XX_CORE_IOPAD(0x36D8, MUX_MODE14) /* A11: P9.29a: mcasp1_axr9.off */
+ // DRA7XX_CORE_IOPAD(0x36A8, MUX_MODE14) /* D14: P9.29b: mcasp1_fsx.off */
+ // DRA7XX_CORE_IOPAD(0x36DC, MUX_MODE14) /* B13: P9.30: mcasp1_axr10.off */
+ // DRA7XX_CORE_IOPAD(0x36D4, MUX_MODE14) /* B12: P9.31a: mcasp1_axr8.off */
+ // DRA7XX_CORE_IOPAD(0x36A4, MUX_MODE14) /* C14: P9.31b: mcasp1_aclkx.off */
+ // DRA7XX_CORE_IOPAD(0x36A0, MUX_MODE14) /* C23: P9.41a: xref_clk3.off */
+ // DRA7XX_CORE_IOPAD(0x3580, MUX_MODE14) /* C1: P9.41b: vin2a_d6.off */
+ // DRA7XX_CORE_IOPAD(0x36E4, MUX_MODE14) /* E14: P9.42a: mcasp1_axr12.off */
+ // DRA7XX_CORE_IOPAD(0x359C, MUX_MODE14) /* C2: P9.42b: vin2a_d13.off */
+ // >;
+ // };
};
&vip2 {
--
GitLab
From bd5af8701d66a842ffdaab3b1620dcba8852a1f5 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Sun, 12 Jul 2020 19:59:06 +0530
Subject: [PATCH 29/86] Removing macros
The macros have been removed and the exact pin configuration has been shifted to src/arm/am572x-bone-common-univ.dtsi
---
include/dt-bindings/board/am572x-bbai-pins.h | 606 -------------------
1 file changed, 606 deletions(-)
diff --git a/include/dt-bindings/board/am572x-bbai-pins.h b/include/dt-bindings/board/am572x-bbai-pins.h
index ac58031d..c2639592 100644
--- a/include/dt-bindings/board/am572x-bbai-pins.h
+++ b/include/dt-bindings/board/am572x-bbai-pins.h
@@ -106,610 +106,4 @@
#define P9_42A(mode) DRA7XX_CORE_IOPAD(0x36E4, mode) /* E14: P9.42a: mcasp1_axr12 */
#define P9_42B(mode) DRA7XX_CORE_IOPAD(0x359C, mode) /* C2: P9.42b: vin2a_d13 */
-
-/********************************/
-/* BBAI P8 Header pinmux macros */
-/********************************/
-/* P8_01 GND */
-/* P8_02 GND */
-
-/* P8_03 (ball AB8) gpio1_24 */
-#define P8_03_DEFAULT P8_03( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
-#define P8_03_GPIO P8_03( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
-#define P8_03_GPIO_PU P8_03( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
-#define P8_03_GPIO_PD P8_03( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
-#define P8_03_GPIO_INPUT P8_03( PIN_INPUT | MUX_MODE14) /* mmc3_dat6.gpio1_24 */
-
-/* P8_04 (ball AB5) gpio1_25 */
-#define P8_04_DEFAULT P8_04( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
-#define P8_04_GPIO P8_04( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
-#define P8_04_GPIO_PU P8_04( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
-#define P8_04_GPIO_PD P8_04( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
-#define P8_04_GPIO_INPUT P8_04( PIN_INPUT | MUX_MODE14) /* mmc3_dat7.gpio1_25 */
-
-/* P8_05 (ball AC9) gpio7_1 */
-#define P8_05_DEFAULT P8_05( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
-#define P8_05_GPIO P8_05( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
-#define P8_05_GPIO_PU P8_05( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
-#define P8_05_GPIO_PD P8_05( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
-#define P8_05_GPIO_INPUT P8_05( PIN_INPUT | MUX_MODE14) /* mmc3_dat2.gpio7_1 */
-
-/* P8_06 (ball AC3) gpio7_2 */
-#define P8_06_DEFAULT P8_06( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
-#define P8_06_GPIO P8_06( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
-#define P8_06_GPIO_PU P8_06( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
-#define P8_06_GPIO_PD P8_06( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
-#define P8_06_GPIO_INPUT P8_06( PIN_INPUT | MUX_MODE14) /* mmc3_dat3.gpio7_2 */
-
-/* P8_07 (ball G14) gpio6_5*/
-#define P8_07_DEFAULT P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
-#define P8_07_GPIO P8_07( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
-#define P8_07_GPIO_PU P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
-#define P8_07_GPIO_PD P8_07( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
-#define P8_07_GPIO_INPUT P8_07( PIN_INPUT | MUX_MODE14) /* mcasp1_axr14.gpio6_5 */
-#define P8_07_TIMER P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* mcasp1_axr14.timer11 */
-
-/* P8_08 (ball F14) gpio6_6 */
-#define P8_08_DEFAULT P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
-#define P8_08_GPIO P8_08( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
-#define P8_08_GPIO_PU P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
-#define P8_08_GPIO_PD P8_08( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
-#define P8_08_GPIO_INPUT P8_08( PIN_INPUT | MUX_MODE14) /* mcasp1_axr15.gpio6_6 */
-#define P8_08_TIMER P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* mcasp1_axr15.timer12 */
-
-/* P8_09 (ball E17) gpio6_18 */
-#define P8_09_DEFAULT P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* xref_clk1.gpio6_18 */
-#define P8_09_GPIO P8_09( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* xref_clk1.gpio6_18 */
-#define P8_09_GPIO_PU P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* xref_clk1.gpio6_18 */
-#define P8_09_GPIO_PD P8_09( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* xref_clk1.gpio6_18 */
-#define P8_09_GPIO_INPUT P8_09( PIN_INPUT | MUX_MODE14) /* xref_clk1.gpio6_18 */
-#define P8_09_TIMER P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* xref_clk1.timer14 */
-
-/* P8_10 (ball A13) gpio6_4 */
-#define P8_10_DEFAULT P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
-#define P8_10_GPIO P8_10( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
-#define P8_10_GPIO_PU P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
-#define P8_10_GPIO_PD P8_10( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
-#define P8_10_GPIO_INPUT P8_10( PIN_INPUT | MUX_MODE14) /* mcasp1_axr13.gpio6_4 */
-#define P8_10_TIMER P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* mcasp1_axr13.timer10 */
-
-/* P8_11 (ball AH4) gpio3_11 */
-#define P8_11_DEFAULT P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d7.gpio3_11 */
-#define P8_11_GPIO P8_11( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin1a_d7.gpio3_11 */
-#define P8_11_GPIO_PU P8_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin1a_d7.gpio3_11 */
-#define P8_11_GPIO_PD P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d7.gpio3_11 */
-#define P8_11_GPIO_INPUT P8_11( PIN_INPUT | MUX_MODE14) /* vin1a_d7.gpio3_11 */
-#define P8_11_QEP P8_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* vin1a_d7.eQEP2B_in */
-#define P8_11_PRUOUT P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vin1a_d7.pr1_pru0_gpo4 */
-
-/* P8_12 (ball AG6) gpio3_10 */
-#define P8_12_DEFAULT P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d6.gpio3_10 */
-#define P8_12_GPIO P8_12( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin1a_d6.gpio3_10 */
-#define P8_12_GPIO_PU P8_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin1a_d6.gpio3_10 */
-#define P8_12_GPIO_PD P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d6.gpio3_10 */
-#define P8_12_GPIO_INPUT P8_12( PIN_INPUT | MUX_MODE14) /* vin1a_d6.gpio3_10 */
-#define P8_12_QEP P8_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* vin1a_d6.eQEP2A_in */
-#define P8_12_PRUOUT P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vin1a_d6.pr1_pru0_gpo3 */
-
-/* P8_13 (ball D3) gpio4_11 */
-#define P8_13_DEFAULT P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d10.gpio4_11 */
-#define P8_13_GPIO P8_13( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d10.gpio4_11 */
-#define P8_13_GPIO_PU P8_13( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d10.gpio4_11 */
-#define P8_13_GPIO_PD P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d10.gpio4_11 */
-#define P8_13_GPIO_INPUT P8_13( PIN_INPUT | MUX_MODE14) /* vin2a_d10.gpio4_11 */
-#define P8_13_PWM P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d10.ehrpwm2B */
-
-/* P8_14 (ball D5) gpio4_13*/
-#define P8_14_DEFAULT P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d12.gpio4_13 */
-#define P8_14_GPIO P8_14( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d12.gpio4_13 */
-#define P8_14_GPIO_PU P8_14( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d12.gpio4_13 */
-#define P8_14_GPIO_PD P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d12.gpio4_13 */
-#define P8_14_GPIO_INPUT P8_14( PIN_INPUT | MUX_MODE14) /* vin2a_d12.gpio4_13 */
-#define P8_14_PWM P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d12.eCAP2_in_PWM2_out */
-
-/* P8_15 (ball D1) gpio4_3 & (ball A3) gpio4_27*/
-#define P8_15_DEFAULT P8_15A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_15B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d2.gpio4_3, vin2a_d19.off */
-#define P8_15_GPIO P8_15A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_15B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d2.gpio4_3, vin2a_d19.off */
-#define P8_15_GPIO_PU P8_15A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_15B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d2.gpio4_3, vin2a_d19.off */
-#define P8_15_GPIO_PD P8_15A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_15B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d2.gpio4_3, vin2a_d19.off */
-#define P8_15_GPIO_INPUT P8_15A( PIN_INPUT | MUX_MODE14) P8_15B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d2.gpio4_3, vin2a_d19.off */
-#define P8_15_PRU_ECAP P8_15A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE11) P8_15B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d2.pr1_ecap0_ecap_capin_apwm_o, vin2a_d19.off */
-#define P8_15_PRUIN P8_15B( PIN_INPUT | MUX_MODE12) P8_15A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d19.pr1_pru1_gpi16, vin2a_d2.off */
-
-/* P8_16 (ball B4) gpio4_29 */
-#define P8_16_DEFAULT P8_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d21.gpio4_29 */
-#define P8_16_GPIO P8_16( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d21.gpio4_29 */
-#define P8_16_GPIO_PU P8_16( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d21.gpio4_29 */
-#define P8_16_GPIO_PD P8_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d21.gpio4_29 */
-#define P8_16_GPIO_INPUT P8_16( PIN_INPUT | MUX_MODE14) /* vin2a_d21.gpio4_29 */
-#define P8_16_PRUIN P8_16( PIN_INPUT | MUX_MODE12) /* vin2a_d21.pr1_pru1_gpi18 */
-
-/* P8_17 (ball A7) gpio8_18 */
-#define P8_17_DEFAULT P8_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d18.gpio8_18 */
-#define P8_17_GPIO P8_17( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d18.gpio8_18 */
-#define P8_17_GPIO_PU P8_17( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d18.gpio8_18 */
-#define P8_17_GPIO_PD P8_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d18.gpio8_18 */
-#define P8_17_GPIO_INPUT P8_17( PIN_INPUT | MUX_MODE14) /* vout1_d18.gpio8_18 */
-
-/* P8_18 (ball F5) gpio4_9 */
-#define P8_18_DEFAULT P8_18( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d8.gpio4_9 */
-#define P8_18_GPIO P8_18( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d8.gpio4_9 */
-#define P8_18_GPIO_PU P8_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d8.gpio4_9 */
-#define P8_18_GPIO_PD P8_18( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d8.gpio4_9 */
-#define P8_18_GPIO_INPUT P8_18( PIN_INPUT | MUX_MODE14) /* vin2a_d8.gpio4_9 */
-#define P8_18_QEP P8_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) /* vin2a_d8.eQEP2_strobe */
-
-/* P8_19 (ball E6) gpio4_10 */
-#define P8_19_DEFAULT P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d9.gpio4_10 */
-#define P8_19_GPIO P8_19( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d9.gpio4_10 */
-#define P8_19_GPIO_PU P8_19( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d9.gpio4_10 */
-#define P8_19_GPIO_PD P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d9.gpio4_10 */
-#define P8_19_GPIO_INPUT P8_19( PIN_INPUT | MUX_MODE14) /* vin2a_d9.gpio4_10 */
-#define P8_19_PWM P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d9.ehrpwm2A */
-
-/* P8_20 (ball AC4) gpio6_30 */
-#define P8_20_DEFAULT P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
-#define P8_20_GPIO P8_20( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
-#define P8_20_GPIO_PU P8_20( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
-#define P8_20_GPIO_PD P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
-#define P8_20_GPIO_INPUT P8_20( PIN_INPUT | MUX_MODE14) /* mmc3_cmd.gpio6_30 */
-#define P8_20_PRUOUT P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* mmc3_cmd.pr2_pru0_gpo3 */
-#define P8_20_PRUIN P8_20( PIN_INPUT | MUX_MODE12) /* mmc3_cmd.pr2_pru0_gpi3 */
-
-/* P8_21 (ball AD4) gpio6_29 */
-#define P8_21_DEFAULT P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_clk.gpio6_29 */
-#define P8_21_GPIO P8_21( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_clk.gpio6_29 */
-#define P8_21_GPIO_PU P8_21( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_clk.gpio6_29 */
-#define P8_21_GPIO_PD P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_clk.gpio6_29 */
-#define P8_21_GPIO_INPUT P8_21( PIN_INPUT | MUX_MODE14) /* mmc3_clk.gpio6_29 */
-#define P8_21_PRUOUT P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* mmc3_clk.pr2_pru0_gpo2 */
-#define P8_21_PRUIN P8_21( PIN_INPUT | MUX_MODE12) /* mmc3_clk.pr2_pru0_gpi2 */
-
-/* P8_22 (ball AD6) gpio1_23 */
-#define P8_22_DEFAULT P8_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
-#define P8_22_GPIO P8_22( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
-#define P8_22_GPIO_PU P8_22( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
-#define P8_22_GPIO_PD P8_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
-#define P8_22_GPIO_INPUT P8_22( PIN_INPUT | MUX_MODE14) /* mmc3_dat5.gpio1_23 */
-
-/* P8_23 (ball AC8) gpio1_22 */
-#define P8_23_DEFAULT P8_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
-#define P8_23_GPIO P8_23( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
-#define P8_23_GPIO_PU P8_23( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
-#define P8_23_GPIO_PD P8_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
-#define P8_23_GPIO_INPUT P8_23( PIN_INPUT | MUX_MODE14) /* mmc3_dat4.gpio1_22 */
-
-/* P8_24 (ball AC6) gpio7_0 */
-#define P8_24_DEFAULT P8_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
-#define P8_24_GPIO P8_24( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
-#define P8_24_GPIO_PU P8_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
-#define P8_24_GPIO_PD P8_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
-#define P8_24_GPIO_INPUT P8_24( PIN_INPUT | MUX_MODE14) /* mmc3_dat1.gpio7_0 */
-
-/* P8_25 (ball AC7) gpio6_31 */
-#define P8_25_DEFAULT P8_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
-#define P8_25_GPIO P8_25( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
-#define P8_25_GPIO_PU P8_25( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
-#define P8_25_GPIO_PD P8_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
-#define P8_25_GPIO_INPUT P8_25( PIN_INPUT | MUX_MODE14) /* mmc3_dat0.gpio6_31 */
-
-/* P8_26 (ball B3) gpio4_28 */
-#define P8_26_DEFAULT P8_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d20.gpio4_28 */
-#define P8_26_GPIO P8_26( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d20.gpio4_28 */
-#define P8_26_GPIO_PU P8_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d20.gpio4_28 */
-#define P8_26_GPIO_PD P8_26( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d20.gpio4_28 */
-#define P8_26_GPIO_INPUT P8_26( PIN_INPUT | MUX_MODE14) /* vin2a_d20.gpio4_28 */
-
-/* P8_27 (ball E11) gpio4_23 & (ball A8) gpio8_19 */
-#define P8_27_DEFAULT P8_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_27B( PIN_OUTPUT | MUX_MODE15) /* vout1_vsync.gpio4_23, vout1_d19.off */
-#define P8_27_GPIO P8_27A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_27B( PIN_OUTPUT | MUX_MODE15) /* vout1_vsync.gpio4_23, vout1_d19.off */
-#define P8_27_GPIO_PU P8_27A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_27B( PIN_OUTPUT | MUX_MODE15) /* vout1_vsync.gpio4_23, vout1_d19.off */
-#define P8_27_GPIO_PD P8_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_27B( PIN_OUTPUT | MUX_MODE15) /* vout1_vsync.gpio4_23, vout1_d19.off */
-#define P8_27_GPIO_INPUT P8_27A( PIN_INPUT | MUX_MODE14) P8_27B( PIN_OUTPUT | MUX_MODE15) /* vout1_vsync.gpio4_23, vout1_d19.off */
-#define P8_27_PRUOUT P8_27B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P8_27A( PIN_OUTPUT | MUX_MODE15) /* vout1_d19.pr2_pru0_gpo16, vout1_vsync.off */
-#define P8_27_PRUIN P8_27B( PIN_INPUT | MUX_MODE12) P8_27A( PIN_OUTPUT | MUX_MODE15) /* vout1_d19.pr2_pru0_gpi16, vout1_vsync.off */
-
-/* P8_28 (ball D11) gpio4_19 & (ball C9) gpio8_20 */
-#define P8_28A_DEFAULT P8_28A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_28B( PIN_OUTPUT | MUX_MODE15) /* vout1_clk.gpio4_19, vout1_d20.off */
-#define P8_28A_GPIO P8_28A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_28B( PIN_OUTPUT | MUX_MODE15) /* vout1_clk.gpio4_19, vout1_d20.off */
-#define P8_28A_GPIO_PU P8_28A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_28B( PIN_OUTPUT | MUX_MODE15) /* vout1_clk.gpio4_19, vout1_d20.off */
-#define P8_28A_GPIO_PD P8_28A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_28B( PIN_OUTPUT | MUX_MODE15) /* vout1_clk.gpio4_19, vout1_d20.off */
-#define P8_28A_GPIO_INPUT P8_28A( PIN_INPUT | MUX_MODE14) P8_28B( PIN_OUTPUT | MUX_MODE15) /* vout1_clk.gpio4_19, vout1_d20.off */
-#define P8_28A_PRUOUT P8_28B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P8_28A( PIN_OUTPUT | MUX_MODE15) /* vout1_d20.pr2_pru0_gpo17, vout1_clk.off */
-#define P8_28A_PRUIN P8_28B( PIN_INPUT | MUX_MODE12) P8_28A( PIN_OUTPUT | MUX_MODE15) /* vout1_d20.pr2_pru0_gpi17, vout1_clk.off */
-
-/* P8_29 (ball C11) gpio4_22 & (ball A9) gpio8_21*/
-#define P8_29_DEFAULT P8_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_29B( PIN_OUTPUT | MUX_MODE15) /* vout1_hsync.gpio4_22, vout1_d21.off */
-#define P8_29_GPIO P8_29A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_29B( PIN_OUTPUT | MUX_MODE15) /* vout1_hsync.gpio4_22, vout1_d21.off */
-#define P8_29_GPIO_PU P8_29A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_29B( PIN_OUTPUT | MUX_MODE15) /* vout1_hsync.gpio4_22, vout1_d21.off */
-#define P8_29_GPIO_PD P8_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_29B( PIN_OUTPUT | MUX_MODE15) /* vout1_hsync.gpio4_22, vout1_d21.off */
-#define P8_29_GPIO_INPUT P8_29A( PIN_INPUT | MUX_MODE14) P8_29B( PIN_OUTPUT | MUX_MODE15) /* vout1_hsync.gpio4_22, vout1_d21.off */
-#define P8_29_PRUOUT P8_29B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P8_29A( PIN_OUTPUT | MUX_MODE15) /* vout1_d21.pr2_pru0_gpo18, vout1_hsync.off */
-#define P8_29_PRUIN P8_29B( PIN_INPUT | MUX_MODE12) P8_29A( PIN_OUTPUT | MUX_MODE15) /* vout1_d21.pr2_pru0_gpi18, vout1_hsync.off */
-
-/* P8_30 (ball B10) gpio4_20 & (ball B9) gpio8_22 */
-#define P8_30_DEFAULT P8_30A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_30B( PIN_OUTPUT | MUX_MODE15) /* vout1_de.gpio4_20, vout1_d22.off */
-#define P8_30_GPIO P8_30A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_30B( PIN_OUTPUT | MUX_MODE15) /* vout1_de.gpio4_20, vout1_d22.off */
-#define P8_30_GPIO_PU P8_30A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_30B( PIN_OUTPUT | MUX_MODE15) /* vout1_de.gpio4_20, vout1_d22.off */
-#define P8_30_GPIO_PD P8_30A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_30B( PIN_OUTPUT | MUX_MODE15) /* vout1_de.gpio4_20, vout1_d22.off */
-#define P8_30_GPIO_INPUT P8_30A( PIN_INPUT | MUX_MODE14) P8_30B( PIN_OUTPUT | MUX_MODE15) /* vout1_de.gpio4_20, vout1_d22.off */
-#define P8_30_PRUOUT P8_30B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P8_30A( PIN_OUTPUT | MUX_MODE15) /* vout1_d22.pr2_pru0_gpo19, vout1_de.off */
-#define P8_30_PRUIN P8_30B( PIN_INPUT | MUX_MODE12) P8_30A( PIN_OUTPUT | MUX_MODE15) /* vout1_d22.pr2_pru0_gpi19, vout1_de.off */
-
-/* P8_31 (ball C8) gpio8_14 & (ball G16) */
-#define P8_31_DEFAULT P8_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_31B( PIN_OUTPUT | MUX_MODE15) /* vout1_d14.gpio8_14, mcasp4_axr0.off */
-#define P8_31_GPIO P8_31A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_31B( PIN_OUTPUT | MUX_MODE15) /* vout1_d14.gpio8_14, mcasp4_axr0.off */
-#define P8_31_GPIO_PU P8_31A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_31B( PIN_OUTPUT | MUX_MODE15) /* vout1_d14.gpio8_14, mcasp4_axr0.off */
-#define P8_31_GPIO_PD P8_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_31B( PIN_OUTPUT | MUX_MODE15) /* vout1_d14.gpio8_14, mcasp4_axr0.off */
-#define P8_31_GPIO_INPUT P8_31A( PIN_INPUT | MUX_MODE14) P8_31B( PIN_OUTPUT | MUX_MODE15) /* vout1_d14.gpio8_14, mcasp4_axr0.off */
-#define P8_31_UART P8_31B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) P8_31A( PIN_OUTPUT | MUX_MODE15) /* mcasp4_axr0.uart4_rxd,vout1_d14.off */
-
-/* P8_32 (ball C7) gpio8_15 & (ball D17) */
-#define P8_32_DEFAULT P8_32A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_32B( PIN_OUTPUT | MUX_MODE15) /* vout1_d15.gpio8_15, mcasp4_axr1.off */
-#define P8_32_GPIO P8_32A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_32B( PIN_OUTPUT | MUX_MODE15) /* vout1_d15.gpio8_15, mcasp4_axr1.off */
-#define P8_32_GPIO_PU P8_32A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_32B( PIN_OUTPUT | MUX_MODE15) /* vout1_d15.gpio8_15, mcasp4_axr1.off */
-#define P8_32_GPIO_PD P8_32A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_32B( PIN_OUTPUT | MUX_MODE15) /* vout1_d15.gpio8_15, mcasp4_axr1.off */
-#define P8_32_GPIO_INPUT P8_32A( PIN_INPUT | MUX_MODE14) P8_32B( PIN_OUTPUT | MUX_MODE15) /* vout1_d15.gpio8_15, mcasp4_axr1.off */
-#define P8_32_UART P8_32B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) P8_32A( PIN_OUTPUT | MUX_MODE15) /* mcasp4_axr1.uart4_txd, vout1_d15.off */
-
-/* P8_33 (ball C6) gpio8_13 & (ball AF9) gpio3_1 */
-#define P8_33_DEFAULT P8_33A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_33B( PIN_OUTPUT | MUX_MODE15) /* vout1_d13.gpio8_13, vin1a_fld0.off */
-#define P8_33_GPIO P8_33A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_33B( PIN_OUTPUT | MUX_MODE15) /* vout1_d13.gpio8_13, vin1a_fld0.off */
-#define P8_33_GPIO_PU P8_33A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_33B( PIN_OUTPUT | MUX_MODE15) /* vout1_d13.gpio8_13, vin1a_fld0.off */
-#define P8_33_GPIO_PD P8_33A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_33B( PIN_OUTPUT | MUX_MODE15) /* vout1_d13.gpio8_13, vin1a_fld0.off */
-#define P8_33_GPIO_INPUT P8_33A( PIN_INPUT | MUX_MODE14) P8_33B( PIN_OUTPUT | MUX_MODE15) /* vout1_d13.gpio8_13, vin1a_fld0.off */
-#define P8_33_QEP P8_33B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P8_33A( PIN_OUTPUT | MUX_MODE15) /* vin1a_fld0.eQEP1B_in, vout1_d13.off */
-
-/* P8_34 (ball D8) gpio8_11 & (ball G6) gpio4_0 */
-#define P8_34_DEFAULT P8_34A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_34B( PIN_OUTPUT | MUX_MODE15) /* vout1_d11.gpio8_11, vin2a_vsync0.off */
-#define P8_34_GPIO P8_34A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_34B( PIN_OUTPUT | MUX_MODE15) /* vout1_d11.gpio8_11, vin2a_vsync0.off */
-#define P8_34_GPIO_PU P8_34A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_34B( PIN_OUTPUT | MUX_MODE15) /* vout1_d11.gpio8_11, vin2a_vsync0.off */
-#define P8_34_GPIO_PD P8_34A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_34B( PIN_OUTPUT | MUX_MODE15) /* vout1_d11.gpio8_11, vin2a_vsync0.off */
-#define P8_34_GPIO_INPUT P8_34A( PIN_INPUT | MUX_MODE14) P8_34B( PIN_OUTPUT | MUX_MODE15) /* vout1_d11.gpio8_11, vin2a_vsync0.off */
-#define P8_34_PWM P8_34B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) P8_34A( PIN_OUTPUT | MUX_MODE15) /* vin2a_vsync0.ehrpwm1A, vout1_d11.off */
-
-/* P8_35 (ball A5) gpio8_12 & (ball AD9) gpio3_0 */
-#define P8_35_DEFAULT P8_35A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_35B( PIN_OUTPUT | MUX_MODE15) /* vout1_d12.gpio8_12, vin1a_de0.off */
-#define P8_35_GPIO P8_35A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_35B( PIN_OUTPUT | MUX_MODE15) /* vout1_d12.gpio8_12, vin1a_de0.off */
-#define P8_35_GPIO_PU P8_35A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_35B( PIN_OUTPUT | MUX_MODE15) /* vout1_d12.gpio8_12, vin1a_de0.off */
-#define P8_35_GPIO_PD P8_35A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_35B( PIN_OUTPUT | MUX_MODE15) /* vout1_d12.gpio8_12, vin1a_de0.off */
-#define P8_35_GPIO_INPUT P8_35A( PIN_INPUT | MUX_MODE14) P8_35B( PIN_OUTPUT | MUX_MODE15) /* vout1_d12.gpio8_12, vin1a_de0.off */
-#define P8_35_QEP P8_35B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P8_35A( PIN_OUTPUT | MUX_MODE15) /* vin1a_de0.eQEP1A_in, vout1_d12.off */
-
-/* P8_36 (ball D7) gpio8_10 & (ball F2) gpio4_1*/
-#define P8_36_DEFAULT P8_36A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_36B( PIN_OUTPUT | MUX_MODE15) /* vout1_d10.gpio8_10, vin2a_d0.off */
-#define P8_36_GPIO P8_36A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_36B( PIN_OUTPUT | MUX_MODE15) /* vout1_d10.gpio8_10, vin2a_d0.off */
-#define P8_36_GPIO_PU P8_36A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_36B( PIN_OUTPUT | MUX_MODE15) /* vout1_d10.gpio8_10, vin2a_d0.off */
-#define P8_36_GPIO_PD P8_36A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_36B( PIN_OUTPUT | MUX_MODE15) /* vout1_d10.gpio8_10, vin2a_d0.off */
-#define P8_36_GPIO_INPUT P8_36A( PIN_INPUT | MUX_MODE14) P8_36B( PIN_OUTPUT | MUX_MODE15) /* vout1_d10.gpio8_10, vin2a_d0.off */
-#define P8_36_PWM P8_36B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) P8_36A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d0.ehrpwm1B, vout1_d10.off */
-
-/* P8_37 (ball E8) gpio8_8 & (ball A21)*/
-#define P8_37_DEFAULT P8_37A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_37B( PIN_OUTPUT | MUX_MODE15) /* vout1_d8.gpio8_8, mcasp4_fsx.off */
-#define P8_37_GPIO P8_37A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_37B( PIN_OUTPUT | MUX_MODE15) /* vout1_d8.gpio8_8, mcasp4_fsx.off */
-#define P8_37_GPIO_PU P8_37A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_37B( PIN_OUTPUT | MUX_MODE15) /* vout1_d8.gpio8_8, mcasp4_fsx.off */
-#define P8_37_GPIO_PD P8_37A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_37B( PIN_OUTPUT | MUX_MODE15) /* vout1_d8.gpio8_8, mcasp4_fsx.off */
-#define P8_37_GPIO_INPUT P8_37A( PIN_INPUT | MUX_MODE14) P8_37B( PIN_OUTPUT | MUX_MODE15) /* vout1_d8.gpio8_8, mcasp4_fsx.off */
-#define P8_37_UART P8_37B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P8_37A( PIN_OUTPUT | MUX_MODE15) /* mcasp4_fsx.uart8_txd. vout1_d8.off */
-
-/* P8_38a (ball D9) gpio8_9 */
-#define P8_38_DEFAULT P8_38A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_38B( PIN_OUTPUT | MUX_MODE15) /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
-#define P8_38_GPIO P8_38A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_38B( PIN_OUTPUT | MUX_MODE15) /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
-#define P8_38_GPIO_PU P8_38A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_38B( PIN_OUTPUT | MUX_MODE15) /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
-#define P8_38_GPIO_PD P8_38A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_38B( PIN_OUTPUT | MUX_MODE15) /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
-#define P8_38_GPIO_INPUT P8_38A( PIN_INPUT | MUX_MODE14) P8_38B( PIN_OUTPUT | MUX_MODE15) /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
-#define P8_38_UART P8_38B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P8_38A( PIN_OUTPUT | MUX_MODE15) /* mcasp4_aclkx.uart8_rxd, vout1_d9.off */
-
-/* P8_39 (ball F8) gpio8_6 */
-#define P8_39_DEFAULT P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d6.gpio8_6 */
-#define P8_39_GPIO P8_39( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d6.gpio8_6 */
-#define P8_39_GPIO_PU P8_39( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d6.gpio8_6 */
-#define P8_39_GPIO_PD P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d6.gpio8_6 */
-#define P8_39_GPIO_INPUT P8_39( PIN_INPUT | MUX_MODE14) /* vout1_d6.gpio8_6 */
-#define P8_39_PRUOUT P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d6.pr2_pru0_gpo3 */
-#define P8_39_PRUIN P8_39( PIN_INPUT | MUX_MODE12) /* vout1_d6.pr2_pru0_gpi3 */
-
-/* P8_40 (ball E7) gpio8_7 */
-#define P8_40_DEFAULT P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d7.gpio8_7 */
-#define P8_40_GPIO P8_40( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d7.gpio8_7 */
-#define P8_40_GPIO_PU P8_40( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d7.gpio8_7 */
-#define P8_40_GPIO_PD P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d7.gpio8_7 */
-#define P8_40_GPIO_INPUT P8_40( PIN_INPUT | MUX_MODE14) /* vout1_d7.gpio8_7 */
-#define P8_40_PRUOUT P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d7.pr2_pru0_gpo4 */
-#define P8_40_PRUIN P8_40( PIN_INPUT | MUX_MODE12) /* vout1_d7.pr2_pru0_gpi4 */
-
-/* P8_41 (ball E9) gpio8_4 */
-#define P8_41_DEFAULT P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d4.gpio8_4 */
-#define P8_41_GPIO P8_41( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d4.gpio8_4 */
-#define P8_41_GPIO_PU P8_41( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d4.gpio8_4 */
-#define P8_41_GPIO_PD P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d4.gpio8_4 */
-#define P8_41_GPIO_INPUT P8_41( PIN_INPUT | MUX_MODE14) /* vout1_d4.gpio8_4 */
-#define P8_41_PRUOUT P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d4.pr2_pru0_gpo1 */
-#define P8_41_PRUIN P8_41( PIN_INPUT | MUX_MODE12) /* vout1_d4.pr2_pru0_gpi1 */
-
-/* P8_42 (ball F9) gpio8_5 */
-#define P8_42_DEFAULT P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d5.gpio8_5 */
-#define P8_42_GPIO P8_42( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d5.gpio8_5 */
-#define P8_42_GPIO_PU P8_42( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d5.gpio8_5 */
-#define P8_42_GPIO_PD P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d5.gpio8_5 */
-#define P8_42_GPIO_INPUT P8_42( PIN_INPUT | MUX_MODE14) /* vout1_d5.gpio8_5 */
-#define P8_42_PRUOUT P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d5.pr2_pru0_gpo2 */
-#define P8_42_PRUIN P8_42( PIN_INPUT | MUX_MODE12) /* vout1_d5.pr2_pru0_gpi2 */
-
-/* P8_43 (ball F10) gpio8_2 */
-#define P8_43_DEFAULT P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d2.gpio8_2 */
-#define P8_43_GPIO P8_43( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d2.gpio8_2 */
-#define P8_43_GPIO_PU P8_43( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d2.gpio8_2 */
-#define P8_43_GPIO_PD P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d2.gpio8_2 */
-#define P8_43_GPIO_INPUT P8_43( PIN_INPUT | MUX_MODE14) /* vout1_d2.gpio8_2 */
-#define P8_43_PRUOUT P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d2.pr2_pru1_gpo20 */
-#define P8_43_PRUIN P8_43( PIN_INPUT | MUX_MODE12) /* vout1_d2.pr2_pru1_gpi20 */
-
-/* P8_44 (ball G11) gpio8_3 */
-#define P8_44_DEFAULT P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d3.gpio8_3 */
-#define P8_44_GPIO P8_44( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vout1_d3.gpio8_3 */
-#define P8_44_GPIO_PU P8_44( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vout1_d3.gpio8_3 */
-#define P8_44_GPIO_PD P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vout1_d3.gpio8_3 */
-#define P8_44_GPIO_INPUT P8_44( PIN_INPUT | MUX_MODE14) /* vout1_d3.gpio8_3 */
-#define P8_44_PRUOUT P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* vout1_d3.pr2_pru0_gpo0 */
-#define P8_44_PRUIN P8_44( PIN_INPUT | MUX_MODE12) /* vout1_d3.pr2_pru0_gpi0 */
-
-/* P8_45 (ball F11) gpio8_0 & (ball B7) gpio8_16*/
-#define P8_45_DEFAULT P8_45A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_45B( PIN_OUTPUT | MUX_MODE15) /* vout1_d0.gpio8_0, vout1_d16.off */
-#define P8_45_GPIO P8_45A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_45B( PIN_OUTPUT | MUX_MODE15) /* vout1_d0.gpio8_0, vout1_d16.off */
-#define P8_45_GPIO_PU P8_45A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_45B( PIN_OUTPUT | MUX_MODE15) /* vout1_d0.gpio8_0, vout1_d16.off */
-#define P8_45_GPIO_PD P8_45A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_45B( PIN_OUTPUT | MUX_MODE15) /* vout1_d0.gpio8_0, vout1_d16.off */
-#define P8_45_GPIO_INPUT P8_45A( PIN_INPUT | MUX_MODE14) P8_45B( PIN_OUTPUT | MUX_MODE15) /* vout1_d0.gpio8_0, vout1_d16.off */
-#define P8_45_PRUOUT P8_45B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P8_45A( PIN_OUTPUT | MUX_MODE15) /* vout1_d16.pr2_pru0_gpo13, vout1_d0.off */
-#define P8_45_PRUIN P8_45B( PIN_INPUT | MUX_MODE12) P8_45A( PIN_OUTPUT | MUX_MODE15) /* vout1_d16.pr2_pru0_gpi13, vout1_d0.off */
-
-/* P8_46a (ball G10) gpio8_1 & (ball A10) gpio8_23*/
-#define P8_46_DEFAULT P8_46A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_46B( PIN_OUTPUT | MUX_MODE15) /* vout1_d1.gpio8_1, vout1_d23.off */
-#define P8_46_GPIO P8_46A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P8_46B( PIN_OUTPUT | MUX_MODE15) /* vout1_d1.gpio8_1, vout1_d23.off */
-#define P8_46_GPIO_PU P8_46A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P8_46B( PIN_OUTPUT | MUX_MODE15) /* vout1_d1.gpio8_1, vout1_d23.off */
-#define P8_46_GPIO_PD P8_46A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P8_46B( PIN_OUTPUT | MUX_MODE15) /* vout1_d1.gpio8_1, vout1_d23.off */
-#define P8_46_GPIO_INPUT P8_46A( PIN_INPUT | MUX_MODE14) P8_46B( PIN_OUTPUT | MUX_MODE15) /* vout1_d1.gpio8_1, vout1_d23.off */
-#define P8_46_PRUOUT P8_46B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P8_46A( PIN_OUTPUT | MUX_MODE15) /* vout1_d23.pr2_pru0_gpo20, vout1_d1.off */
-#define P8_46_PRUIN P8_46B( PIN_INPUT | MUX_MODE12) P8_46A( PIN_OUTPUT | MUX_MODE15) /* vout1_d23.pr2_pru0_gpi20, vout1_d1.off */
-
-/********************************/
-/* BBAI P9 Header pinmux macros */
-/********************************/
-/* P9_01 GND */
-/* P9_02 GND */
-/* P9_03 3V3 */
-/* P9_04 3V3 */
-/* P9_05 VDD_5V */
-/* P9_06 VDD_5V */
-/* P9_07 SYS_5V */
-/* P9_08 SYS_5V */
-/* P9_09 PWR_BUT */
-/* P9_10 RSTn */
-
-/* P9_11 (ball B19) & (ball B8) gpio8_17*/
-#define P9_11_UART P9_11A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) P9_11B( PIN_OUTPUT | MUX_MODE15) /* mcasp3_axr0.uart5_rxd, vout1_d17.off */
-#define P9_11_DEFAULT P9_11B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_11A( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.gpio8_17, mcasp3_axr0.off */
-#define P9_11_GPIO P9_11B( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_11A( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.gpio8_17, mcasp3_axr0.off */
-#define P9_11_GPIO_PU P9_11B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_11A( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.gpio8_17, mcasp3_axr0.off */
-#define P9_11_GPIO_PD P9_11B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_11A( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.gpio8_17, mcasp3_axr0.off */
-#define P9_11_GPIO_INPUT P9_11B( PIN_INPUT | MUX_MODE14) P9_11A( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.gpio8_17, mcasp3_axr0.off */
-
-/* P9_12 (ball B14) gpio5_0 */
-#define P9_12_DEFAULT P9_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
-#define P9_12_GPIO P9_12( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
-#define P9_12_GPIO_PU P9_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
-#define P9_12_GPIO_PD P9_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
-#define P9_12_GPIO_INPUT P9_12( PIN_INPUT | MUX_MODE14) /* mcasp1_aclkr.gpio5_0 */
-
-/* P9_13 (ball C17) & (ball AB10) gpio6_12*/
-#define P9_13_UART P9_13A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) P9_13B( PIN_OUTPUT | MUX_MODE15) /* mcasp3_axr1.uart5_txd, usb1_drvvbus.off */
-#define P9_13_DEFAULT P9_13B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
-#define P9_13_GPIO P9_13B( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
-#define P9_13_GPIO_PU P9_13B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
-#define P9_13_GPIO_PD P9_13B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
-#define P9_13_GPIO_INPUT P9_13B( PIN_INPUT | MUX_MODE14) P9_13A( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
-
-/* P9_14 (ball D6) gpio4_25 */
-#define P9_14_DEFAULT P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d17.gpio4_25 */
-#define P9_14_GPIO P9_14( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d17.gpio4_25 */
-#define P9_14_GPIO_PU P9_14( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d17.gpio4_25 */
-#define P9_14_GPIO_PD P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d17.gpio4_25 */
-#define P9_14_GPIO_INPUT P9_14( PIN_INPUT | MUX_MODE14) /* vin2a_d17.gpio4_25 */
-#define P9_14_PWM P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d17.ehrpwm3A */
-
-/* P9_15 (ball AG4) gpio3_12 */
-#define P9_15_DEFAULT P9_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d8.gpio3_12 */
-#define P9_15_GPIO P9_15( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin1a_d8.gpio3_12 */
-#define P9_15_GPIO_PU P9_15( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin1a_d8.gpio3_12 */
-#define P9_15_GPIO_PD P9_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin1a_d8.gpio3_12 */
-#define P9_15_GPIO_INPUT P9_15( PIN_INPUT | MUX_MODE14) /* vin1a_d8.gpio3_12 */
-
-/* P9_16 (ball C5) gpio4_26 */
-#define P9_16_DEFAULT P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d18.gpio4_26 */
-#define P9_16_GPIO P9_16( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* vin2a_d18.gpio4_26 */
-#define P9_16_GPIO_PU P9_16( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* vin2a_d18.gpio4_26 */
-#define P9_16_GPIO_PD P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* vin2a_d18.gpio4_26 */
-#define P9_16_GPIO_INPUT P9_16( PIN_INPUT | MUX_MODE14) /* vin2a_d18.gpio4_26 */
-#define P9_16_PWM P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) /* vin2a_d18.ehrpwm3B */
-
-/* P9_17 (ball B24) gpio7_17 and (ball F12) gpio5_3*/
-#define P9_17_DEFAULT P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
-#define P9_17_GPIO P9_17A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
-#define P9_17_GPIO_PU P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
-#define P9_17_GPIO_PD P9_17A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
-#define P9_17_GPIO_INPUT P9_17A( PIN_INPUT | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.gpio7_17 */
-#define P9_17_SPI P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) P9_17B( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.spi2_cs0 */
-#define P9_17_I2C P9_17B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P9_17A( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr1.i2c5_scl */
-#define P9_17_UART P9_17B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_17A( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr1.uart6_txd */
-
-/* P9_18 (ball G17) gpio7_16 & (ball F4) gpio4_6*/
-#define P9_18_DEFAULT P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
-#define P9_18_GPIO P9_18A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
-#define P9_18_GPIO_PU P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
-#define P9_18_GPIO_PD P9_18A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
-#define P9_18_GPIO_INPUT P9_18A( PIN_INPUT | MUX_MODE14) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.gpio7_16, mcasp1_axr0.off */
-#define P9_18_SPI P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) P9_18B( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.spi2_d0, mcasp1_axr0.off */
-#define P9_18_I2C P9_18B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P9_18A( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr0.i2c5_sda, spi2_d0.off */
-#define P9_18_UART P9_18B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_18A( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr0.uart6_rxd, spi2_d0.off */
-
-/* P9_19 (ball R6) gpio7_3 & (ball F4) gpio4_6*/
-#define P9_19_DEFAULT P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
-#define P9_19_GPIO P9_19A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
-#define P9_19_GPIO_PU P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
-#define P9_19_GPIO_PD P9_19A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
-#define P9_19_GPIO_INPUT P9_19A( PIN_INPUT | MUX_MODE14) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.gpio7_3, gpmc_a0.off */
-#define P9_19_I2C P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) P9_19B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a0.i2c4_scl, gpmc_a0.off */
-#define P9_19_QEP P9_19B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P9_19A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d5.eQEP2A_in, gpmc_a0.off */
-
-/* P9_20 (ball T9) gpio7_4 & (ball D2) gpio4_5*/
-#define P9_20_DEFAULT P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
-#define P9_20_GPIO P9_20A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
-#define P9_20_GPIO_PU P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
-#define P9_20_GPIO_PD P9_20A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
-#define P9_20_GPIO_INPUT P9_20A( PIN_INPUT | MUX_MODE14) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.gpio7_4, vin2a_d4.off */
-#define P9_20_I2C P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) P9_20B( PIN_OUTPUT | MUX_MODE15) /* gpmc_a1.i2c4_sda, vin2a_d4.off */
-#define P9_20_PRUOUT P9_20B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_20A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d4.pr1_pru1_gpo1, gpmc_a1.off */
-#define P9_20_PRUIN P9_20B( PIN_INPUT | MUX_MODE12) P9_20A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d4.pr1_pru1_gpi1, gpmc_a1.off */
-
-/* P9_21 (ball AF8) gpio3_3 & (ball B22) gpio7_15*/
-#define P9_21_DEFAULT P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
-#define P9_21_GPIO P9_21A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
-#define P9_21_GPIO_PU P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
-#define P9_21_GPIO_PD P9_21A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
-#define P9_21_GPIO_INPUT P9_21A( PIN_INPUT | MUX_MODE14) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.gpio3_3,spi2_d1.off */
-#define P9_21_QEP P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P9_21B( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.eQEP1_strobe,spi2_d1.off */
-#define P9_21_SPI P9_21B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) P9_21A( PIN_OUTPUT | MUX_MODE15) /* spi2_d1.spi2_d1, vin1a_vsync0.off */
-#define P9_21_UART P9_21B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) P9_21A( PIN_OUTPUT | MUX_MODE15) /* spi2_d1.uart3_txd, vin1a_vsync0.off */
-
-/* P9_22 (ball B26) gpio6_19 & ball A26) gpio7_14*/
-#define P9_22_DEFAULT P9_22A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
-#define P9_22_GPIO P9_22A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
-#define P9_22_GPIO_PU P9_22A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
-#define P9_22_GPIO_PD P9_22A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
-#define P9_22_GPIO_INPUT P9_22A( PIN_INPUT | MUX_MODE14) P9_22B( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.gpio6_19, spi2_sclk.off */
-#define P9_22_SPI P9_22B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) P9_22A( PIN_OUTPUT | MUX_MODE15) /* spi2_sclk.spi2_sclk, xref_clk2.off */
-#define P9_22_UART P9_22B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) P9_22A( PIN_OUTPUT | MUX_MODE15) /* spi2_sclk.uart3_rxd, xref_clk2.off */
-
-/* P9_23 (ball A22) gpio7_11 */
-#define P9_23_DEFAULT P9_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* spi1_cs1.gpio7_11 */
-#define P9_23_GPIO P9_23( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* spi1_cs1.gpio7_11 */
-#define P9_23_GPIO_PU P9_23( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* spi1_cs1.gpio7_11 */
-#define P9_23_GPIO_PD P9_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* spi1_cs1.gpio7_11 */
-#define P9_23_GPIO_INPUT P9_23( PIN_INPUT | MUX_MODE14) /* spi1_cs1.gpio7_11 */
-
-/* P9_24 (ball F20) gpio6_15*/
-#define P9_24_DEFAULT P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* gpio6_15.gpio6_15 */
-#define P9_24_GPIO P9_24( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* gpio6_15.gpio6_15 */
-#define P9_24_GPIO_PU P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* gpio6_15.gpio6_15 */
-#define P9_24_GPIO_PD P9_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* gpio6_15.gpio6_15 */
-#define P9_24_GPIO_INPUT P9_24( PIN_INPUT | MUX_MODE14) /* gpio6_15.gpio6_15 */
-#define P9_24_UART P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) /* gpio6_15.uart10_txd */
-#define P9_24_CAN P9_24( PIN_INPUT_PULLUP | MUX_MODE2) /* gpio6_15.dcan2_rx */
-#define P9_24_I2C P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) /* gpio6_15.i2c3_scl */
-
-/* P9_25 (ball D18) gpio6_17 */
-#define P9_25_DEFAULT P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* xref_clk0.gpio6_17 */
-#define P9_25_GPIO P9_25( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* xref_clk0.gpio6_17 */
-#define P9_25_GPIO_PU P9_25( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* xref_clk0.gpio6_17 */
-#define P9_25_GPIO_PD P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* xref_clk0.gpio6_17 */
-#define P9_25_GPIO_INPUT P9_25( PIN_INPUT | MUX_MODE14) /* xref_clk0.gpio6_17 */
-#define P9_25_PRUOUT P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* xref_clk0.pr2_pru1_gpo5 */
-#define P9_25_PRUIN P9_25( PIN_INPUT | MUX_MODE12) /* xref_clk0.pr2_pru1_gpi5 */
-
-/* P9_26 (ball E21) gpio6_14 & (ball AE2) gpio3_24 */
-#define P9_26_DEFAULT P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
-#define P9_26_GPIO P9_26A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
-#define P9_26_GPIO_PU P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
-#define P9_26_GPIO_PD P9_26A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
-#define P9_26_GPIO_INPUT P9_26A( PIN_INPUT | MUX_MODE14) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.gpio6_14, vin1a_d20.off */
-#define P9_26_UART P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.uart10_rxd, vin1a_d20.off */
-#define P9_26_CAN P9_26A( PIN_OUTPUT_PULLUP | MUX_MODE2) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.dcan2_tx, vin1a_d20.off */
-#define P9_26_I2C P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.i2c3_sda, vin1a_d20.off */
-#define P9_26_PRUOUT P9_26B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_26A( PIN_OUTPUT | MUX_MODE15) /* vin1a_d20.pr1_pru0_gpo17, gpio6_14.off */
-#define P9_26_PRUIN P9_26B( PIN_INPUT | MUX_MODE12) P9_26A( PIN_OUTPUT | MUX_MODE15) /* vin1a_d20.pr1_pru0_gpi17, gpio6_14.off */
-
-/* P9_27 (ball C3) gpio4_15 & (ball J14) gpio5_1*/
-#define P9_27_DEFAULT P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
-#define P9_27_GPIO P9_27A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
-#define P9_27_GPIO_PU P9_27A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
-#define P9_27_GPIO_PD P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
-#define P9_27_GPIO_INPUT P9_27A( PIN_INPUT | MUX_MODE14) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
-#define P9_27_QEP P9_27A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.eQEP3B_in, mcasp1_fsr.off */
-#define P9_27_PRUOUT P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.pr1_pru1_gpo11, mcasp1_fsr.off */
-#define P9_27_PRUIN P9_27A( PIN_INPUT | MUX_MODE12) P9_27B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d14.pr1_pru1_gpi11, mcasp1_fsr.off */
-
-/* P9_28 (ball A12) gpio4_17 */
-#define P9_28_DEFAULT P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
-#define P9_28_GPIO P9_28( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
-#define P9_28_GPIO_PU P9_28( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
-#define P9_28_GPIO_PD P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
-#define P9_28_GPIO_INPUT P9_28( PIN_INPUT | MUX_MODE14) /* mcasp1_axr11.gpio4_17 */
-#define P9_28_SPI P9_28( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) /* mcasp1_axr11.spi3_cs0 */
-#define P9_28_PRUOUT P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* mcasp1_axr11.pr2_pru1_gpo13 */
-#define P9_28_PRUIN P9_28( PIN_INPUT | MUX_MODE12) /* mcasp1_axr11.pr2_pru1_gpi13 */
-
-/* P9_29 (ball A11) gpio5_11 & (ball D14) gpio7_30*/
-#define P9_29_DEFAULT P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
-#define P9_29_GPIO P9_29A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
-#define P9_29_GPIO_PU P9_29A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
-#define P9_29_GPIO_PD P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
-#define P9_29_GPIO_INPUT P9_29A( PIN_INPUT | MUX_MODE14) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
-#define P9_29_SPI P9_29A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.spi3_d1, mcasp1_fsx.off */
-#define P9_29_PRUOUT P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.pr2_pru1_gpo11, mcasp1_fsx.off */
-#define P9_29_PRUIN P9_29A( PIN_INPUT | MUX_MODE12) P9_29B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr9.pr2_pru1_gpi11, mcasp1_fsx.off */
-
-/* P9_30 (ball B13) gpio5_12*/
-#define P9_30_DEFAULT P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
-#define P9_30_GPIO P9_30( PIN_OUTPUT | INPUT_EN | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
-#define P9_30_GPIO_PU P9_30( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
-#define P9_30_GPIO_PD P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
-#define P9_30_GPIO_INPUT P9_30( PIN_INPUT | MUX_MODE14) /* mcasp1_axr10.gpio5_12 */
-#define P9_30_SPI P9_30( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) /* mcasp1_axr10.spi3_d0 */
-#define P9_30_PRUOUT P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) /* mcasp1_axr10.pr2_pru1_gpo12 */
-#define P9_30_PRUIN P9_30( PIN_INPUT | MUX_MODE12) /* mcasp1_axr10.pr2_pru1_gpi12 */
-
-/* P9_31 (ball B12) gpio5_10 & (ball C14) gpio7_31*/
-#define P9_31_DEFAULT P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
-#define P9_31_GPIO P9_31A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
-#define P9_31_GPIO_PU P9_31A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
-#define P9_31_GPIO_PD P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
-#define P9_31_GPIO_INPUT P9_31A( PIN_INPUT | MUX_MODE14) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
-#define P9_31_SPI P9_31A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.spi3_sclk, mcasp1_aclkx.off */
-#define P9_31_PRUOUT P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.pr2_pru1_gpo10, mcasp1_aclkx.off */
-#define P9_31_PRUIN P9_31A( PIN_INPUT | MUX_MODE12) P9_31B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr8.pr2_pru1_gpi10, mcasp1_aclkx.off */
-
-/* P9_32 VADC */
-/* P9_33 AIN4 */
-/* P9_34 AGND */
-/* P9_35 AIN6 */
-/* P9_36 AIN5 */
-/* P9_37 AIN2 */
-/* P9_38 AIN3 */
-/* P9_39 AIN0 */
-/* P9_40 AIN1 */
-
-/* P9_41 (ball C23) gpio6_20 & (ball C1) gpio4_7*/
-#define P9_41_DEFAULT P9_41A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_41B( PIN_OUTPUT | MUX_MODE15) /* xref_clk3.gpio6_20, vin2a_d6.off */
-#define P9_41_GPIO P9_41A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_41B( PIN_OUTPUT | MUX_MODE15) /* xref_clk3.gpio6_20, vin2a_d6.off */
-#define P9_41_GPIO_PU P9_41A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_41B( PIN_OUTPUT | MUX_MODE15) /* xref_clk3.gpio6_20, vin2a_d6.off */
-#define P9_41_GPIO_PD P9_41A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_41B( PIN_OUTPUT | MUX_MODE15) /* xref_clk3.gpio6_20, vin2a_d6.off */
-#define P9_41_GPIO_INPUT P9_41A( PIN_INPUT | MUX_MODE14) P9_41B( PIN_OUTPUT | MUX_MODE15) /* xref_clk3.gpio6_20, vin2a_d6.off */
-#define P9_41_PRUOUT P9_41B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_41A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d6.pr1_pru1_gpo3, xref_clk3.off */
-#define P9_41_PRUIN P9_41B( PIN_INPUT | MUX_MODE12) P9_41A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d6.pr1_pru1_gpi3, xref_clk3.off */
-
-/* P9_42 (ball E14) gpio4_18 & (ball C2) gpio4_14*/
-#define P9_42_DEFAULT P9_42A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
-#define P9_42_GPIO P9_42A( PIN_OUTPUT | INPUT_EN | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
-#define P9_42_GPIO_PU P9_42A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
-#define P9_42_GPIO_PD P9_42A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
-#define P9_42_GPIO_INPUT P9_42A( PIN_INPUT | MUX_MODE14) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
-#define P9_42_SPI P9_42A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) P9_42B( PIN_OUTPUT | MUX_MODE15) /* mcasp1_axr12.spi3_cs1, vin2a_d13.off */
-#define P9_42_PRUOUT P9_42B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) P9_42A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d13.pr1_pru1_gpo10, mcasp1_axr12.off */
-#define P9_42_PRUIN P9_42B( PIN_INPUT | MUX_MODE12) P9_42A( PIN_OUTPUT | MUX_MODE15) /* vin2a_d13.pr1_pru1_gpi10, mcasp1_axr12.off */
-
-/* P9_43 GND */
-/* P9_44 GND */
-/* P9_45 GND */
-/* P9_46 GND */
-
#endif
\ No newline at end of file
--
GitLab
From 0467b05ab5a1110b2d98c983a032174779025c14 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Sun, 12 Jul 2020 20:01:37 +0530
Subject: [PATCH 30/86] Updating pinmuxing nodes
The pinmuxing configuration has been ported from the macros previously written in include/dt-bindings/board/am572x-bbai-pins.h
The macros has been deleted now!
---
src/arm/am572x-bone-common-univ.dtsi | 1512 ++++++++++++++++++--------
1 file changed, 1076 insertions(+), 436 deletions(-)
diff --git a/src/arm/am572x-bone-common-univ.dtsi b/src/arm/am572x-bone-common-univ.dtsi
index 74d97770..39b8d66f 100644
--- a/src/arm/am572x-bone-common-univ.dtsi
+++ b/src/arm/am572x-bone-common-univ.dtsi
@@ -19,395 +19,763 @@
/* P8_03 (ball AB8) gpio1_24 */
- P8_03_default_pin: pinmux_P8_03_default_pin { pinctrl-single,pins = < P8_03_DEFAULT >; }; /* mmc3_dat6.gpio1_24 */
- P8_03_gpio_pin: pinmux_P8_03_gpio_pin { pinctrl-single,pins = < P8_03_GPIO >; }; /* mmc3_dat6.gpio1_24 */
- P8_03_gpio_pu_pin: pinmux_P8_03_gpio_pu_pin { pinctrl-single,pins = < P8_03_GPIO_PU >; }; /* mmc3_dat6.gpio1_24 */
- P8_03_gpio_pd_pin: pinmux_P8_03_gpio_pd_pin { pinctrl-single,pins = < P8_03_GPIO_PD >; }; /* mmc3_dat6.gpio1_24 */
- P8_03_gpio_input_pin: pinmux_P8_03_gpio_input_pin { pinctrl-single,pins = < P8_03_GPIO_INPUT >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03_default_pin: pinmux_P8_03_default_pin { pinctrl-single,pins = <
+ P8_03( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03_gpio_pin: pinmux_P8_03_gpio_pin { pinctrl-single,pins = <
+ P8_03( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03_gpio_pu_pin: pinmux_P8_03_gpio_pu_pin { pinctrl-single,pins = <
+ P8_03( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03_gpio_pd_pin: pinmux_P8_03_gpio_pd_pin { pinctrl-single,pins = <
+ P8_03( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03_gpio_input_pin: pinmux_P8_03_gpio_input_pin { pinctrl-single,pins = <
+ P8_03( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
/* P8_04 (ball AB5) gpio1_25 */
- P8_04_default_pin: pinmux_P8_04_default_pin { pinctrl-single,pins = < P8_04_DEFAULT >; }; /* mmc3_dat7.gpio1_25 */
- P8_04_gpio_pin: pinmux_P8_04_gpio_pin { pinctrl-single,pins = < P8_04_GPIO >; }; /* mmc3_dat7.gpio1_25 */
- P8_04_gpio_pu_pin: pinmux_P8_04_gpio_pu_pin { pinctrl-single,pins = < P8_04_GPIO_PU >; }; /* mmc3_dat7.gpio1_25 */
- P8_04_gpio_pd_pin: pinmux_P8_04_gpio_pd_pin { pinctrl-single,pins = < P8_04_GPIO_PD >; }; /* mmc3_dat7.gpio1_25 */
- P8_04_gpio_input_pin: pinmux_P8_04_gpio_input_pin { pinctrl-single,pins = < P8_04_GPIO_INPUT >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04_default_pin: pinmux_P8_04_default_pin { pinctrl-single,pins = <
+ P8_04( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04_gpio_pin: pinmux_P8_04_gpio_pin { pinctrl-single,pins = <
+ P8_04( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04_gpio_pu_pin: pinmux_P8_04_gpio_pu_pin { pinctrl-single,pins = <
+ P8_04( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04_gpio_pd_pin: pinmux_P8_04_gpio_pd_pin { pinctrl-single,pins = <
+ P8_04( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04_gpio_input_pin: pinmux_P8_04_gpio_input_pin { pinctrl-single,pins = <
+ P8_04( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
/* P8_05 (ball AC9) gpio7_1 */
- P8_05_default_pin: pinmux_P8_05_default_pin { pinctrl-single,pins = < P8_05_DEFAULT >; }; /* mmc3_dat2.gpio7_1 */
- P8_05_gpio_pin: pinmux_P8_05_gpio_pin { pinctrl-single,pins = < P8_05_GPIO >; }; /* mmc3_dat2.gpio7_1 */
- P8_05_gpio_pu_pin: pinmux_P8_05_gpio_pu_pin { pinctrl-single,pins = < P8_05_GPIO_PU >; }; /* mmc3_dat2.gpio7_1 */
- P8_05_gpio_pd_pin: pinmux_P8_05_gpio_pd_pin { pinctrl-single,pins = < P8_05_GPIO_PD >; }; /* mmc3_dat2.gpio7_1 */
- P8_05_gpio_input_pin: pinmux_P8_05_gpio_input_pin { pinctrl-single,pins = < P8_05_GPIO_INPUT >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05_default_pin: pinmux_P8_05_default_pin { pinctrl-single,pins = <
+ P8_05( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05_gpio_pin: pinmux_P8_05_gpio_pin { pinctrl-single,pins = <
+ P8_05( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05_gpio_pu_pin: pinmux_P8_05_gpio_pu_pin { pinctrl-single,pins = <
+ P8_05( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05_gpio_pd_pin: pinmux_P8_05_gpio_pd_pin { pinctrl-single,pins = <
+ P8_05( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05_gpio_input_pin: pinmux_P8_05_gpio_input_pin { pinctrl-single,pins = <
+ P8_05( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
/* P8_06 (ball AC3) gpio7_2 */
- P8_06_default_pin: pinmux_P8_06_default_pin { pinctrl-single,pins = < P8_06_DEFAULT >; }; /* mmc3_dat3.gpio7_2 */
- P8_06_gpio_pin: pinmux_P8_06_gpio_pin { pinctrl-single,pins = < P8_06_GPIO >; }; /* mmc3_dat3.gpio7_2 */
- P8_06_gpio_pu_pin: pinmux_P8_06_gpio_pu_pin { pinctrl-single,pins = < P8_06_GPIO_PU >; }; /* mmc3_dat3.gpio7_2 */
- P8_06_gpio_pd_pin: pinmux_P8_06_gpio_pd_pin { pinctrl-single,pins = < P8_06_GPIO_PD >; }; /* mmc3_dat3.gpio7_2 */
- P8_06_gpio_input_pin: pinmux_P8_06_gpio_input_pin { pinctrl-single,pins = < P8_06_GPIO_INPUT >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06_default_pin: pinmux_P8_06_default_pin { pinctrl-single,pins = <
+ P8_06( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06_gpio_pin: pinmux_P8_06_gpio_pin { pinctrl-single,pins = <
+ P8_06( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06_gpio_pu_pin: pinmux_P8_06_gpio_pu_pin { pinctrl-single,pins = <
+ P8_06( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06_gpio_pd_pin: pinmux_P8_06_gpio_pd_pin { pinctrl-single,pins = <
+ P8_06( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06_gpio_input_pin: pinmux_P8_06_gpio_input_pin { pinctrl-single,pins = <
+ P8_06( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
/* P8_07 (ball G14) gpio6_5*/
- P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = < P8_07_DEFAULT >; }; /* mcasp1_axr14.gpio6_5 */
- P8_07_gpio_pin: pinmux_P8_07_gpio_pin { pinctrl-single,pins = < P8_07_GPIO >; }; /* mcasp1_axr14.gpio6_5 */
- P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin { pinctrl-single,pins = < P8_07_GPIO_PU >; }; /* mcasp1_axr14.gpio6_5 */
- P8_07_gpio_pd_pin: pinmux_P8_07_gpio_pd_pin { pinctrl-single,pins = < P8_07_GPIO_PD >; }; /* mcasp1_axr14.gpio6_5 */
- P8_07_gpio_input_pin: pinmux_P8_07_gpio_input_pin { pinctrl-single,pins = < P8_07_GPIO_INPUT >; }; /* mcasp1_axr14.gpio6_5 */
- P8_07_timer_pin: pinmux_P8_07_timer_pin { pinctrl-single,pins = < P8_07_TIMER >; }; /* mcasp1_axr14.timer11 */
+ P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = <
+ P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07_gpio_pin: pinmux_P8_07_gpio_pin { pinctrl-single,pins = <
+ P8_07( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin { pinctrl-single,pins = <
+ P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07_gpio_pd_pin: pinmux_P8_07_gpio_pd_pin { pinctrl-single,pins = <
+ P8_07( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07_gpio_input_pin: pinmux_P8_07_gpio_input_pin { pinctrl-single,pins = <
+ P8_07( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
+ P8_07_timer_pin: pinmux_P8_07_timer_pin { pinctrl-single,pins = <
+ P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr14.timer11 */
/* P8_08 (ball F14) gpio6_6 */
- P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = < P8_08_DEFAULT >; }; /* mcasp1_axr15.gpio6_6 */
- P8_08_gpio_pin: pinmux_P8_08_gpio_pin { pinctrl-single,pins = < P8_08_GPIO >; }; /* mcasp1_axr15.gpio6_6 */
- P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin { pinctrl-single,pins = < P8_08_GPIO_PU >; }; /* mcasp1_axr15.gpio6_6 */
- P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin { pinctrl-single,pins = < P8_08_GPIO_PD >; }; /* mcasp1_axr15.gpio6_6 */
- P8_08_gpio_input_pin: pinmux_P8_08_gpio_input_pin { pinctrl-single,pins = < P8_08_GPIO_INPUT >; }; /* mcasp1_axr15.gpio6_6 */
- P8_08_timer_pin: pinmux_P8_08_timer_pin { pinctrl-single,pins = < P8_08_TIMER >; }; /* mcasp1_axr15.timer12 */
+ P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = <
+ P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08_gpio_pin: pinmux_P8_08_gpio_pin { pinctrl-single,pins = <
+ P8_08( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin { pinctrl-single,pins = <
+ P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin { pinctrl-single,pins = <
+ P8_08( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08_gpio_input_pin: pinmux_P8_08_gpio_input_pin { pinctrl-single,pins = <
+ P8_08( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
+ P8_08_timer_pin: pinmux_P8_08_timer_pin { pinctrl-single,pins = <
+ P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr15.timer12 */
/* P8_09 (ball E17) gpio6_18 */
- P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = < P8_09_DEFAULT >; }; /* xref_clk1.gpio6_18 */
- P8_09_gpio_pin: pinmux_P8_09_gpio_pin { pinctrl-single,pins = < P8_09_GPIO >; }; /* xref_clk1.gpio6_18 */
- P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin { pinctrl-single,pins = < P8_09_GPIO_PU >; }; /* xref_clk1.gpio6_18 */
- P8_09_gpio_pd_pin: pinmux_P8_09_gpio_pd_pin { pinctrl-single,pins = < P8_09_GPIO_PD >; }; /* xref_clk1.gpio6_18 */
- P8_09_gpio_input_pin: pinmux_P8_09_gpio_input_pin { pinctrl-single,pins = < P8_09_GPIO_INPUT >; }; /* xref_clk1.gpio6_18 */
- P8_09_timer_pin: pinmux_P8_09_timer_pin { pinctrl-single,pins = < P8_09_TIMER >; }; /* xref_clk1.timer14 */
+ P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = <
+ P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
+ P8_09_gpio_pin: pinmux_P8_09_gpio_pin { pinctrl-single,pins = <
+ P8_09( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
+ P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin { pinctrl-single,pins = <
+ P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
+ P8_09_gpio_pd_pin: pinmux_P8_09_gpio_pd_pin { pinctrl-single,pins = <
+ P8_09( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
+ P8_09_gpio_input_pin: pinmux_P8_09_gpio_input_pin { pinctrl-single,pins = <
+ P8_09( PIN_INPUT | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
+ P8_09_timer_pin: pinmux_P8_09_timer_pin { pinctrl-single,pins = <
+ P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* xref_clk1.timer14 */
/* P8_10 (ball A13) gpio6_4 */
- P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = < P8_10_DEFAULT >; }; /* mcasp1_axr13.gpio6_4 */
- P8_10_gpio_pin: pinmux_P8_10_gpio_pin { pinctrl-single,pins = < P8_10_GPIO >; }; /* mcasp1_axr13.gpio6_4 */
- P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin { pinctrl-single,pins = < P8_10_GPIO_PU >; }; /* mcasp1_axr13.gpio6_4 */
- P8_10_gpio_pd_pin: pinmux_P8_10_gpio_pd_pin { pinctrl-single,pins = < P8_10_GPIO_PD >; }; /* mcasp1_axr13.gpio6_4 */
- P8_10_gpio_input_pin: pinmux_P8_10_gpio_input_pin { pinctrl-single,pins = < P8_10_GPIO_INPUT >; }; /* mcasp1_axr13.gpio6_4 */
- P8_10_timer_pin: pinmux_P8_10_timer_pin { pinctrl-single,pins = < P8_10_TIMER >; }; /* mcasp1_axr13.timer10 */
+ P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = <
+ P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10_gpio_pin: pinmux_P8_10_gpio_pin { pinctrl-single,pins = <
+ P8_10( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin { pinctrl-single,pins = <
+ P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10_gpio_pd_pin: pinmux_P8_10_gpio_pd_pin { pinctrl-single,pins = <
+ P8_10( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10_gpio_input_pin: pinmux_P8_10_gpio_input_pin { pinctrl-single,pins = <
+ P8_10( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
+ P8_10_timer_pin: pinmux_P8_10_timer_pin { pinctrl-single,pins = <
+ P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr13.timer10 */
/* P8_11 (ball AH4) gpio3_11 */
- P8_11_default_pin: pinmux_P8_11_default_pin { pinctrl-single,pins = < P8_11_DEFAULT >; }; /* vin1a_d7.gpio3_11 */
- P8_11_gpio_pin: pinmux_P8_11_gpio_pin { pinctrl-single,pins = < P8_11_GPIO >; }; /* vin1a_d7.gpio3_11 */
- P8_11_gpio_pu_pin: pinmux_P8_11_gpio_pu_pin { pinctrl-single,pins = < P8_11_GPIO_PU >; }; /* vin1a_d7.gpio3_11 */
- P8_11_gpio_pd_pin: pinmux_P8_11_gpio_pd_pin { pinctrl-single,pins = < P8_11_GPIO_PD >; }; /* vin1a_d7.gpio3_11 */
- P8_11_gpio_input_pin: pinmux_P8_11_gpio_input_pin { pinctrl-single,pins = < P8_11_GPIO_INPUT >; }; /* vin1a_d7.gpio3_11 */
- P8_11_qep_pin: pinmux_P8_11_qep_pin { pinctrl-single,pins = < P8_11_QEP >; }; /* vin1a_d7.eQEP2B_in */
- P8_11_pruout_pin: pinmux_P8_11_pruout_pin { pinctrl-single,pins = < P8_11_PRUOUT >; }; /* vin1a_d7.pr1_pru0_gpo4 */
+ P8_11_default_pin: pinmux_P8_11_default_pin { pinctrl-single,pins = <
+ P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
+ P8_11_gpio_pin: pinmux_P8_11_gpio_pin { pinctrl-single,pins = <
+ P8_11( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
+ P8_11_gpio_pu_pin: pinmux_P8_11_gpio_pu_pin { pinctrl-single,pins = <
+ P8_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
+ P8_11_gpio_pd_pin: pinmux_P8_11_gpio_pd_pin { pinctrl-single,pins = <
+ P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
+ P8_11_gpio_input_pin: pinmux_P8_11_gpio_input_pin { pinctrl-single,pins = <
+ P8_11( PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
+ P8_11_qep_pin: pinmux_P8_11_qep_pin { pinctrl-single,pins = <
+ P8_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_d7.eQEP2B_in */
+ P8_11_pruout_pin: pinmux_P8_11_pruout_pin { pinctrl-single,pins = <
+ P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d7.pr1_pru0_gpo4 */
/* P8_12 (ball AG6) gpio3_10 */
- P8_12_default_pin: pinmux_P8_12_default_pin { pinctrl-single,pins = < P8_12_DEFAULT >; }; /* vin1a_d6.gpio3_10 */
- P8_12_gpio_pin: pinmux_P8_12_gpio_pin { pinctrl-single,pins = < P8_12_GPIO >; }; /* vin1a_d6.gpio3_10 */
- P8_12_gpio_pu_pin: pinmux_P8_12_gpio_pu_pin { pinctrl-single,pins = < P8_12_GPIO_PU >; }; /* vin1a_d6.gpio3_10 */
- P8_12_gpio_pd_pin: pinmux_P8_12_gpio_pd_pin { pinctrl-single,pins = < P8_12_GPIO_PD >; }; /* vin1a_d6.gpio3_10 */
- P8_12_gpio_input_pin: pinmux_P8_12_gpio_input_pin { pinctrl-single,pins = < P8_12_GPIO_INPUT >; }; /* vin1a_d6.gpio3_10 */
- P8_12_qep_pin: pinmux_P8_12_qep_pin { pinctrl-single,pins = < P8_12_QEP >; }; /* vin1a_d6.eQEP2A_in */
- P8_12_pruout_pin: pinmux_P8_12_pruout_pin { pinctrl-single,pins = < P8_12_PRUOUT >; }; /* vin1a_d6.pr1_pru0_gpo3 */
+ P8_12_default_pin: pinmux_P8_12_default_pin { pinctrl-single,pins = <
+ P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
+ P8_12_gpio_pin: pinmux_P8_12_gpio_pin { pinctrl-single,pins = <
+ P8_12( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
+ P8_12_gpio_pu_pin: pinmux_P8_12_gpio_pu_pin { pinctrl-single,pins = <
+ P8_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
+ P8_12_gpio_pd_pin: pinmux_P8_12_gpio_pd_pin { pinctrl-single,pins = <
+ P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
+ P8_12_gpio_input_pin: pinmux_P8_12_gpio_input_pin { pinctrl-single,pins = <
+ P8_12( PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
+ P8_12_qep_pin: pinmux_P8_12_qep_pin { pinctrl-single,pins = <
+ P8_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_d6.eQEP2A_in */
+ P8_12_pruout_pin: pinmux_P8_12_pruout_pin { pinctrl-single,pins = <
+ P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d6.pr1_pru0_gpo3 */
/* P8_13 (ball D3) gpio4_11 */
- P8_13_default_pin: pinmux_P8_13_default_pin { pinctrl-single,pins = < P8_13_DEFAULT >; }; /* vin2a_d10.gpio4_11 */
- P8_13_gpio_pin: pinmux_P8_13_gpio_pin { pinctrl-single,pins = < P8_13_GPIO >; }; /* vin2a_d10.gpio4_11 */
- P8_13_gpio_pu_pin: pinmux_P8_13_gpio_pu_pin { pinctrl-single,pins = < P8_13_GPIO_PU >; }; /* vin2a_d10.gpio4_11 */
- P8_13_gpio_pd_pin: pinmux_P8_13_gpio_pd_pin { pinctrl-single,pins = < P8_13_GPIO_PD >; }; /* vin2a_d10.gpio4_11 */
- P8_13_gpio_input_pin: pinmux_P8_13_gpio_input_pin { pinctrl-single,pins = < P8_13_GPIO_INPUT >; }; /* vin2a_d10.gpio4_11 */
- P8_13_pwm_pin: pinmux_P8_13_pwm_pin { pinctrl-single,pins = < P8_13_PWM >; }; /* vin2a_d10.ehrpwm2B */
+ P8_13_default_pin: pinmux_P8_13_default_pin { pinctrl-single,pins = <
+ P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
+ P8_13_gpio_pin: pinmux_P8_13_gpio_pin { pinctrl-single,pins = <
+ P8_13( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
+ P8_13_gpio_pu_pin: pinmux_P8_13_gpio_pu_pin { pinctrl-single,pins = <
+ P8_13( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
+ P8_13_gpio_pd_pin: pinmux_P8_13_gpio_pd_pin { pinctrl-single,pins = <
+ P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
+ P8_13_gpio_input_pin: pinmux_P8_13_gpio_input_pin { pinctrl-single,pins = <
+ P8_13( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
+ P8_13_pwm_pin: pinmux_P8_13_pwm_pin { pinctrl-single,pins = <
+ P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d10.ehrpwm2B */
/* P8_14 (ball D5) gpio4_13*/
- P8_14_default_pin: pinmux_P8_14_default_pin { pinctrl-single,pins = < P8_14_DEFAULT >; }; /* vin2a_d12.gpio4_13 */
- P8_14_gpio_pin: pinmux_P8_14_gpio_pin { pinctrl-single,pins = < P8_14_GPIO >; }; /* vin2a_d12.gpio4_13 */
- P8_14_gpio_pu_pin: pinmux_P8_14_gpio_pu_pin { pinctrl-single,pins = < P8_14_GPIO_PU >; }; /* vin2a_d12.gpio4_13 */
- P8_14_gpio_pd_pin: pinmux_P8_14_gpio_pd_pin { pinctrl-single,pins = < P8_14_GPIO_PD >; }; /* vin2a_d12.gpio4_13 */
- P8_14_gpio_input_pin: pinmux_P8_14_gpio_input_pin { pinctrl-single,pins = < P8_14_GPIO_INPUT >; }; /* vin2a_d12.gpio4_13 */
- P8_14_pwm_pin: pinmux_P8_14_pwm_pin { pinctrl-single,pins = < P8_14_PWM >; }; /* vin2a_d12.eCAP2_in_PWM2_out */
+ P8_14_default_pin: pinmux_P8_14_default_pin { pinctrl-single,pins = <
+ P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
+ P8_14_gpio_pin: pinmux_P8_14_gpio_pin { pinctrl-single,pins = <
+ P8_14( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
+ P8_14_gpio_pu_pin: pinmux_P8_14_gpio_pu_pin { pinctrl-single,pins = <
+ P8_14( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
+ P8_14_gpio_pd_pin: pinmux_P8_14_gpio_pd_pin { pinctrl-single,pins = <
+ P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
+ P8_14_gpio_input_pin: pinmux_P8_14_gpio_input_pin { pinctrl-single,pins = <
+ P8_14( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
+ P8_14_pwm_pin: pinmux_P8_14_pwm_pin { pinctrl-single,pins = <
+ P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d12.eCAP2_in_PWM2_out */
/* P8_15a (ball D1) gpio4_3*/
- P8_15_default_pin: pinmux_P8_15_default_pin { pinctrl-single,pins = < P8_15_DEFAULT >; }; /* vin2a_d2.gpio4_3, vin2a_d19.off */
- P8_15_gpio_pin: pinmux_P8_15_gpio_pin { pinctrl-single,pins = < P8_15_GPIO >; }; /* vin2a_d2.gpio4_3, vin2a_d19.off */
- P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin { pinctrl-single,pins = < P8_15_GPIO_PU >; }; /* vin2a_d2.gpio4_3, vin2a_d19.off */
- P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin { pinctrl-single,pins = < P8_15_GPIO_PD >; }; /* vin2a_d2.gpio4_3, vin2a_d19.off */
- P8_15_gpio_input_pin: pinmux_P8_15_gpio_input_pin { pinctrl-single,pins = < P8_15_GPIO_INPUT >; }; /* vin2a_d2.gpio4_3, vin2a_d19.off */
- P8_15_pru_ecap_pin: pinmux_P8_15_pru_ecap_pin { pinctrl-single,pins = < P8_15_PRU_ECAP >; }; /* vin2a_d2.pr1_ecap0_ecap_capin_apwm_o, vin2a_d19.off */
+ P8_15_default_pin: pinmux_P8_15_default_pin { pinctrl-single,pins = <
+ P8_15A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_15B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d2.gpio4_3, vin2a_d19.off */
+ P8_15_gpio_pin: pinmux_P8_15_gpio_pin { pinctrl-single,pins = <
+ P8_15A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P8_15B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d2.gpio4_3, vin2a_d19.off */
+ P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin { pinctrl-single,pins = <
+ P8_15A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P8_15B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d2.gpio4_3, vin2a_d19.off */
+ P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin { pinctrl-single,pins = <
+ P8_15A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_15B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d2.gpio4_3, vin2a_d19.off */
+ P8_15_gpio_input_pin: pinmux_P8_15_gpio_input_pin { pinctrl-single,pins = <
+ P8_15A( PIN_INPUT | MUX_MODE14)
+ P8_15B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d2.gpio4_3, vin2a_d19.off */
+ P8_15_pru_ecap_pin: pinmux_P8_15_pru_ecap_pin { pinctrl-single,pins = <
+ P8_15A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE11)
+ P8_15B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d2.pr1_ecap0_ecap_capin_apwm_o, vin2a_d19.off */
/* P8_15b (ball A3) gpio4_27 */
- P8_15_pruin_pin: pinmux_P8_15_pruin_pin { pinctrl-single,pins = < P8_15_PRUIN >; }; /* vin2a_d19.pr1_pru1_gpi16, vin2a_d2.off */
+ P8_15_pruin_pin: pinmux_P8_15_pruin_pin { pinctrl-single,pins = <
+ P8_15B( PIN_INPUT | MUX_MODE12)
+ P8_15A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d19.pr1_pru1_gpi16, vin2a_d2.off */
/* P8_16 (ball B4) gpio4_29 */
- P8_16_default_pin: pinmux_P8_16_default_pin { pinctrl-single,pins = < P8_16_DEFAULT >; }; /* vin2a_d21.gpio4_29 */
- P8_16_gpio_pin: pinmux_P8_16_gpio_pin { pinctrl-single,pins = < P8_16_GPIO >; }; /* vin2a_d21.gpio4_29 */
- P8_16_gpio_pu_pin: pinmux_P8_16_gpio_pu_pin { pinctrl-single,pins = < P8_16_GPIO_PU >; }; /* vin2a_d21.gpio4_29 */
- P8_16_gpio_pd_pin: pinmux_P8_16_gpio_pd_pin { pinctrl-single,pins = < P8_16_GPIO_PD >; }; /* vin2a_d21.gpio4_29 */
- P8_16_gpio_input_pin: pinmux_P8_16_gpio_input_pin { pinctrl-single,pins = < P8_16_GPIO_INPUT >; }; /* vin2a_d21.gpio4_29 */
- P8_16_pruin_pin: pinmux_P8_16_pruin_pin { pinctrl-single,pins = < P8_16_PRUIN >; }; /* vin2a_d21.pr1_pru1_gpi18 */
+ P8_16_default_pin: pinmux_P8_16_default_pin { pinctrl-single,pins = <
+ P8_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
+ P8_16_gpio_pin: pinmux_P8_16_gpio_pin { pinctrl-single,pins = <
+ P8_16( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
+ P8_16_gpio_pu_pin: pinmux_P8_16_gpio_pu_pin { pinctrl-single,pins = <
+ P8_16( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
+ P8_16_gpio_pd_pin: pinmux_P8_16_gpio_pd_pin { pinctrl-single,pins = <
+ P8_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
+ P8_16_gpio_input_pin: pinmux_P8_16_gpio_input_pin { pinctrl-single,pins = <
+ P8_16( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
+ P8_16_pruin_pin: pinmux_P8_16_pruin_pin { pinctrl-single,pins = <
+ P8_16( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d21.pr1_pru1_gpi18 */
/* P8_17 (ball A7) gpio8_18 */
- P8_17_default_pin: pinmux_P8_17_default_pin { pinctrl-single,pins = < P8_17_DEFAULT >; }; /* vout1_d18.gpio8_18 */
- P8_17_gpio_pin: pinmux_P8_17_gpio_pin { pinctrl-single,pins = < P8_17_GPIO >; }; /* vout1_d18.gpio8_18 */
- P8_17_gpio_pu_pin: pinmux_P8_17_gpio_pu_pin { pinctrl-single,pins = < P8_17_GPIO_PU >; }; /* vout1_d18.gpio8_18 */
- P8_17_gpio_pd_pin: pinmux_P8_17_gpio_pd_pin { pinctrl-single,pins = < P8_17_GPIO_PD >; }; /* vout1_d18.gpio8_18 */
- P8_17_gpio_input_pin: pinmux_P8_17_gpio_input_pin { pinctrl-single,pins = < P8_17_GPIO_INPUT >; }; /* vout1_d18.gpio8_18 */
+ P8_17_default_pin: pinmux_P8_17_default_pin { pinctrl-single,pins = <
+ P8_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
+ P8_17_gpio_pin: pinmux_P8_17_gpio_pin { pinctrl-single,pins = <
+ P8_17( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
+ P8_17_gpio_pu_pin: pinmux_P8_17_gpio_pu_pin { pinctrl-single,pins = <
+ P8_17( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
+ P8_17_gpio_pd_pin: pinmux_P8_17_gpio_pd_pin { pinctrl-single,pins = <
+ P8_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
+ P8_17_gpio_input_pin: pinmux_P8_17_gpio_input_pin { pinctrl-single,pins = <
+ P8_17( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
/* P8_18 (ball F5) gpio4_9 */
- P8_18_default_pin: pinmux_P8_18_default_pin { pinctrl-single,pins = < P8_18_DEFAULT >; }; /* vin2a_d8.gpio4_9 */
- P8_18_gpio_pin: pinmux_P8_18_gpio_pin { pinctrl-single,pins = < P8_18_GPIO >; }; /* vin2a_d8.gpio4_9 */
- P8_18_gpio_pu_pin: pinmux_P8_18_gpio_pu_pin { pinctrl-single,pins = < P8_18_GPIO_PU >; }; /* vin2a_d8.gpio4_9 */
- P8_18_gpio_pd_pin: pinmux_P8_18_gpio_pd_pin { pinctrl-single,pins = < P8_18_GPIO_PD >; }; /* vin2a_d8.gpio4_9 */
- P8_18_gpio_input_pin: pinmux_P8_18_gpio_input_pin { pinctrl-single,pins = < P8_18_GPIO_INPUT >; }; /* vin2a_d8.gpio4_9 */
- P8_18_qep_pin: pinmux_P8_18_qep_pin { pinctrl-single,pins = < P8_18_QEP >; }; /* vin2a_d8.eQEP2_strobe */
+ P8_18_default_pin: pinmux_P8_18_default_pin { pinctrl-single,pins = <
+ P8_18( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
+ P8_18_gpio_pin: pinmux_P8_18_gpio_pin { pinctrl-single,pins = <
+ P8_18( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
+ P8_18_gpio_pu_pin: pinmux_P8_18_gpio_pu_pin { pinctrl-single,pins = <
+ P8_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
+ P8_18_gpio_pd_pin: pinmux_P8_18_gpio_pd_pin { pinctrl-single,pins = <
+ P8_18( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
+ P8_18_gpio_input_pin: pinmux_P8_18_gpio_input_pin { pinctrl-single,pins = <
+ P8_18( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
+ P8_18_qep_pin: pinmux_P8_18_qep_pin { pinctrl-single,pins = <
+ P8_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d8.eQEP2_strobe */
/* P8_19 (ball E6) gpio4_10 */
- P8_19_default_pin: pinmux_P8_19_default_pin { pinctrl-single,pins = < P8_19_DEFAULT >; }; /* vin2a_d9.gpio4_10 */
- P8_19_gpio_pin: pinmux_P8_19_gpio_pin { pinctrl-single,pins = < P8_19_GPIO >; }; /* vin2a_d9.gpio4_10 */
- P8_19_gpio_pu_pin: pinmux_P8_19_gpio_pu_pin { pinctrl-single,pins = < P8_19_GPIO_PU >; }; /* vin2a_d9.gpio4_10 */
- P8_19_gpio_pd_pin: pinmux_P8_19_gpio_pd_pin { pinctrl-single,pins = < P8_19_GPIO_PD >; }; /* vin2a_d9.gpio4_10 */
- P8_19_gpio_input_pin: pinmux_P8_19_gpio_input_pin { pinctrl-single,pins = < P8_19_GPIO_INPUT >; }; /* vin2a_d9.gpio4_10 */
- P8_19_pwm_pin: pinmux_P8_19_pwm_pin { pinctrl-single,pins = < P8_19_PWM >; }; /* vin2a_d9.ehrpwm2A */
+ P8_19_default_pin: pinmux_P8_19_default_pin { pinctrl-single,pins = <
+ P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
+ P8_19_gpio_pin: pinmux_P8_19_gpio_pin { pinctrl-single,pins = <
+ P8_19( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
+ P8_19_gpio_pu_pin: pinmux_P8_19_gpio_pu_pin { pinctrl-single,pins = <
+ P8_19( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
+ P8_19_gpio_pd_pin: pinmux_P8_19_gpio_pd_pin { pinctrl-single,pins = <
+ P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
+ P8_19_gpio_input_pin: pinmux_P8_19_gpio_input_pin { pinctrl-single,pins = <
+ P8_19( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
+ P8_19_pwm_pin: pinmux_P8_19_pwm_pin { pinctrl-single,pins = <
+ P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d9.ehrpwm2A */
/* P8_20 (ball AC4) gpio6_30 */
- P8_20_default_pin: pinmux_P8_20_default_pin { pinctrl-single,pins = < P8_20_DEFAULT >; }; /* mmc3_cmd.gpio6_30 */
- P8_20_gpio_pin: pinmux_P8_20_gpio_pin { pinctrl-single,pins = < P8_20_GPIO >; }; /* mmc3_cmd.gpio6_30 */
- P8_20_gpio_pu_pin: pinmux_P8_20_gpio_pu_pin { pinctrl-single,pins = < P8_20_GPIO_PU >; }; /* mmc3_cmd.gpio6_30 */
- P8_20_gpio_pd_pin: pinmux_P8_20_gpio_pd_pin { pinctrl-single,pins = < P8_20_GPIO_PD >; }; /* mmc3_cmd.gpio6_30 */
- P8_20_gpio_input_pin: pinmux_P8_20_gpio_input_pin { pinctrl-single,pins = < P8_20_GPIO_INPUT >; }; /* mmc3_cmd.gpio6_30 */
- P8_20_pruout_pin: pinmux_P8_20_pruout_pin { pinctrl-single,pins = < P8_20_PRUOUT >; }; /* mmc3_cmd.pr2_pru0_gpo3 */
- P8_20_pruin_pin: pinmux_P8_20_pruin_pin { pinctrl-single,pins = < P8_20_PRUIN >; }; /* mmc3_cmd.pr2_pru0_gpi3 */
+ P8_20_default_pin: pinmux_P8_20_default_pin { pinctrl-single,pins = <
+ P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20_gpio_pin: pinmux_P8_20_gpio_pin { pinctrl-single,pins = <
+ P8_20( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20_gpio_pu_pin: pinmux_P8_20_gpio_pu_pin { pinctrl-single,pins = <
+ P8_20( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20_gpio_pd_pin: pinmux_P8_20_gpio_pd_pin { pinctrl-single,pins = <
+ P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20_gpio_input_pin: pinmux_P8_20_gpio_input_pin { pinctrl-single,pins = <
+ P8_20( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_cmd.gpio6_30 */
+ P8_20_pruout_pin: pinmux_P8_20_pruout_pin { pinctrl-single,pins = <
+ P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_cmd.pr2_pru0_gpo3 */
+ P8_20_pruin_pin: pinmux_P8_20_pruin_pin { pinctrl-single,pins = <
+ P8_20( PIN_INPUT | MUX_MODE12) >; }; /* mmc3_cmd.pr2_pru0_gpi3 */
/* P8_21 (ball AD4) gpio6_29 */
- P8_21_default_pin: pinmux_P8_21_default_pin { pinctrl-single,pins = < P8_21_DEFAULT >; }; /* mmc3_clk.gpio6_29 */
- P8_21_gpio_pin: pinmux_P8_21_gpio_pin { pinctrl-single,pins = < P8_21_GPIO >; }; /* mmc3_clk.gpio6_29 */
- P8_21_gpio_pu_pin: pinmux_P8_21_gpio_pu_pin { pinctrl-single,pins = < P8_21_GPIO_PU >; }; /* mmc3_clk.gpio6_29 */
- P8_21_gpio_pd_pin: pinmux_P8_21_gpio_pd_pin { pinctrl-single,pins = < P8_21_GPIO_PD >; }; /* mmc3_clk.gpio6_29 */
- P8_21_gpio_input_pin: pinmux_P8_21_gpio_input_pin { pinctrl-single,pins = < P8_21_GPIO_INPUT >; }; /* mmc3_clk.gpio6_29 */
- P8_21_pruout_pin: pinmux_P8_21_pruout_pin { pinctrl-single,pins = < P8_21_PRUOUT >; }; /* mmc3_clk.pr2_pru0_gpo2 */
- P8_21_pruin_pin: pinmux_P8_21_pruin_pin { pinctrl-single,pins = < P8_21_PRUIN >; }; /* mmc3_clk.pr2_pru0_gpi2 */
+ P8_21_default_pin: pinmux_P8_21_default_pin { pinctrl-single,pins = <
+ P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
+ P8_21_gpio_pin: pinmux_P8_21_gpio_pin { pinctrl-single,pins = <
+ P8_21( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
+ P8_21_gpio_pu_pin: pinmux_P8_21_gpio_pu_pin { pinctrl-single,pins = <
+ P8_21( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
+ P8_21_gpio_pd_pin: pinmux_P8_21_gpio_pd_pin { pinctrl-single,pins = <
+ P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
+ P8_21_gpio_input_pin: pinmux_P8_21_gpio_input_pin { pinctrl-single,pins = <
+ P8_21( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_clk.gpio6_29 */
+ P8_21_pruout_pin: pinmux_P8_21_pruout_pin { pinctrl-single,pins = <
+ P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_clk.pr2_pru0_gpo2 */
+ P8_21_pruin_pin: pinmux_P8_21_pruin_pin { pinctrl-single,pins = <
+ P8_21( PIN_INPUT | MUX_MODE12) >; }; /* mmc3_clk.pr2_pru0_gpi2 */
/* P8_22 (ball AD6) gpio1_23 */
- P8_22_default_pin: pinmux_P8_22_default_pin { pinctrl-single,pins = < P8_22_DEFAULT >; }; /* mmc3_dat5.gpio1_23 */
- P8_22_gpio_pin: pinmux_P8_22_gpio_pin { pinctrl-single,pins = < P8_22_GPIO >; }; /* mmc3_dat5.gpio1_23 */
- P8_22_gpio_pu_pin: pinmux_P8_22_gpio_pu_pin { pinctrl-single,pins = < P8_22_GPIO_PU >; }; /* mmc3_dat5.gpio1_23 */
- P8_22_gpio_pd_pin: pinmux_P8_22_gpio_pd_pin { pinctrl-single,pins = < P8_22_GPIO_PD >; }; /* mmc3_dat5.gpio1_23 */
- P8_22_gpio_input_pin: pinmux_P8_22_gpio_input_pin { pinctrl-single,pins = < P8_22_GPIO_INPUT >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22_default_pin: pinmux_P8_22_default_pin { pinctrl-single,pins = <
+ P8_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22_gpio_pin: pinmux_P8_22_gpio_pin { pinctrl-single,pins = <
+ P8_22( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22_gpio_pu_pin: pinmux_P8_22_gpio_pu_pin { pinctrl-single,pins = <
+ P8_22( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22_gpio_pd_pin: pinmux_P8_22_gpio_pd_pin { pinctrl-single,pins = <
+ P8_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22_gpio_input_pin: pinmux_P8_22_gpio_input_pin { pinctrl-single,pins = <
+ P8_22( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
/* P8_23 (ball AC8) gpio1_22 */
- P8_23_default_pin: pinmux_P8_23_default_pin { pinctrl-single,pins = < P8_23_DEFAULT >; }; /* mmc3_dat4.gpio1_22 */
- P8_23_gpio_pin: pinmux_P8_23_gpio_pin { pinctrl-single,pins = < P8_23_GPIO >; }; /* mmc3_dat4.gpio1_22 */
- P8_23_gpio_pu_pin: pinmux_P8_23_gpio_pu_pin { pinctrl-single,pins = < P8_23_GPIO_PU >; }; /* mmc3_dat4.gpio1_22 */
- P8_23_gpio_pd_pin: pinmux_P8_23_gpio_pd_pin { pinctrl-single,pins = < P8_23_GPIO_PD >; }; /* mmc3_dat4.gpio1_22 */
- P8_23_gpio_input_pin: pinmux_P8_23_gpio_input_pin { pinctrl-single,pins = < P8_23_GPIO_INPUT >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23_default_pin: pinmux_P8_23_default_pin { pinctrl-single,pins = <
+ P8_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23_gpio_pin: pinmux_P8_23_gpio_pin { pinctrl-single,pins = <
+ P8_23( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23_gpio_pu_pin: pinmux_P8_23_gpio_pu_pin { pinctrl-single,pins = <
+ P8_23( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23_gpio_pd_pin: pinmux_P8_23_gpio_pd_pin { pinctrl-single,pins = <
+ P8_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23_gpio_input_pin: pinmux_P8_23_gpio_input_pin { pinctrl-single,pins = <
+ P8_23( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
/* P8_24 (ball AC6) gpio7_0 */
- P8_24_default_pin: pinmux_P8_24_default_pin { pinctrl-single,pins = < P8_24_DEFAULT >; }; /* mmc3_dat1.gpio7_0 */
- P8_24_gpio_pin: pinmux_P8_24_gpio_pin { pinctrl-single,pins = < P8_24_GPIO >; }; /* mmc3_dat1.gpio7_0 */
- P8_24_gpio_pu_pin: pinmux_P8_24_gpio_pu_pin { pinctrl-single,pins = < P8_24_GPIO_PU >; }; /* mmc3_dat1.gpio7_0 */
- P8_24_gpio_pd_pin: pinmux_P8_24_gpio_pd_pin { pinctrl-single,pins = < P8_24_GPIO_PD >; }; /* mmc3_dat1.gpio7_0 */
- P8_24_gpio_input_pin: pinmux_P8_24_gpio_input_pin { pinctrl-single,pins = < P8_24_GPIO_INPUT >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24_default_pin: pinmux_P8_24_default_pin { pinctrl-single,pins = <
+ P8_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24_gpio_pin: pinmux_P8_24_gpio_pin { pinctrl-single,pins = <
+ P8_24( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24_gpio_pu_pin: pinmux_P8_24_gpio_pu_pin { pinctrl-single,pins = <
+ P8_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24_gpio_pd_pin: pinmux_P8_24_gpio_pd_pin { pinctrl-single,pins = <
+ P8_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24_gpio_input_pin: pinmux_P8_24_gpio_input_pin { pinctrl-single,pins = <
+ P8_24( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
/* P8_25 (ball AC7) gpio6_31 */
- P8_25_default_pin: pinmux_P8_25_default_pin { pinctrl-single,pins = < P8_25_DEFAULT >; }; /* mmc3_dat0.gpio6_31 */
- P8_25_gpio_pin: pinmux_P8_25_gpio_pin { pinctrl-single,pins = < P8_25_GPIO >; }; /* mmc3_dat0.gpio6_31 */
- P8_25_gpio_pu_pin: pinmux_P8_25_gpio_pu_pin { pinctrl-single,pins = < P8_25_GPIO_PU >; }; /* mmc3_dat0.gpio6_31 */
- P8_25_gpio_pd_pin: pinmux_P8_25_gpio_pd_pin { pinctrl-single,pins = < P8_25_GPIO_PD >; }; /* mmc3_dat0.gpio6_31 */
- P8_25_gpio_input_pin: pinmux_P8_25_gpio_input_pin { pinctrl-single,pins = < P8_25_GPIO_INPUT >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25_default_pin: pinmux_P8_25_default_pin { pinctrl-single,pins = <
+ P8_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25_gpio_pin: pinmux_P8_25_gpio_pin { pinctrl-single,pins = <
+ P8_25( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25_gpio_pu_pin: pinmux_P8_25_gpio_pu_pin { pinctrl-single,pins = <
+ P8_25( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25_gpio_pd_pin: pinmux_P8_25_gpio_pd_pin { pinctrl-single,pins = <
+ P8_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25_gpio_input_pin: pinmux_P8_25_gpio_input_pin { pinctrl-single,pins = <
+ P8_25( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
/* P8_26 (ball B3) gpio4_28 */
- P8_26_default_pin: pinmux_P8_26_default_pin { pinctrl-single,pins = < P8_26_DEFAULT >; }; /* vin2a_d20.gpio4_28 */
- P8_26_gpio_pin: pinmux_P8_26_gpio_pin { pinctrl-single,pins = < P8_26_GPIO >; }; /* vin2a_d20.gpio4_28 */
- P8_26_gpio_pu_pin: pinmux_P8_26_gpio_pu_pin { pinctrl-single,pins = < P8_26_GPIO_PU >; }; /* vin2a_d20.gpio4_28 */
- P8_26_gpio_pd_pin: pinmux_P8_26_gpio_pd_pin { pinctrl-single,pins = < P8_26_GPIO_PD >; }; /* vin2a_d20.gpio4_28 */
- P8_26_gpio_input_pin: pinmux_P8_26_gpio_input_pin { pinctrl-single,pins = < P8_26_GPIO_INPUT >; }; /* vin2a_d20.gpio4_28 */
+ P8_26_default_pin: pinmux_P8_26_default_pin { pinctrl-single,pins = <
+ P8_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
+ P8_26_gpio_pin: pinmux_P8_26_gpio_pin { pinctrl-single,pins = <
+ P8_26( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
+ P8_26_gpio_pu_pin: pinmux_P8_26_gpio_pu_pin { pinctrl-single,pins = <
+ P8_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
+ P8_26_gpio_pd_pin: pinmux_P8_26_gpio_pd_pin { pinctrl-single,pins = <
+ P8_26( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
+ P8_26_gpio_input_pin: pinmux_P8_26_gpio_input_pin { pinctrl-single,pins = <
+ P8_26( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
/* P8_27a (ball E11) gpio4_23 */
- P8_27_default_pin: pinmux_P8_27_default_pin { pinctrl-single,pins = < P8_27_DEFAULT >; }; /* vout1_vsync.gpio4_23, vout1_d19.off */
- P8_27_gpio_pin: pinmux_P8_27_gpio_pin { pinctrl-single,pins = < P8_27_GPIO >; }; /* vout1_vsync.gpio4_23, vout1_d19.off */
- P8_27_gpio_pu_pin: pinmux_P8_27_gpio_pu_pin { pinctrl-single,pins = < P8_27_GPIO_PU >; }; /* vout1_vsync.gpio4_23, vout1_d19.off */
- P8_27_gpio_pd_pin: pinmux_P8_27_gpio_pd_pin { pinctrl-single,pins = < P8_27_GPIO_PD >; }; /* vout1_vsync.gpio4_23, vout1_d19.off */
- P8_27_gpio_input_pin: pinmux_P8_27_gpio_input_pin { pinctrl-single,pins = < P8_27_GPIO_INPUT >; }; /* vout1_vsync.gpio4_23, vout1_d19.off */
+ P8_27_default_pin: pinmux_P8_27_default_pin { pinctrl-single,pins = <
+ P8_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_27B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_vsync.gpio4_23, vout1_d19.off */
+ P8_27_gpio_pin: pinmux_P8_27_gpio_pin { pinctrl-single,pins = <
+ P8_27A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P8_27B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_vsync.gpio4_23, vout1_d19.off */
+ P8_27_gpio_pu_pin: pinmux_P8_27_gpio_pu_pin { pinctrl-single,pins = <
+ P8_27A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P8_27B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_vsync.gpio4_23, vout1_d19.off */
+ P8_27_gpio_pd_pin: pinmux_P8_27_gpio_pd_pin { pinctrl-single,pins = <
+ P8_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_27B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_vsync.gpio4_23, vout1_d19.off */
+ P8_27_gpio_input_pin: pinmux_P8_27_gpio_input_pin { pinctrl-single,pins = <
+ P8_27A( PIN_INPUT | MUX_MODE14)
+ P8_27B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_vsync.gpio4_23, vout1_d19.off */
/* P8_27b (ball A8) gpio8_19 */
- P8_27_pruout_pin: pinmux_P8_27_pruout_pin { pinctrl-single,pins = < P8_27_PRUOUT >; }; /* vout1_d19.pr2_pru0_gpo16, vout1_vsync.off */
- P8_27_pruin_pin: pinmux_P8_27_pruin_pin { pinctrl-single,pins = < P8_27_PRUIN >; }; /* vout1_d19.pr2_pru0_gpi16, vout1_vsync.off */
+ P8_27_pruout_pin: pinmux_P8_27_pruout_pin { pinctrl-single,pins = <
+ P8_27B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P8_27A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d19.pr2_pru0_gpo16, vout1_vsync.off */
+ P8_27_pruin_pin: pinmux_P8_27_pruin_pin { pinctrl-single,pins = <
+ P8_27B( PIN_INPUT | MUX_MODE12)
+ P8_27A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d19.pr2_pru0_gpi16, vout1_vsync.off */
/* P8_28a (ball D11) gpio4_19 */
- P8_28_default_pin: pinmux_P8_28_default_pin { pinctrl-single,pins = < P8_28A_DEFAULT >; }; /* vout1_clk.gpio4_19, vout1_d20.off */
- P8_28_gpio_pin: pinmux_P8_28_gpio_pin { pinctrl-single,pins = < P8_28A_GPIO >; }; /* vout1_clk.gpio4_19, vout1_d20.off */
- P8_28_gpio_pu_pin: pinmux_P8_28_gpio_pu_pin { pinctrl-single,pins = < P8_28A_GPIO_PU >; }; /* vout1_clk.gpio4_19, vout1_d20.off */
- P8_28_gpio_pd_pin: pinmux_P8_28_gpio_pd_pin { pinctrl-single,pins = < P8_28A_GPIO_PD >; }; /* vout1_clk.gpio4_19, vout1_d20.off */
- P8_28_gpio_input_pin: pinmux_P8_28_gpio_input_pin { pinctrl-single,pins = < P8_28A_GPIO_INPUT >; }; /* vout1_clk.gpio4_19, vout1_d20.off */
+ P8_28_default_pin: pinmux_P8_28_default_pin { pinctrl-single,pins = <
+ P8_28A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_28B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_clk.gpio4_19, vout1_d20.off */
+ P8_28_gpio_pin: pinmux_P8_28_gpio_pin { pinctrl-single,pins = <
+ P8_28A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P8_28B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_clk.gpio4_19, vout1_d20.off */
+ P8_28_gpio_pu_pin: pinmux_P8_28_gpio_pu_pin { pinctrl-single,pins = <
+ P8_28A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P8_28B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_clk.gpio4_19, vout1_d20.off */
+ P8_28_gpio_pd_pin: pinmux_P8_28_gpio_pd_pin { pinctrl-single,pins = <
+ P8_28A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_28B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_clk.gpio4_19, vout1_d20.off */
+ P8_28_gpio_input_pin: pinmux_P8_28_gpio_input_pin { pinctrl-single,pins = <
+ P8_28A( PIN_INPUT | MUX_MODE14)
+ P8_28B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_clk.gpio4_19, vout1_d20.off */
/* P8_28b (ball C9) gpio8_20 */
- P8_28_pruout_pin: pinmux_P8_28_pruout_pin { pinctrl-single,pins = < P8_28A_PRUOUT >; }; /* vout1_d20.pr2_pru0_gpo17, vout1_clk.off */
- P8_28_pruin_pin: pinmux_P8_28_pruin_pin { pinctrl-single,pins = < P8_28A_PRUIN >; }; /* vout1_d20.pr2_pru0_gpi17, vout1_clk.off */
+ P8_28_pruout_pin: pinmux_P8_28_pruout_pin { pinctrl-single,pins = <
+ P8_28B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P8_28A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d20.pr2_pru0_gpo17, vout1_clk.off */
+ P8_28_pruin_pin: pinmux_P8_28_pruin_pin { pinctrl-single,pins = <
+ P8_28B( PIN_INPUT | MUX_MODE12)
+ P8_28A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d20.pr2_pru0_gpi17, vout1_clk.off */
/* P8_29a (ball C11) gpio4_22 */
- P8_29_default_pin: pinmux_P8_29_default_pin { pinctrl-single,pins = < P8_29_DEFAULT >; }; /* vout1_hsync.gpio4_22, vout1_d21.off */
- P8_29_gpio_pin: pinmux_P8_29_gpio_pin { pinctrl-single,pins = < P8_29_GPIO >; }; /* vout1_hsync.gpio4_22, vout1_d21.off */
- P8_29_gpio_pu_pin: pinmux_P8_29_gpio_pu_pin { pinctrl-single,pins = < P8_29_GPIO_PU >; }; /* vout1_hsync.gpio4_22, vout1_d21.off */
- P8_29_gpio_pd_pin: pinmux_P8_29_gpio_pd_pin { pinctrl-single,pins = < P8_29_GPIO_PD >; }; /* vout1_hsync.gpio4_22, vout1_d21.off */
- P8_29_gpio_input_pin: pinmux_P8_29_gpio_input_pin { pinctrl-single,pins = < P8_29_GPIO_INPUT >; }; /* vout1_hsync.gpio4_22, vout1_d21.off */
+ P8_29_default_pin: pinmux_P8_29_default_pin { pinctrl-single,pins = <
+ P8_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_29B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_hsync.gpio4_22, vout1_d21.off */
+ P8_29_gpio_pin: pinmux_P8_29_gpio_pin { pinctrl-single,pins = <
+ P8_29A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P8_29B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_hsync.gpio4_22, vout1_d21.off */
+ P8_29_gpio_pu_pin: pinmux_P8_29_gpio_pu_pin { pinctrl-single,pins = <
+ P8_29A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P8_29B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_hsync.gpio4_22, vout1_d21.off */
+ P8_29_gpio_pd_pin: pinmux_P8_29_gpio_pd_pin { pinctrl-single,pins = <
+ P8_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_29B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_hsync.gpio4_22, vout1_d21.off */
+ P8_29_gpio_input_pin: pinmux_P8_29_gpio_input_pin { pinctrl-single,pins = <
+ P8_29A( PIN_INPUT | MUX_MODE14)
+ P8_29B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_hsync.gpio4_22, vout1_d21.off */
/* P8_29b (ball A9) gpio8_21 */
- P8_29_pruout_pin: pinmux_P8_29_pruout_pin { pinctrl-single,pins = < P8_29_PRUOUT >; }; /* vout1_d21.pr2_pru0_gpo18, vout1_hsync.off */
- P8_29_pruin_pin: pinmux_P8_29_pruin_pin { pinctrl-single,pins = < P8_29_PRUIN >; }; /* vout1_d21.pr2_pru0_gpi18, vout1_hsync.off */
+ P8_29_pruout_pin: pinmux_P8_29_pruout_pin { pinctrl-single,pins = <
+ P8_29B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P8_29A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d21.pr2_pru0_gpo18, vout1_hsync.off */
+ P8_29_pruin_pin: pinmux_P8_29_pruin_pin { pinctrl-single,pins = <
+ P8_29B( PIN_INPUT | MUX_MODE12)
+ P8_29A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d21.pr2_pru0_gpi18, vout1_hsync.off */
/* P8_30a (ball B10) gpio4_20 */
- P8_30_default_pin: pinmux_P8_30_default_pin { pinctrl-single,pins = < P8_30_DEFAULT >; }; /* vout1_de.gpio4_20, vout1_d22.off */
- P8_30_gpio_pin: pinmux_P8_30_gpio_pin { pinctrl-single,pins = < P8_30_GPIO >; }; /* vout1_de.gpio4_20, vout1_d22.off */
- P8_30_gpio_pu_pin: pinmux_P8_30_gpio_pu_pin { pinctrl-single,pins = < P8_30_GPIO_PU >; }; /* vout1_de.gpio4_20, vout1_d22.off */
- P8_30_gpio_pd_pin: pinmux_P8_30_gpio_pd_pin { pinctrl-single,pins = < P8_30_GPIO_PD >; }; /* vout1_de.gpio4_20, vout1_d22.off */
- P8_30_gpio_input_pin: pinmux_P8_30_gpio_input_pin { pinctrl-single,pins = < P8_30_GPIO_INPUT >; }; /* vout1_de.gpio4_20, vout1_d22.off */
+ P8_30_default_pin: pinmux_P8_30_default_pin { pinctrl-single,pins = <
+ P8_30A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_30B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_de.gpio4_20, vout1_d22.off */
+ P8_30_gpio_pin: pinmux_P8_30_gpio_pin { pinctrl-single,pins = <
+ P8_30A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P8_30B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_de.gpio4_20, vout1_d22.off */
+ P8_30_gpio_pu_pin: pinmux_P8_30_gpio_pu_pin { pinctrl-single,pins = <
+ P8_30A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P8_30B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_de.gpio4_20, vout1_d22.off */
+ P8_30_gpio_pd_pin: pinmux_P8_30_gpio_pd_pin { pinctrl-single,pins = <
+ P8_30A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_30B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_de.gpio4_20, vout1_d22.off */
+ P8_30_gpio_input_pin: pinmux_P8_30_gpio_input_pin { pinctrl-single,pins = <
+ P8_30A( PIN_INPUT | MUX_MODE14)
+ P8_30B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_de.gpio4_20, vout1_d22.off */
/* P8_30b (ball B9) gpio8_22 */
- P8_30_pruout_pin: pinmux_P8_30_pruout_pin { pinctrl-single,pins = < P8_30_PRUOUT >; }; /* vout1_d22.pr2_pru0_gpo19, vout1_de.off */
- P8_30_pruin_pin: pinmux_P8_30_pruin_pin { pinctrl-single,pins = < P8_30_PRUIN >; }; /* vout1_d22.pr2_pru0_gpi19, vout1_de.off */
+ P8_30_pruout_pin: pinmux_P8_30_pruout_pin { pinctrl-single,pins = <
+ P8_30B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P8_30A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d22.pr2_pru0_gpo19, vout1_de.off */
+ P8_30_pruin_pin: pinmux_P8_30_pruin_pin { pinctrl-single,pins = <
+ P8_30B( PIN_INPUT | MUX_MODE12)
+ P8_30A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d22.pr2_pru0_gpi19, vout1_de.off */
/* P8_31a (ball C8) gpio8_14 */
- P8_31_default_pin: pinmux_P8_31_default_pin { pinctrl-single,pins = < P8_31_DEFAULT >; }; /* vout1_d14.gpio8_14, mcasp4_axr0.off */
- P8_31_gpio_pin: pinmux_P8_31_gpio_pin { pinctrl-single,pins = < P8_31_GPIO >; }; /* vout1_d14.gpio8_14, mcasp4_axr0.off */
- P8_31_gpio_pu_pin: pinmux_P8_31_gpio_pu_pin { pinctrl-single,pins = < P8_31_GPIO_PU >; }; /* vout1_d14.gpio8_14, mcasp4_axr0.off */
- P8_31_gpio_pd_pin: pinmux_P8_31_gpio_pd_pin { pinctrl-single,pins = < P8_31_GPIO_PD >; }; /* vout1_d14.gpio8_14, mcasp4_axr0.off */
- P8_31_gpio_input_pin: pinmux_P8_31_gpio_input_pin { pinctrl-single,pins = < P8_31_GPIO_INPUT >; }; /* vout1_d14.gpio8_14, mcasp4_axr0.off */
+ P8_31_default_pin: pinmux_P8_31_default_pin { pinctrl-single,pins = <
+ P8_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_31B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d14.gpio8_14, mcasp4_axr0.off */
+ P8_31_gpio_pin: pinmux_P8_31_gpio_pin { pinctrl-single,pins = <
+ P8_31A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P8_31B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d14.gpio8_14, mcasp4_axr0.off */
+ P8_31_gpio_pu_pin: pinmux_P8_31_gpio_pu_pin { pinctrl-single,pins = <
+ P8_31A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P8_31B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d14.gpio8_14, mcasp4_axr0.off */
+ P8_31_gpio_pd_pin: pinmux_P8_31_gpio_pd_pin { pinctrl-single,pins = <
+ P8_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_31B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d14.gpio8_14, mcasp4_axr0.off */
+ P8_31_gpio_input_pin: pinmux_P8_31_gpio_input_pin { pinctrl-single,pins = <
+ P8_31A( PIN_INPUT | MUX_MODE14)
+ P8_31B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d14.gpio8_14, mcasp4_axr0.off */
/* P8_31b (ball G16) */
- P8_31_uart_pin: pinmux_P8_31_uart_pin { pinctrl-single,pins = < P8_31_UART >; }; /* mcasp4_axr0.uart4_rxd,vout1_d14.off */
+ P8_31_uart_pin: pinmux_P8_31_uart_pin { pinctrl-single,pins = <
+ P8_31B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4)
+ P8_31A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp4_axr0.uart4_rxd,vout1_d14.off */
/* P8_32a (ball C7) gpio8_15 */
- P8_32_default_pin: pinmux_P8_32_default_pin { pinctrl-single,pins = < P8_32_DEFAULT >; }; /* vout1_d15.gpio8_15, mcasp4_axr1.off */
- P8_32_gpio_pin: pinmux_P8_32_gpio_pin { pinctrl-single,pins = < P8_32_GPIO >; }; /* vout1_d15.gpio8_15, mcasp4_axr1.off */
- P8_32_gpio_pu_pin: pinmux_P8_32_gpio_pu_pin { pinctrl-single,pins = < P8_32_GPIO_PU >; }; /* vout1_d15.gpio8_15, mcasp4_axr1.off */
- P8_32_gpio_pd_pin: pinmux_P8_32_gpio_pd_pin { pinctrl-single,pins = < P8_32_GPIO_PD >; }; /* vout1_d15.gpio8_15, mcasp4_axr1.off */
- P8_32_gpio_input_pin: pinmux_P8_32_gpio_input_pin { pinctrl-single,pins = < P8_32_GPIO_INPUT >; }; /* vout1_d15.gpio8_15, mcasp4_axr1.off */
+ P8_32_default_pin: pinmux_P8_32_default_pin { pinctrl-single,pins = <
+ P8_32A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_32B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d15.gpio8_15, mcasp4_axr1.off */
+ P8_32_gpio_pin: pinmux_P8_32_gpio_pin { pinctrl-single,pins = <
+ P8_32A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P8_32B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d15.gpio8_15, mcasp4_axr1.off */
+ P8_32_gpio_pu_pin: pinmux_P8_32_gpio_pu_pin { pinctrl-single,pins = <
+ P8_32A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P8_32B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d15.gpio8_15, mcasp4_axr1.off */
+ P8_32_gpio_pd_pin: pinmux_P8_32_gpio_pd_pin { pinctrl-single,pins = <
+ P8_32A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_32B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d15.gpio8_15, mcasp4_axr1.off */
+ P8_32_gpio_input_pin: pinmux_P8_32_gpio_input_pin { pinctrl-single,pins = <
+ P8_32A( PIN_INPUT | MUX_MODE14)
+ P8_32B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d15.gpio8_15, mcasp4_axr1.off */
/* P8_32b (ball D17) */
- P8_32_uart_pin: pinmux_P8_32_uart_pin { pinctrl-single,pins = < P8_32_UART >; }; /* mcasp4_axr1.uart4_txd, vout1_d15.off */
+ P8_32_uart_pin: pinmux_P8_32_uart_pin { pinctrl-single,pins = <
+ P8_32B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4)
+ P8_32A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp4_axr1.uart4_txd, vout1_d15.off */
/* P8_33a (ball C6) gpio8_13 */
- P8_33_default_pin: pinmux_P8_33_default_pin { pinctrl-single,pins = < P8_33_DEFAULT >; }; /* vout1_d13.gpio8_13, vin1a_fld0.off */
- P8_33_gpio_pin: pinmux_P8_33_gpio_pin { pinctrl-single,pins = < P8_33_GPIO >; }; /* vout1_d13.gpio8_13, vin1a_fld0.off */
- P8_33_gpio_pu_pin: pinmux_P8_33_gpio_pu_pin { pinctrl-single,pins = < P8_33_GPIO_PU >; }; /* vout1_d13.gpio8_13, vin1a_fld0.off */
- P8_33_gpio_pd_pin: pinmux_P8_33_gpio_pd_pin { pinctrl-single,pins = < P8_33_GPIO_PD >; }; /* vout1_d13.gpio8_13, vin1a_fld0.off */
- P8_33_gpio_input_pin: pinmux_P8_33_gpio_input_pin { pinctrl-single,pins = < P8_33_GPIO_INPUT >; }; /* vout1_d13.gpio8_13, vin1a_fld0.off */
+ P8_33_default_pin: pinmux_P8_33_default_pin { pinctrl-single,pins = <
+ P8_33A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_33B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d13.gpio8_13, vin1a_fld0.off */
+ P8_33_gpio_pin: pinmux_P8_33_gpio_pin { pinctrl-single,pins = <
+ P8_33A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P8_33B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d13.gpio8_13, vin1a_fld0.off */
+ P8_33_gpio_pu_pin: pinmux_P8_33_gpio_pu_pin { pinctrl-single,pins = <
+ P8_33A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P8_33B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d13.gpio8_13, vin1a_fld0.off */
+ P8_33_gpio_pd_pin: pinmux_P8_33_gpio_pd_pin { pinctrl-single,pins = <
+ P8_33A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_33B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d13.gpio8_13, vin1a_fld0.off */
+ P8_33_gpio_input_pin: pinmux_P8_33_gpio_input_pin { pinctrl-single,pins = <
+ P8_33A( PIN_INPUT | MUX_MODE14)
+ P8_33B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d13.gpio8_13, vin1a_fld0.off */
/* P8_33b (ball AF9) gpio3_1 */
- P8_33_qep_pin: pinmux_P8_33_qep_pin { pinctrl-single,pins = < P8_33_QEP >; }; /* vin1a_fld0.eQEP1B_in, vout1_d13.off */
+ P8_33_qep_pin: pinmux_P8_33_qep_pin { pinctrl-single,pins = <
+ P8_33B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10)
+ P8_33A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin1a_fld0.eQEP1B_in, vout1_d13.off */
/* P8_34a (ball D8) gpio8_11 */
- P8_34_default_pin: pinmux_P8_34_default_pin { pinctrl-single,pins = < P8_34_DEFAULT >; }; /* vout1_d11.gpio8_11, vin2a_vsync0.off */
- P8_34_gpio_pin: pinmux_P8_34_gpio_pin { pinctrl-single,pins = < P8_34_GPIO >; }; /* vout1_d11.gpio8_11, vin2a_vsync0.off */
- P8_34_gpio_pu_pin: pinmux_P8_34_gpio_pu_pin { pinctrl-single,pins = < P8_34_GPIO_PU >; }; /* vout1_d11.gpio8_11, vin2a_vsync0.off */
- P8_34_gpio_pd_pin: pinmux_P8_34_gpio_pd_pin { pinctrl-single,pins = < P8_34_GPIO_PD >; }; /* vout1_d11.gpio8_11, vin2a_vsync0.off */
- P8_34_gpio_input_pin: pinmux_P8_34_gpio_input_pin { pinctrl-single,pins = < P8_34_GPIO_INPUT >; }; /* vout1_d11.gpio8_11, vin2a_vsync0.off */
+ P8_34_default_pin: pinmux_P8_34_default_pin { pinctrl-single,pins = <
+ P8_34A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_34B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d11.gpio8_11, vin2a_vsync0.off */
+ P8_34_gpio_pin: pinmux_P8_34_gpio_pin { pinctrl-single,pins = <
+ P8_34A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P8_34B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d11.gpio8_11, vin2a_vsync0.off */
+ P8_34_gpio_pu_pin: pinmux_P8_34_gpio_pu_pin { pinctrl-single,pins = <
+ P8_34A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P8_34B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d11.gpio8_11, vin2a_vsync0.off */
+ P8_34_gpio_pd_pin: pinmux_P8_34_gpio_pd_pin { pinctrl-single,pins = <
+ P8_34A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_34B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d11.gpio8_11, vin2a_vsync0.off */
+ P8_34_gpio_input_pin: pinmux_P8_34_gpio_input_pin { pinctrl-single,pins = <
+ P8_34A( PIN_INPUT | MUX_MODE14)
+ P8_34B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d11.gpio8_11, vin2a_vsync0.off */
/* P8_34b (ball G6) gpio4_0 */
- P8_34_pwm_pin: pinmux_P8_34_pwm_pin { pinctrl-single,pins = < P8_34_PWM >; }; /* vin2a_vsync0.ehrpwm1A, vout1_d11.off */
+ P8_34_pwm_pin: pinmux_P8_34_pwm_pin { pinctrl-single,pins = <
+ P8_34B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10)
+ P8_34A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_vsync0.ehrpwm1A, vout1_d11.off */
/* P8_35a (ball A5) gpio8_12 */
- P8_35_default_pin: pinmux_P8_35_default_pin { pinctrl-single,pins = < P8_35_DEFAULT >; }; /* vout1_d12.gpio8_12, vin1a_de0.off */
- P8_35_gpio_pin: pinmux_P8_35_gpio_pin { pinctrl-single,pins = < P8_35_GPIO >; }; /* vout1_d12.gpio8_12, vin1a_de0.off */
- P8_35_gpio_pu_pin: pinmux_P8_35_gpio_pu_pin { pinctrl-single,pins = < P8_35_GPIO_PU >; }; /* vout1_d12.gpio8_12, vin1a_de0.off */
- P8_35_gpio_pd_pin: pinmux_P8_35_gpio_pd_pin { pinctrl-single,pins = < P8_35_GPIO_PD >; }; /* vout1_d12.gpio8_12, vin1a_de0.off */
- P8_35_gpio_input_pin: pinmux_P8_35_gpio_input_pin { pinctrl-single,pins = < P8_35_GPIO_INPUT >; }; /* vout1_d12.gpio8_12, vin1a_de0.off */
+ P8_35_default_pin: pinmux_P8_35_default_pin { pinctrl-single,pins = <
+ P8_35A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_35B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d12.gpio8_12, vin1a_de0.off */
+ P8_35_gpio_pin: pinmux_P8_35_gpio_pin { pinctrl-single,pins = <
+ P8_35A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P8_35B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d12.gpio8_12, vin1a_de0.off */
+ P8_35_gpio_pu_pin: pinmux_P8_35_gpio_pu_pin { pinctrl-single,pins = <
+ P8_35A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P8_35B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d12.gpio8_12, vin1a_de0.off */
+ P8_35_gpio_pd_pin: pinmux_P8_35_gpio_pd_pin { pinctrl-single,pins = <
+ P8_35A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_35B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d12.gpio8_12, vin1a_de0.off */
+ P8_35_gpio_input_pin: pinmux_P8_35_gpio_input_pin { pinctrl-single,pins = <
+ P8_35A( PIN_INPUT | MUX_MODE14)
+ P8_35B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d12.gpio8_12, vin1a_de0.off */
/* P8_35b (ball AD9) gpio3_0 */
- P8_35_qep_pin: pinmux_P8_35_qep_pin { pinctrl-single,pins = < P8_35_QEP >; }; /* vin1a_de0.eQEP1A_in, vout1_d12.off */
+ P8_35_qep_pin: pinmux_P8_35_qep_pin { pinctrl-single,pins = <
+ P8_35B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10)
+ P8_35A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin1a_de0.eQEP1A_in, vout1_d12.off */
/* P8_36a (ball D7) gpio8_10 */
- P8_36_default_pin: pinmux_P8_36_default_pin { pinctrl-single,pins = < P8_36_DEFAULT >; }; /* vout1_d10.gpio8_10, vin2a_d0.off */
- P8_36_gpio_pin: pinmux_P8_36_gpio_pin { pinctrl-single,pins = < P8_36_GPIO >; }; /* vout1_d10.gpio8_10, vin2a_d0.off */
- P8_36_gpio_pu_pin: pinmux_P8_36_gpio_pu_pin { pinctrl-single,pins = < P8_36_GPIO_PU >; }; /* vout1_d10.gpio8_10, vin2a_d0.off */
- P8_36_gpio_pd_pin: pinmux_P8_36_gpio_pd_pin { pinctrl-single,pins = < P8_36_GPIO_PD >; }; /* vout1_d10.gpio8_10, vin2a_d0.off */
- P8_36_gpio_input_pin: pinmux_P8_36_gpio_input_pin { pinctrl-single,pins = < P8_36_GPIO_INPUT >; }; /* vout1_d10.gpio8_10, vin2a_d0.off */
+ P8_36_default_pin: pinmux_P8_36_default_pin { pinctrl-single,pins = <
+ P8_36A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_36B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d10.gpio8_10, vin2a_d0.off */
+ P8_36_gpio_pin: pinmux_P8_36_gpio_pin { pinctrl-single,pins = <
+ P8_36A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P8_36B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d10.gpio8_10, vin2a_d0.off */
+ P8_36_gpio_pu_pin: pinmux_P8_36_gpio_pu_pin { pinctrl-single,pins = <
+ P8_36A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P8_36B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d10.gpio8_10, vin2a_d0.off */
+ P8_36_gpio_pd_pin: pinmux_P8_36_gpio_pd_pin { pinctrl-single,pins = <
+ P8_36A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_36B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d10.gpio8_10, vin2a_d0.off */
+ P8_36_gpio_input_pin: pinmux_P8_36_gpio_input_pin { pinctrl-single,pins = <
+ P8_36A( PIN_INPUT | MUX_MODE14)
+ P8_36B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d10.gpio8_10, vin2a_d0.off */
/* P8_36b (ball F2) gpio4_1 */
- P8_36_pwm_pin: pinmux_P8_36_pwm_pin { pinctrl-single,pins = < P8_36_PWM >; }; /* vin2a_d0.ehrpwm1B, vout1_d10.off */
+ P8_36_pwm_pin: pinmux_P8_36_pwm_pin { pinctrl-single,pins = <
+ P8_36B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10)
+ P8_36A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d0.ehrpwm1B, vout1_d10.off */
/* P8_37a (ball E8) gpio8_8 */
- P8_37_default_pin: pinmux_P8_37_default_pin { pinctrl-single,pins = < P8_37_DEFAULT >; }; /* vout1_d8.gpio8_8, mcasp4_fsx.off */
- P8_37_gpio_pin: pinmux_P8_37_gpio_pin { pinctrl-single,pins = < P8_37_GPIO >; }; /* vout1_d8.gpio8_8, mcasp4_fsx.off */
- P8_37_gpio_pu_pin: pinmux_P8_37_gpio_pu_pin { pinctrl-single,pins = < P8_37_GPIO_PU >; }; /* vout1_d8.gpio8_8, mcasp4_fsx.off */
- P8_37_gpio_pd_pin: pinmux_P8_37_gpio_pd_pin { pinctrl-single,pins = < P8_37_GPIO_PD >; }; /* vout1_d8.gpio8_8, mcasp4_fsx.off */
- P8_37_gpio_input_pin: pinmux_P8_37_gpio_input_pin { pinctrl-single,pins = < P8_37_GPIO_INPUT >; }; /* vout1_d8.gpio8_8, mcasp4_fsx.off */
+ P8_37_default_pin: pinmux_P8_37_default_pin { pinctrl-single,pins = <
+ P8_37A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_37B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d8.gpio8_8, mcasp4_fsx.off */
+ P8_37_gpio_pin: pinmux_P8_37_gpio_pin { pinctrl-single,pins = <
+ P8_37A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P8_37B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d8.gpio8_8, mcasp4_fsx.off */
+ P8_37_gpio_pu_pin: pinmux_P8_37_gpio_pu_pin { pinctrl-single,pins = <
+ P8_37A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P8_37B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d8.gpio8_8, mcasp4_fsx.off */
+ P8_37_gpio_pd_pin: pinmux_P8_37_gpio_pd_pin { pinctrl-single,pins = <
+ P8_37A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_37B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d8.gpio8_8, mcasp4_fsx.off */
+ P8_37_gpio_input_pin: pinmux_P8_37_gpio_input_pin { pinctrl-single,pins = <
+ P8_37A( PIN_INPUT | MUX_MODE14)
+ P8_37B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d8.gpio8_8, mcasp4_fsx.off */
/* P8_37b (ball A21) */
- P8_37_uart_pin: pinmux_P8_37_uart_pin { pinctrl-single,pins = < P8_37_UART >; }; /* mcasp4_fsx.uart8_txd. vout1_d8.off */
+ P8_37_uart_pin: pinmux_P8_37_uart_pin { pinctrl-single,pins = <
+ P8_37B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3)
+ P8_37A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp4_fsx.uart8_txd. vout1_d8.off */
/* P8_38a (ball D9) gpio8_9 */
- P8_38_default_pin: pinmux_P8_38_default_pin { pinctrl-single,pins = < P8_38_DEFAULT >; }; /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
- P8_38_gpio_pin: pinmux_P8_38_gpio_pin { pinctrl-single,pins = < P8_38_GPIO >; }; /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
- P8_38_gpio_pu_pin: pinmux_P8_38_gpio_pu_pin { pinctrl-single,pins = < P8_38_GPIO_PU >; }; /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
- P8_38_gpio_pd_pin: pinmux_P8_38_gpio_pd_pin { pinctrl-single,pins = < P8_38_GPIO_PD >; }; /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
- P8_38_gpio_input_pin: pinmux_P8_38_gpio_input_pin { pinctrl-single,pins = < P8_38_GPIO_INPUT >; }; /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
+ P8_38_default_pin: pinmux_P8_38_default_pin { pinctrl-single,pins = <
+ P8_38A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_38B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
+ P8_38_gpio_pin: pinmux_P8_38_gpio_pin { pinctrl-single,pins = <
+ P8_38A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P8_38B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
+ P8_38_gpio_pu_pin: pinmux_P8_38_gpio_pu_pin { pinctrl-single,pins = <
+ P8_38A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P8_38B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
+ P8_38_gpio_pd_pin: pinmux_P8_38_gpio_pd_pin { pinctrl-single,pins = <
+ P8_38A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_38B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
+ P8_38_gpio_input_pin: pinmux_P8_38_gpio_input_pin { pinctrl-single,pins = <
+ P8_38A( PIN_INPUT | MUX_MODE14)
+ P8_38B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
/* P8_38b (ball C18) */
- P8_38_uart_pin: pinmux_P8_38_uart_pin { pinctrl-single,pins = < P8_38_UART >; }; /* mcasp4_aclkx.uart8_rxd, vout1_d9.off */
+ P8_38_uart_pin: pinmux_P8_38_uart_pin { pinctrl-single,pins = <
+ P8_38B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3)
+ P8_38A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp4_aclkx.uart8_rxd, vout1_d9.off */
/* P8_39 (ball F8) gpio8_6 */
- P8_39_default_pin: pinmux_P8_39_default_pin { pinctrl-single,pins = < P8_39_DEFAULT >; }; /* vout1_d6.gpio8_6 */
- P8_39_gpio_pin: pinmux_P8_39_gpio_pin { pinctrl-single,pins = < P8_39_GPIO >; }; /* vout1_d6.gpio8_6 */
- P8_39_gpio_pu_pin: pinmux_P8_39_gpio_pu_pin { pinctrl-single,pins = < P8_39_GPIO_PU >; }; /* vout1_d6.gpio8_6 */
- P8_39_gpio_pd_pin: pinmux_P8_39_gpio_pd_pin { pinctrl-single,pins = < P8_39_GPIO_PD >; }; /* vout1_d6.gpio8_6 */
- P8_39_gpio_input_pin: pinmux_P8_39_gpio_input_pin { pinctrl-single,pins = < P8_39_GPIO_INPUT >; }; /* vout1_d6.gpio8_6 */
- P8_39_pruout_pin: pinmux_P8_39_pruout_pin { pinctrl-single,pins = < P8_39_PRUOUT >; }; /* vout1_d6.pr2_pru0_gpo3 */
- P8_39_pruin_pin: pinmux_P8_39_pruin_pin { pinctrl-single,pins = < P8_39_PRUIN >; }; /* vout1_d6.pr2_pru0_gpi3 */
+ P8_39_default_pin: pinmux_P8_39_default_pin { pinctrl-single,pins = <
+ P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
+ P8_39_gpio_pin: pinmux_P8_39_gpio_pin { pinctrl-single,pins = <
+ P8_39( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
+ P8_39_gpio_pu_pin: pinmux_P8_39_gpio_pu_pin { pinctrl-single,pins = <
+ P8_39( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
+ P8_39_gpio_pd_pin: pinmux_P8_39_gpio_pd_pin { pinctrl-single,pins = <
+ P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
+ P8_39_gpio_input_pin: pinmux_P8_39_gpio_input_pin { pinctrl-single,pins = <
+ P8_39( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d6.gpio8_6 */
+ P8_39_pruout_pin: pinmux_P8_39_pruout_pin { pinctrl-single,pins = <
+ P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d6.pr2_pru0_gpo3 */
+ P8_39_pruin_pin: pinmux_P8_39_pruin_pin { pinctrl-single,pins = <
+ P8_39( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d6.pr2_pru0_gpi3 */
/* P8_40 (ball E7) gpio8_7 */
- P8_40_default_pin: pinmux_P8_40_default_pin { pinctrl-single,pins = < P8_40_DEFAULT >; }; /* vout1_d7.gpio8_7 */
- P8_40_gpio_pin: pinmux_P8_40_gpio_pin { pinctrl-single,pins = < P8_40_GPIO >; }; /* vout1_d7.gpio8_7 */
- P8_40_gpio_pu_pin: pinmux_P8_40_gpio_pu_pin { pinctrl-single,pins = < P8_40_GPIO_PU >; }; /* vout1_d7.gpio8_7 */
- P8_40_gpio_pd_pin: pinmux_P8_40_gpio_pd_pin { pinctrl-single,pins = < P8_40_GPIO_PD >; }; /* vout1_d7.gpio8_7 */
- P8_40_gpio_input_pin: pinmux_P8_40_gpio_input_pin { pinctrl-single,pins = < P8_40_GPIO_INPUT >; }; /* vout1_d7.gpio8_7 */
- P8_40_pruout_pin: pinmux_P8_40_pruout_pin { pinctrl-single,pins = < P8_40_PRUOUT >; }; /* vout1_d7.pr2_pru0_gpo4 */
- P8_40_pruin_pin: pinmux_P8_40_pruin_pin { pinctrl-single,pins = < P8_40_PRUIN >; }; /* vout1_d7.pr2_pru0_gpi4 */
+ P8_40_default_pin: pinmux_P8_40_default_pin { pinctrl-single,pins = <
+ P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
+ P8_40_gpio_pin: pinmux_P8_40_gpio_pin { pinctrl-single,pins = <
+ P8_40( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
+ P8_40_gpio_pu_pin: pinmux_P8_40_gpio_pu_pin { pinctrl-single,pins = <
+ P8_40( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
+ P8_40_gpio_pd_pin: pinmux_P8_40_gpio_pd_pin { pinctrl-single,pins = <
+ P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
+ P8_40_gpio_input_pin: pinmux_P8_40_gpio_input_pin { pinctrl-single,pins = <
+ P8_40( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d7.gpio8_7 */
+ P8_40_pruout_pin: pinmux_P8_40_pruout_pin { pinctrl-single,pins = <
+ P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d7.pr2_pru0_gpo4 */
+ P8_40_pruin_pin: pinmux_P8_40_pruin_pin { pinctrl-single,pins = <
+ P8_40( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d7.pr2_pru0_gpi4 */
/* P8_41 (ball E9) gpio8_4 */
- P8_41_default_pin: pinmux_P8_41_default_pin { pinctrl-single,pins = < P8_41_DEFAULT >; }; /* vout1_d4.gpio8_4 */
- P8_41_gpio_pin: pinmux_P8_41_gpio_pin { pinctrl-single,pins = < P8_41_GPIO >; }; /* vout1_d4.gpio8_4 */
- P8_41_gpio_pu_pin: pinmux_P8_41_gpio_pu_pin { pinctrl-single,pins = < P8_41_GPIO_PU >; }; /* vout1_d4.gpio8_4 */
- P8_41_gpio_pd_pin: pinmux_P8_41_gpio_pd_pin { pinctrl-single,pins = < P8_41_GPIO_PD >; }; /* vout1_d4.gpio8_4 */
- P8_41_gpio_input_pin: pinmux_P8_41_gpio_input_pin { pinctrl-single,pins = < P8_41_GPIO_INPUT >; }; /* vout1_d4.gpio8_4 */
- P8_41_pruout_pin: pinmux_P8_41_pruout_pin { pinctrl-single,pins = < P8_41_PRUOUT >; }; /* vout1_d4.pr2_pru0_gpo1 */
- P8_41_pruin_pin: pinmux_P8_41_pruin_pin { pinctrl-single,pins = < P8_41_PRUIN >; }; /* vout1_d4.pr2_pru0_gpi1 */
+ P8_41_default_pin: pinmux_P8_41_default_pin { pinctrl-single,pins = <
+ P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
+ P8_41_gpio_pin: pinmux_P8_41_gpio_pin { pinctrl-single,pins = <
+ P8_41( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
+ P8_41_gpio_pu_pin: pinmux_P8_41_gpio_pu_pin { pinctrl-single,pins = <
+ P8_41( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
+ P8_41_gpio_pd_pin: pinmux_P8_41_gpio_pd_pin { pinctrl-single,pins = <
+ P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
+ P8_41_gpio_input_pin: pinmux_P8_41_gpio_input_pin { pinctrl-single,pins = <
+ P8_41( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d4.gpio8_4 */
+ P8_41_pruout_pin: pinmux_P8_41_pruout_pin { pinctrl-single,pins = <
+ P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d4.pr2_pru0_gpo1 */
+ P8_41_pruin_pin: pinmux_P8_41_pruin_pin { pinctrl-single,pins = <
+ P8_41( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d4.pr2_pru0_gpi1 */
/* P8_42 (ball F9) gpio8_5 */
- P8_42_default_pin: pinmux_P8_42_default_pin { pinctrl-single,pins = < P8_42_DEFAULT >; }; /* vout1_d5.gpio8_5 */
- P8_42_gpio_pin: pinmux_P8_42_gpio_pin { pinctrl-single,pins = < P8_42_GPIO >; }; /* vout1_d5.gpio8_5 */
- P8_42_gpio_pu_pin: pinmux_P8_42_gpio_pu_pin { pinctrl-single,pins = < P8_42_GPIO_PU >; }; /* vout1_d5.gpio8_5 */
- P8_42_gpio_pd_pin: pinmux_P8_42_gpio_pd_pin { pinctrl-single,pins = < P8_42_GPIO_PD >; }; /* vout1_d5.gpio8_5 */
- P8_42_gpio_input_pin: pinmux_P8_42_gpio_input_pin { pinctrl-single,pins = < P8_42_GPIO_INPUT >; }; /* vout1_d5.gpio8_5 */
- P8_42_pruout_pin: pinmux_P8_42_pruout_pin { pinctrl-single,pins = < P8_42_PRUOUT >; }; /* vout1_d5.pr2_pru0_gpo2 */
- P8_42_pruin_pin: pinmux_P8_42_pruin_pin { pinctrl-single,pins = < P8_42_PRUIN >; }; /* vout1_d5.pr2_pru0_gpi2 */
+ P8_42_default_pin: pinmux_P8_42_default_pin { pinctrl-single,pins = <
+ P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
+ P8_42_gpio_pin: pinmux_P8_42_gpio_pin { pinctrl-single,pins = <
+ P8_42( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
+ P8_42_gpio_pu_pin: pinmux_P8_42_gpio_pu_pin { pinctrl-single,pins = <
+ P8_42( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
+ P8_42_gpio_pd_pin: pinmux_P8_42_gpio_pd_pin { pinctrl-single,pins = <
+ P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
+ P8_42_gpio_input_pin: pinmux_P8_42_gpio_input_pin { pinctrl-single,pins = <
+ P8_42( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d5.gpio8_5 */
+ P8_42_pruout_pin: pinmux_P8_42_pruout_pin { pinctrl-single,pins = <
+ P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d5.pr2_pru0_gpo2 */
+ P8_42_pruin_pin: pinmux_P8_42_pruin_pin { pinctrl-single,pins = <
+ P8_42( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d5.pr2_pru0_gpi2 */
/* P8_43 (ball F10) gpio8_2 */
- P8_43_default_pin: pinmux_P8_43_default_pin { pinctrl-single,pins = < P8_43_DEFAULT >; }; /* vout1_d2.gpio8_2 */
- P8_43_gpio_pin: pinmux_P8_43_gpio_pin { pinctrl-single,pins = < P8_43_GPIO >; }; /* vout1_d2.gpio8_2 */
- P8_43_gpio_pu_pin: pinmux_P8_43_gpio_pu_pin { pinctrl-single,pins = < P8_43_GPIO_PU >; }; /* vout1_d2.gpio8_2 */
- P8_43_gpio_pd_pin: pinmux_P8_43_gpio_pd_pin { pinctrl-single,pins = < P8_43_GPIO_PD >; }; /* vout1_d2.gpio8_2 */
- P8_43_gpio_input_pin: pinmux_P8_43_gpio_input_pin { pinctrl-single,pins = < P8_43_GPIO_INPUT >; }; /* vout1_d2.gpio8_2 */
- P8_43_pruout_pin: pinmux_P8_43_pruout_pin { pinctrl-single,pins = < P8_43_PRUOUT >; }; /* vout1_d2.pr2_pru1_gpo20 */
- P8_43_pruin_pin: pinmux_P8_43_pruin_pin { pinctrl-single,pins = < P8_43_PRUIN >; }; /* vout1_d2.pr2_pru1_gpi20 */
+ P8_43_default_pin: pinmux_P8_43_default_pin { pinctrl-single,pins = <
+ P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
+ P8_43_gpio_pin: pinmux_P8_43_gpio_pin { pinctrl-single,pins = <
+ P8_43( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
+ P8_43_gpio_pu_pin: pinmux_P8_43_gpio_pu_pin { pinctrl-single,pins = <
+ P8_43( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
+ P8_43_gpio_pd_pin: pinmux_P8_43_gpio_pd_pin { pinctrl-single,pins = <
+ P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
+ P8_43_gpio_input_pin: pinmux_P8_43_gpio_input_pin { pinctrl-single,pins = <
+ P8_43( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d2.gpio8_2 */
+ P8_43_pruout_pin: pinmux_P8_43_pruout_pin { pinctrl-single,pins = <
+ P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d2.pr2_pru1_gpo20 */
+ P8_43_pruin_pin: pinmux_P8_43_pruin_pin { pinctrl-single,pins = <
+ P8_43( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d2.pr2_pru1_gpi20 */
/* P8_44 (ball G11) gpio8_3 */
- P8_44_default_pin: pinmux_P8_44_default_pin { pinctrl-single,pins = < P8_44_DEFAULT >; }; /* vout1_d3.gpio8_3 */
- P8_44_gpio_pin: pinmux_P8_44_gpio_pin { pinctrl-single,pins = < P8_44_GPIO >; }; /* vout1_d3.gpio8_3 */
- P8_44_gpio_pu_pin: pinmux_P8_44_gpio_pu_pin { pinctrl-single,pins = < P8_44_GPIO_PU >; }; /* vout1_d3.gpio8_3 */
- P8_44_gpio_pd_pin: pinmux_P8_44_gpio_pd_pin { pinctrl-single,pins = < P8_44_GPIO_PD >; }; /* vout1_d3.gpio8_3 */
- P8_44_gpio_input_pin: pinmux_P8_44_gpio_input_pin { pinctrl-single,pins = < P8_44_GPIO_INPUT >; }; /* vout1_d3.gpio8_3 */
- P8_44_pruout_pin: pinmux_P8_44_pruout_pin { pinctrl-single,pins = < P8_44_PRUOUT >; }; /* vout1_d3.pr2_pru0_gpo0 */
- P8_44_pruin_pin: pinmux_P8_44_pruin_pin { pinctrl-single,pins = < P8_44_PRUIN >; }; /* vout1_d3.pr2_pru0_gpi0 */
+ P8_44_default_pin: pinmux_P8_44_default_pin { pinctrl-single,pins = <
+ P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
+ P8_44_gpio_pin: pinmux_P8_44_gpio_pin { pinctrl-single,pins = <
+ P8_44( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
+ P8_44_gpio_pu_pin: pinmux_P8_44_gpio_pu_pin { pinctrl-single,pins = <
+ P8_44( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
+ P8_44_gpio_pd_pin: pinmux_P8_44_gpio_pd_pin { pinctrl-single,pins = <
+ P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
+ P8_44_gpio_input_pin: pinmux_P8_44_gpio_input_pin { pinctrl-single,pins = <
+ P8_44( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d3.gpio8_3 */
+ P8_44_pruout_pin: pinmux_P8_44_pruout_pin { pinctrl-single,pins = <
+ P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d3.pr2_pru0_gpo0 */
+ P8_44_pruin_pin: pinmux_P8_44_pruin_pin { pinctrl-single,pins = <
+ P8_44( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d3.pr2_pru0_gpi0 */
/* P8_45a (ball F11) gpio8_0 */
- P8_45_default_pin: pinmux_P8_45_default_pin { pinctrl-single,pins = < P8_45_DEFAULT >; }; /* vout1_d0.gpio8_0, vout1_d16.off */
- P8_45_gpio_pin: pinmux_P8_45_gpio_pin { pinctrl-single,pins = < P8_45_GPIO >; }; /* vout1_d0.gpio8_0, vout1_d16.off */
- P8_45_gpio_pu_pin: pinmux_P8_45_gpio_pu_pin { pinctrl-single,pins = < P8_45_GPIO_PU >; }; /* vout1_d0.gpio8_0, vout1_d16.off */
- P8_45_gpio_pd_pin: pinmux_P8_45_gpio_pd_pin { pinctrl-single,pins = < P8_45_GPIO_PD >; }; /* vout1_d0.gpio8_0, vout1_d16.off */
- P8_45_gpio_input_pin: pinmux_P8_45_gpio_input_pin { pinctrl-single,pins = < P8_45_GPIO_INPUT >; }; /* vout1_d0.gpio8_0, vout1_d16.off */
+ P8_45_default_pin: pinmux_P8_45_default_pin { pinctrl-single,pins = <
+ P8_45A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_45B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d0.gpio8_0, vout1_d16.off */
+ P8_45_gpio_pin: pinmux_P8_45_gpio_pin { pinctrl-single,pins = <
+ P8_45A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P8_45B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d0.gpio8_0, vout1_d16.off */
+ P8_45_gpio_pu_pin: pinmux_P8_45_gpio_pu_pin { pinctrl-single,pins = <
+ P8_45A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P8_45B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d0.gpio8_0, vout1_d16.off */
+ P8_45_gpio_pd_pin: pinmux_P8_45_gpio_pd_pin { pinctrl-single,pins = <
+ P8_45A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_45B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d0.gpio8_0, vout1_d16.off */
+ P8_45_gpio_input_pin: pinmux_P8_45_gpio_input_pin { pinctrl-single,pins = <
+ P8_45A( PIN_INPUT | MUX_MODE14)
+ P8_45B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d0.gpio8_0, vout1_d16.off */
/* P8_45b (ball B7) gpio8_16 */
- P8_45_pruout_pin: pinmux_P8_45_pruout_pin { pinctrl-single,pins = < P8_45_PRUOUT >; }; /* vout1_d16.pr2_pru0_gpo13, vout1_d0.off */
- P8_45_pruin_pin: pinmux_P8_45_pruin_pin { pinctrl-single,pins = < P8_45_PRUIN >; }; /* vout1_d16.pr2_pru0_gpi13, vout1_d0.off */
+ P8_45_pruout_pin: pinmux_P8_45_pruout_pin { pinctrl-single,pins = <
+ P8_45B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P8_45A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d16.pr2_pru0_gpo13, vout1_d0.off */
+ P8_45_pruin_pin: pinmux_P8_45_pruin_pin { pinctrl-single,pins = <
+ P8_45B( PIN_INPUT | MUX_MODE12)
+ P8_45A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d16.pr2_pru0_gpi13, vout1_d0.off */
/* P8_46a (ball G10) gpio8_1 */
- P8_46_default_pin: pinmux_P8_46_default_pin { pinctrl-single,pins = < P8_46_DEFAULT >; }; /* vout1_d1.gpio8_1, vout1_d23.off */
- P8_46_gpio_pin: pinmux_P8_46_gpio_pin { pinctrl-single,pins = < P8_46_GPIO >; }; /* vout1_d1.gpio8_1, vout1_d23.off */
- P8_46_gpio_pu_pin: pinmux_P8_46_gpio_pu_pin { pinctrl-single,pins = < P8_46_GPIO_PU >; }; /* vout1_d1.gpio8_1, vout1_d23.off */
- P8_46_gpio_pd_pin: pinmux_P8_46_gpio_pd_pin { pinctrl-single,pins = < P8_46_GPIO_PD >; }; /* vout1_d1.gpio8_1, vout1_d23.off */
- P8_46_gpio_input_pin: pinmux_P8_46_gpio_input_pin { pinctrl-single,pins = < P8_46_GPIO_INPUT >; }; /* vout1_d1.gpio8_1, vout1_d23.off */
+ P8_46_default_pin: pinmux_P8_46_default_pin { pinctrl-single,pins = <
+ P8_46A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_46B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d1.gpio8_1, vout1_d23.off */
+ P8_46_gpio_pin: pinmux_P8_46_gpio_pin { pinctrl-single,pins = <
+ P8_46A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P8_46B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d1.gpio8_1, vout1_d23.off */
+ P8_46_gpio_pu_pin: pinmux_P8_46_gpio_pu_pin { pinctrl-single,pins = <
+ P8_46A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P8_46B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d1.gpio8_1, vout1_d23.off */
+ P8_46_gpio_pd_pin: pinmux_P8_46_gpio_pd_pin { pinctrl-single,pins = <
+ P8_46A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P8_46B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d1.gpio8_1, vout1_d23.off */
+ P8_46_gpio_input_pin: pinmux_P8_46_gpio_input_pin { pinctrl-single,pins = <
+ P8_46A( PIN_INPUT | MUX_MODE14)
+ P8_46B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d1.gpio8_1, vout1_d23.off */
/* P8_46b (ball A10) gpio8_23 */
- P8_46_pruout_pin: pinmux_P8_46_pruout_pin { pinctrl-single,pins = < P8_46_PRUOUT >; }; /* vout1_d23.pr2_pru0_gpo20, vout1_d1.off */
- P8_46_pruin_pin: pinmux_P8_46_pruin_pin { pinctrl-single,pins = < P8_46_PRUIN >; }; /* vout1_d23.pr2_pru0_gpi20, vout1_d1.off */
+ P8_46_pruout_pin: pinmux_P8_46_pruout_pin { pinctrl-single,pins = <
+ P8_46B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P8_46A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d23.pr2_pru0_gpo20, vout1_d1.off */
+ P8_46_pruin_pin: pinmux_P8_46_pruin_pin { pinctrl-single,pins = <
+ P8_46B( PIN_INPUT | MUX_MODE12)
+ P8_46A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d23.pr2_pru0_gpi20, vout1_d1.off */
/************************/
/* P9 Header */
@@ -434,221 +802,463 @@
/* P9_10 RSTn */
/* P9_11a (ball B19) */
- P9_11_uart_pin: pinmux_P9_11_uart_pin { pinctrl-single,pins = < P9_11_UART >; }; /* mcasp3_axr0.uart5_rxd, vout1_d17.off */
+ P9_11_uart_pin: pinmux_P9_11_uart_pin { pinctrl-single,pins = <
+ P9_11A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4)
+ P9_11B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp3_axr0.uart5_rxd, vout1_d17.off */
/* P9_11b (ball B8) gpio8_17 */
- P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = < P9_11_DEFAULT >; }; /* vout1_d17.gpio8_17, mcasp3_axr0.off */
- P9_11_gpio_pin: pinmux_P9_11_gpio_pin { pinctrl-single,pins = < P9_11_GPIO >; }; /* vout1_d17.gpio8_17, mcasp3_axr0.off */
- P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin { pinctrl-single,pins = < P9_11_GPIO_PU >; }; /* vout1_d17.gpio8_17, mcasp3_axr0.off */
- P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin { pinctrl-single,pins = < P9_11_GPIO_PD >; }; /* vout1_d17.gpio8_17, mcasp3_axr0.off */
- P9_11_gpio_input_pin: pinmux_P9_11_gpio_input_pin { pinctrl-single,pins = < P9_11_GPIO_INPUT >; }; /* vout1_d17.gpio8_17, mcasp3_axr0.off */
+ P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = <
+ P9_11B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_11A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d17.gpio8_17, mcasp3_axr0.off */
+ P9_11_gpio_pin: pinmux_P9_11_gpio_pin { pinctrl-single,pins = <
+ P9_11B( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P9_11A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d17.gpio8_17, mcasp3_axr0.off */
+ P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin { pinctrl-single,pins = <
+ P9_11B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_11A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d17.gpio8_17, mcasp3_axr0.off */
+ P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin { pinctrl-single,pins = <
+ P9_11B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_11A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d17.gpio8_17, mcasp3_axr0.off */
+ P9_11_gpio_input_pin: pinmux_P9_11_gpio_input_pin { pinctrl-single,pins = <
+ P9_11B( PIN_INPUT | MUX_MODE14)
+ P9_11A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d17.gpio8_17, mcasp3_axr0.off */
/* P9_12 (ball B14) gpio5_0 */
- P9_12_default_pin: pinmux_P9_12_default_pin { pinctrl-single,pins = < P9_12_DEFAULT >; }; /* mcasp1_aclkr.gpio5_0 */
- P9_12_gpio_pin: pinmux_P9_12_gpio_pin { pinctrl-single,pins = < P9_12_GPIO >; }; /* mcasp1_aclkr.gpio5_0 */
- P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin { pinctrl-single,pins = < P9_12_GPIO_PU >; }; /* mcasp1_aclkr.gpio5_0 */
- P9_12_gpio_pd_pin: pinmux_P9_12_gpio_pd_pin { pinctrl-single,pins = < P9_12_GPIO_PD >; }; /* mcasp1_aclkr.gpio5_0 */
- P9_12_gpio_input_pin: pinmux_P9_12_gpio_input_pin { pinctrl-single,pins = < P9_12_GPIO_INPUT >; }; /* mcasp1_aclkr.gpio5_0 */
+ P9_12_default_pin: pinmux_P9_12_default_pin { pinctrl-single,pins = <
+ P9_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
+ P9_12_gpio_pin: pinmux_P9_12_gpio_pin { pinctrl-single,pins = <
+ P9_12( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
+ P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin { pinctrl-single,pins = <
+ P9_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
+ P9_12_gpio_pd_pin: pinmux_P9_12_gpio_pd_pin { pinctrl-single,pins = <
+ P9_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
+ P9_12_gpio_input_pin: pinmux_P9_12_gpio_input_pin { pinctrl-single,pins = <
+ P9_12( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_aclkr.gpio5_0 */
/* P9_13a (ball C17) */
- P9_13_uart_pin: pinmux_P9_13_uart_pin { pinctrl-single,pins = < P9_13_UART >; }; /* mcasp3_axr1.uart5_txd, usb1_drvvbus.off */
+ P9_13_uart_pin: pinmux_P9_13_uart_pin { pinctrl-single,pins = <
+ P9_13A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4)
+ P9_13B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp3_axr1.uart5_txd, usb1_drvvbus.off */
/* P9_13b (ball AB10) gpio6_12 */
- P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = < P9_13_DEFAULT >; }; /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
- P9_13_gpio_pin: pinmux_P9_13_gpio_pin { pinctrl-single,pins = < P9_13_GPIO >; }; /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
- P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin { pinctrl-single,pins = < P9_13_GPIO_PU >; }; /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
- P9_13_gpio_pd_pin: pinmux_P9_13_gpio_pd_pin { pinctrl-single,pins = < P9_13_GPIO_PD >; }; /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
- P9_13_gpio_input_pin: pinmux_P9_13_gpio_input_pin { pinctrl-single,pins = < P9_13_GPIO_INPUT >; }; /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
+ P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = <
+ P9_13B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_13A( PIN_OUTPUT | MUX_MODE15) >; }; /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
+ P9_13_gpio_pin: pinmux_P9_13_gpio_pin { pinctrl-single,pins = <
+ P9_13B( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P9_13A( PIN_OUTPUT | MUX_MODE15) >; }; /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
+ P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin { pinctrl-single,pins = <
+ P9_13B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_13A( PIN_OUTPUT | MUX_MODE15) >; }; /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
+ P9_13_gpio_pd_pin: pinmux_P9_13_gpio_pd_pin { pinctrl-single,pins = <
+ P9_13B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_13A( PIN_OUTPUT | MUX_MODE15) >; }; /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
+ P9_13_gpio_input_pin: pinmux_P9_13_gpio_input_pin { pinctrl-single,pins = <
+ P9_13B( PIN_INPUT | MUX_MODE14)
+ P9_13A( PIN_OUTPUT | MUX_MODE15) >; }; /* usb1_drvvbus.gpio6_12, mcasp3_axr1.off */
/* P9_14 (ball D6) gpio4_25 */
- P9_14_default_pin: pinmux_P9_14_default_pin { pinctrl-single,pins = < P9_14_DEFAULT >; }; /* vin2a_d17.gpio4_25 */
- P9_14_gpio_pin: pinmux_P9_14_gpio_pin { pinctrl-single,pins = < P9_14_GPIO >; }; /* vin2a_d17.gpio4_25 */
- P9_14_gpio_pu_pin: pinmux_P9_14_gpio_pu_pin { pinctrl-single,pins = < P9_14_GPIO_PU >; }; /* vin2a_d17.gpio4_25 */
- P9_14_gpio_pd_pin: pinmux_P9_14_gpio_pd_pin { pinctrl-single,pins = < P9_14_GPIO_PD >; }; /* vin2a_d17.gpio4_25 */
- P9_14_gpio_input_pin: pinmux_P9_14_gpio_input_pin { pinctrl-single,pins = < P9_14_GPIO_INPUT >; }; /* vin2a_d17.gpio4_25 */
- P9_14_pwm_pin: pinmux_P9_14_pwm_pin { pinctrl-single,pins = < P9_14_PWM >; }; /* vin2a_d17.ehrpwm3A */
+ P9_14_default_pin: pinmux_P9_14_default_pin { pinctrl-single,pins = <
+ P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
+ P9_14_gpio_pin: pinmux_P9_14_gpio_pin { pinctrl-single,pins = <
+ P9_14( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
+ P9_14_gpio_pu_pin: pinmux_P9_14_gpio_pu_pin { pinctrl-single,pins = <
+ P9_14( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
+ P9_14_gpio_pd_pin: pinmux_P9_14_gpio_pd_pin { pinctrl-single,pins = <
+ P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
+ P9_14_gpio_input_pin: pinmux_P9_14_gpio_input_pin { pinctrl-single,pins = <
+ P9_14( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
+ P9_14_pwm_pin: pinmux_P9_14_pwm_pin { pinctrl-single,pins = <
+ P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d17.ehrpwm3A */
/* P9_15 (ball AG4) gpio3_12 */
- P9_15_default_pin: pinmux_P9_15_default_pin { pinctrl-single,pins = < P9_15_DEFAULT >; }; /* vin1a_d8.gpio3_12 */
- P9_15_gpio_pin: pinmux_P9_15_gpio_pin { pinctrl-single,pins = < P9_15_GPIO >; }; /* vin1a_d8.gpio3_12 */
- P9_15_gpio_pu_pin: pinmux_P9_15_gpio_pu_pin { pinctrl-single,pins = < P9_15_GPIO_PU >; }; /* vin1a_d8.gpio3_12 */
- P9_15_gpio_pd_pin: pinmux_P9_15_gpio_pd_pin { pinctrl-single,pins = < P9_15_GPIO_PD >; }; /* vin1a_d8.gpio3_12 */
- P9_15_gpio_input_pin: pinmux_P9_15_gpio_input_pin { pinctrl-single,pins = < P9_15_GPIO_INPUT >; }; /* vin1a_d8.gpio3_12 */
+ P9_15_default_pin: pinmux_P9_15_default_pin { pinctrl-single,pins = <
+ P9_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
+ P9_15_gpio_pin: pinmux_P9_15_gpio_pin { pinctrl-single,pins = <
+ P9_15( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
+ P9_15_gpio_pu_pin: pinmux_P9_15_gpio_pu_pin { pinctrl-single,pins = <
+ P9_15( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
+ P9_15_gpio_pd_pin: pinmux_P9_15_gpio_pd_pin { pinctrl-single,pins = <
+ P9_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
+ P9_15_gpio_input_pin: pinmux_P9_15_gpio_input_pin { pinctrl-single,pins = <
+ P9_15( PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
/* P9_16 (ball C5) gpio4_26 */
- P9_16_default_pin: pinmux_P9_16_default_pin { pinctrl-single,pins = < P9_16_DEFAULT >; }; /* vin2a_d18.gpio4_26 */
- P9_16_gpio_pin: pinmux_P9_16_gpio_pin { pinctrl-single,pins = < P9_16_GPIO >; }; /* vin2a_d18.gpio4_26 */
- P9_16_gpio_pu_pin: pinmux_P9_16_gpio_pu_pin { pinctrl-single,pins = < P9_16_GPIO_PU >; }; /* vin2a_d18.gpio4_26 */
- P9_16_gpio_pd_pin: pinmux_P9_16_gpio_pd_pin { pinctrl-single,pins = < P9_16_GPIO_PD >; }; /* vin2a_d18.gpio4_26 */
- P9_16_gpio_input_pin: pinmux_P9_16_gpio_input_pin { pinctrl-single,pins = < P9_16_GPIO_INPUT >; }; /* vin2a_d18.gpio4_26 */
- P9_16_pwm_pin: pinmux_P9_16_pwm_pin { pinctrl-single,pins = < P9_16_PWM >; }; /* vin2a_d18.ehrpwm3B */
+ P9_16_default_pin: pinmux_P9_16_default_pin { pinctrl-single,pins = <
+ P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d18.gpio4_26 */
+ P9_16_gpio_pin: pinmux_P9_16_gpio_pin { pinctrl-single,pins = <
+ P9_16( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
+ P9_16_gpio_pu_pin: pinmux_P9_16_gpio_pu_pin { pinctrl-single,pins = <
+ P9_16( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
+ P9_16_gpio_pd_pin: pinmux_P9_16_gpio_pd_pin { pinctrl-single,pins = <
+ P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
+ P9_16_gpio_input_pin: pinmux_P9_16_gpio_input_pin { pinctrl-single,pins = <
+ P9_16( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
+ P9_16_pwm_pin: pinmux_P9_16_pwm_pin { pinctrl-single,pins = <
+ P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d18.ehrpwm3B */
/* P9_17a (ball B24) gpio7_17 */
- P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = < P9_17_DEFAULT >; }; /* spi2_cs0.gpio7_17 */
- P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = < P9_17_GPIO >; }; /* spi2_cs0.gpio7_17 */
- P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = < P9_17_GPIO_PU >; }; /* spi2_cs0.gpio7_17 */
- P9_17_gpio_pd_pin: pinmux_P9_17_gpio_pd_pin { pinctrl-single,pins = < P9_17_GPIO_PD >; }; /* spi2_cs0.gpio7_17 */
- P9_17_gpio_input_pin: pinmux_P9_17_gpio_input_pin { pinctrl-single,pins = < P9_17_GPIO_INPUT >; }; /* spi2_cs0.gpio7_17 */
- P9_17_spi_cs_pin: pinmux_P9_17_spi_cs_pin { pinctrl-single,pins = < P9_17_SPI >; }; /* spi2_cs0.spi2_cs0 */
+ P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = <
+ P9_17A( PIN_OUTPUT_PULLUP |
+ INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = <
+ P9_17A( PIN_OUTPUT |
+ INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = <
+ P9_17A( PIN_OUTPUT_PULLUP |
+ INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17_gpio_pd_pin: pinmux_P9_17_gpio_pd_pin { pinctrl-single,pins = <
+ P9_17A( PIN_OUTPUT_PULLDOWN |
+ INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17_gpio_input_pin: pinmux_P9_17_gpio_input_pin { pinctrl-single,pins = <
+ P9_17A(
+ PIN_INPUT | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17_spi_cs_pin: pinmux_P9_17_spi_cs_pin { pinctrl-single,pins = <
+ P9_17A( PIN_OUTPUT_PULLUP |
+ INPUT_EN | MUX_MODE0) P9_17B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_cs0.spi2_cs0 */
/* P9_17b (ball F12) gpio5_3 */
- P9_17_i2c_pin: pinmux_P9_17_i2c_pin { pinctrl-single,pins = < P9_17_I2C >; }; /* mcasp1_axr1.i2c5_scl */
- P9_17_uart_pin: pinmux_P9_17_pru_uart_pin { pinctrl-single,pins = < P9_17_UART >; }; /* mcasp1_axr1.uart6_txd */
+ P9_17_i2c_pin: pinmux_P9_17_i2c_pin { pinctrl-single,pins = <
+ P9_17B( PIN_OUTPUT_PULLUP |
+ INPUT_EN | MUX_MODE10) P9_17A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr1.i2c5_scl */
+ P9_17_uart_pin: pinmux_P9_17_pru_uart_pin { pinctrl-single,pins = <
+ P9_17B( PIN_OUTPUT_PULLUP |
+ INPUT_EN | MUX_MODE3) P9_17A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr1.uart6_txd */
/* P9_18a (ball G17) gpio7_16 */
- P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = < P9_18_DEFAULT >; }; /* spi2_d0.gpio7_16, mcasp1_axr0.off */
- P9_18_gpio_pin: pinmux_P9_18_gpio_pin { pinctrl-single,pins = < P9_18_GPIO >; }; /* spi2_d0.gpio7_16, mcasp1_axr0.off */
- P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin { pinctrl-single,pins = < P9_18_GPIO_PU >; }; /* spi2_d0.gpio7_16, mcasp1_axr0.off */
- P9_18_gpio_pd_pin: pinmux_P9_18_gpio_pd_pin { pinctrl-single,pins = < P9_18_GPIO_PD >; }; /* spi2_d0.gpio7_16, mcasp1_axr0.off */
- P9_18_gpio_input_pin: pinmux_P9_18_gpio_input_pin { pinctrl-single,pins = < P9_18_GPIO_INPUT >; }; /* spi2_d0.gpio7_16, mcasp1_axr0.off */
- P9_18_spi_pin: pinmux_P9_18_spi_pin { pinctrl-single,pins = < P9_18_SPI >; }; /* spi2_d0.spi2_d0, mcasp1_axr0.off */
+ P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = <
+ P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_18B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+ P9_18_gpio_pin: pinmux_P9_18_gpio_pin { pinctrl-single,pins = <
+ P9_18A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P9_18B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+ P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin { pinctrl-single,pins = <
+ P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_18B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+ P9_18_gpio_pd_pin: pinmux_P9_18_gpio_pd_pin { pinctrl-single,pins = <
+ P9_18A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_18B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+ P9_18_gpio_input_pin: pinmux_P9_18_gpio_input_pin { pinctrl-single,pins = <
+ P9_18A( PIN_INPUT | MUX_MODE14)
+ P9_18B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_d0.gpio7_16, mcasp1_axr0.off */
+ P9_18_spi_pin: pinmux_P9_18_spi_pin { pinctrl-single,pins = <
+ P9_18A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0)
+ P9_18B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_d0.spi2_d0, mcasp1_axr0.off */
/* P9_18b (ball G12) gpio5_2 */
- P9_18_i2c_pin: pinmux_P9_18_i2c_pin { pinctrl-single,pins = < P9_18_I2C >; }; /* mcasp1_axr0.i2c5_sda, spi2_d0.off */
- P9_18_uart_pin: pinmux_P9_18_pru_uart_pin { pinctrl-single,pins = < P9_18_UART >; }; /* mcasp1_axr0.uart6_rxd, spi2_d0.off */
+ P9_18_i2c_pin: pinmux_P9_18_i2c_pin { pinctrl-single,pins = <
+ P9_18B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10)
+ P9_18A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr0.i2c5_sda, spi2_d0.off */
+ P9_18_uart_pin: pinmux_P9_18_pru_uart_pin { pinctrl-single,pins = <
+ P9_18B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3)
+ P9_18A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr0.uart6_rxd, spi2_d0.off */
/* P9_19a (ball R6) gpio7_3 */
- P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = < P9_19_DEFAULT >; }; /* gpmc_a0.gpio7_3, gpmc_a0.off */
- P9_19_gpio_pin: pinmux_P9_19_gpio_pin { pinctrl-single,pins = < P9_19_GPIO >; }; /* gpmc_a0.gpio7_3, gpmc_a0.off */
- P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin { pinctrl-single,pins = < P9_19_GPIO_PU >; }; /* gpmc_a0.gpio7_3, gpmc_a0.off */
- P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin { pinctrl-single,pins = < P9_19_GPIO_PD >; }; /* gpmc_a0.gpio7_3, gpmc_a0.off */
- P9_19_gpio_input_pin: pinmux_P9_19_gpio_input_pin { pinctrl-single,pins = < P9_19_GPIO_INPUT >; }; /* gpmc_a0.gpio7_3, gpmc_a0.off */
- P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = < P9_19_I2C >; }; /* gpmc_a0.i2c4_scl, gpmc_a0.off */
+ P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = <
+ P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7)
+ P9_19B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpmc_a0.i2c4_scl, gpmc_a0.off */
+ P9_19_gpio_pin: pinmux_P9_19_gpio_pin { pinctrl-single,pins = <
+ P9_19A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P9_19B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpmc_a0.gpio7_3, gpmc_a0.off */
+ P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin { pinctrl-single,pins = <
+ P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_19B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpmc_a0.gpio7_3, gpmc_a0.off */
+ P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin { pinctrl-single,pins = <
+ P9_19A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_19B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpmc_a0.gpio7_3, gpmc_a0.off */
+ P9_19_gpio_input_pin: pinmux_P9_19_gpio_input_pin { pinctrl-single,pins = <
+ P9_19A( PIN_INPUT | MUX_MODE14)
+ P9_19B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpmc_a0.gpio7_3, gpmc_a0.off */
+ P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = <
+ P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7)
+ P9_19B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpmc_a0.i2c4_scl, gpmc_a0.off */
/* P9_19b (ball F4) gpio4_6 */
- P9_19_qep_pin: pinmux_P9_19_qep_pin { pinctrl-single,pins = < P9_19_QEP >; }; /* vin2a_d5.eQEP2A_in, gpmc_a0.off */
+ P9_19_qep_pin: pinmux_P9_19_qep_pin { pinctrl-single,pins = <
+ P9_19B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10)
+ P9_19A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d5.eQEP2A_in, gpmc_a0.off */
/* P9_20a (ball T9) gpio7_4 */
- P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = < P9_20_DEFAULT >; }; /* gpmc_a1.gpio7_4, vin2a_d4.off */
- P9_20_gpio_pin: pinmux_P9_20_gpio_pin { pinctrl-single,pins = < P9_20_GPIO >; }; /* gpmc_a1.gpio7_4, vin2a_d4.off */
- P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin { pinctrl-single,pins = < P9_20_GPIO_PU >; }; /* gpmc_a1.gpio7_4, vin2a_d4.off */
- P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin { pinctrl-single,pins = < P9_20_GPIO_PD >; }; /* gpmc_a1.gpio7_4, vin2a_d4.off */
- P9_20_gpio_input_pin: pinmux_P9_20_gpio_input_pin { pinctrl-single,pins = < P9_20_GPIO_INPUT >; }; /* gpmc_a1.gpio7_4, vin2a_d4.off */
- P9_20_i2c_pin: pinmux_P9_20_i2c_pin { pinctrl-single,pins = < P9_20_I2C >; }; /* gpmc_a1.i2c4_sda, vin2a_d4.off */
+ P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = <
+ P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7)
+ P9_20B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpmc_a1.i2c4_sda, vin2a_d4.off */
+ P9_20_gpio_pin: pinmux_P9_20_gpio_pin { pinctrl-single,pins = <
+ P9_20A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P9_20B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpmc_a1.gpio7_4, vin2a_d4.off */
+ P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin { pinctrl-single,pins = <
+ P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_20B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpmc_a1.gpio7_4, vin2a_d4.off */
+ P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin { pinctrl-single,pins = <
+ P9_20A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_20B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpmc_a1.gpio7_4, vin2a_d4.off */
+ P9_20_gpio_input_pin: pinmux_P9_20_gpio_input_pin { pinctrl-single,pins = <
+ P9_20A( PIN_INPUT | MUX_MODE14)
+ P9_20B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpmc_a1.gpio7_4, vin2a_d4.off */
+ P9_20_i2c_pin: pinmux_P9_20_i2c_pin { pinctrl-single,pins = <
+ P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7)
+ P9_20B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpmc_a1.i2c4_sda, vin2a_d4.off */
/* P9_20b (ball D2) gpio4_5*/
- P9_20_pruout_pin: pinmux_P9_20_pruout_pin { pinctrl-single,pins = < P9_20_PRUOUT >; }; /* vin2a_d4.pr1_pru1_gpo1, gpmc_a1.off */
- P9_20_pruin_pin: pinmux_P9_20_pruin_pin { pinctrl-single,pins = < P9_20_PRUIN >; }; /* vin2a_d4.pr1_pru1_gpi1, gpmc_a1.off */
+ P9_20_pruout_pin: pinmux_P9_20_pruout_pin { pinctrl-single,pins = <
+ P9_20B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P9_20A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d4.pr1_pru1_gpo1, gpmc_a1.off */
+ P9_20_pruin_pin: pinmux_P9_20_pruin_pin { pinctrl-single,pins = <
+ P9_20B( PIN_INPUT | MUX_MODE12)
+ P9_20A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d4.pr1_pru1_gpi1, gpmc_a1.off */
/* P9_21a (ball AF8) gpio3_3 */
- P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = < P9_21_DEFAULT >; }; /* vin1a_vsync0.gpio3_3,spi2_d1.off */
- P9_21_gpio_pin: pinmux_P9_21_gpio_pin { pinctrl-single,pins = < P9_21_GPIO >; }; /* vin1a_vsync0.gpio3_3,spi2_d1.off */
- P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin { pinctrl-single,pins = < P9_21_GPIO_PU >; }; /* vin1a_vsync0.gpio3_3,spi2_d1.off */
- P9_21_gpio_pd_pin: pinmux_P9_21_gpio_pd_pin { pinctrl-single,pins = < P9_21_GPIO_PD >; }; /* vin1a_vsync0.gpio3_3,spi2_d1.off */
- P9_21_gpio_input_pin: pinmux_P9_21_gpio_input_pin { pinctrl-single,pins = < P9_21_GPIO_INPUT >; }; /* vin1a_vsync0.gpio3_3,spi2_d1.off */
- P9_21_qep_pin: pinmux_P9_21_qep_pin { pinctrl-single,pins = < P9_21_QEP >; }; /* vin1a_vsync0.eQEP1_strobe,spi2_d1.off */
+ P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = <
+ P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_21B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+ P9_21_gpio_pin: pinmux_P9_21_gpio_pin { pinctrl-single,pins = <
+ P9_21A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P9_21B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+ P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin { pinctrl-single,pins = <
+ P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_21B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+ P9_21_gpio_pd_pin: pinmux_P9_21_gpio_pd_pin { pinctrl-single,pins = <
+ P9_21A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_21B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+ P9_21_gpio_input_pin: pinmux_P9_21_gpio_input_pin { pinctrl-single,pins = <
+ P9_21A( PIN_INPUT | MUX_MODE14)
+ P9_21B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+ P9_21_qep_pin: pinmux_P9_21_qep_pin { pinctrl-single,pins = <
+ P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10)
+ P9_21B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin1a_vsync0.eQEP1_strobe,spi2_d1.off */
/* P9_21b (ball B22) gpio7_15 */
- P9_21_spi_pin: pinmux_P9_21_spi_pin { pinctrl-single,pins = < P9_21_SPI >; }; /* spi2_d1.spi2_d1, vin1a_vsync0.off */
- P9_21_uart_pin: pinmux_P9_21_uart_pin { pinctrl-single,pins = < P9_21_UART >; }; /* spi2_d1.uart3_txd, vin1a_vsync0.off */
+ P9_21_spi_pin: pinmux_P9_21_spi_pin { pinctrl-single,pins = <
+ P9_21B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0)
+ P9_21A( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_d1.spi2_d1, vin1a_vsync0.off */
+ P9_21_uart_pin: pinmux_P9_21_uart_pin { pinctrl-single,pins = <
+ P9_21B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1)
+ P9_21A( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_d1.uart3_txd, vin1a_vsync0.off */
/* P9_22a (ball B26) gpio6_19 */
- P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = < P9_22_DEFAULT >; }; /* xref_clk2.gpio6_19, spi2_sclk.off */
- P9_22_gpio_pin: pinmux_P9_22_gpio_pin { pinctrl-single,pins = < P9_22_GPIO >; }; /* xref_clk2.gpio6_19, spi2_sclk.off */
- P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin { pinctrl-single,pins = < P9_22_GPIO_PU >; }; /* xref_clk2.gpio6_19, spi2_sclk.off */
- P9_22_gpio_pd_pin: pinmux_P9_22_gpio_pd_pin { pinctrl-single,pins = < P9_22_GPIO_PD >; }; /* xref_clk2.gpio6_19, spi2_sclk.off */
- P9_22_gpio_input_pin: pinmux_P9_22_gpio_input_pin { pinctrl-single,pins = < P9_22_GPIO_INPUT >; }; /* xref_clk2.gpio6_19, spi2_sclk.off */
+ P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
+ P9_22A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_22B( PIN_OUTPUT | MUX_MODE15) >; }; /* xref_clk2.gpio6_19, spi2_sclk.off */
+ P9_22_gpio_pin: pinmux_P9_22_gpio_pin { pinctrl-single,pins = <
+ P9_22A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P9_22B( PIN_OUTPUT | MUX_MODE15) >; }; /* xref_clk2.gpio6_19, spi2_sclk.off */
+ P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin { pinctrl-single,pins = <
+ P9_22A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_22B( PIN_OUTPUT | MUX_MODE15) >; }; /* xref_clk2.gpio6_19, spi2_sclk.off */
+ P9_22_gpio_pd_pin: pinmux_P9_22_gpio_pd_pin { pinctrl-single,pins = <
+ P9_22A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_22B( PIN_OUTPUT | MUX_MODE15) >; }; /* xref_clk2.gpio6_19, spi2_sclk.off */
+ P9_22_gpio_input_pin: pinmux_P9_22_gpio_input_pin { pinctrl-single,pins = <
+ P9_22A( PIN_INPUT | MUX_MODE14)
+ P9_22B( PIN_OUTPUT | MUX_MODE15) >; }; /* xref_clk2.gpio6_19, spi2_sclk.off */
/* P9_22b (ball A26) gpio7_14 */
- P9_22_spi_sclk_pin: pinmux_P9_22_spi_sclk_pin { pinctrl-single,pins = < P9_22_SPI >; }; /* spi2_sclk.spi2_sclk, xref_clk2.off */
- P9_22_uart_pin: pinmux_P9_22_uart_pin { pinctrl-single,pins = < P9_22_UART >; }; /* spi2_sclk.uart3_rxd, xref_clk2.off */
+ P9_22_spi_sclk_pin: pinmux_P9_22_spi_sclk_pin { pinctrl-single,pins = <
+ P9_22B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0)
+ P9_22A( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_sclk.spi2_sclk, xref_clk2.off */
+ P9_22_uart_pin: pinmux_P9_22_uart_pin { pinctrl-single,pins = <
+ P9_22B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1)
+ P9_22A( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_sclk.uart3_rxd, xref_clk2.off */
/* P9_23 (ball A22) gpio7_11 */
- P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = < P9_23_DEFAULT >; }; /* spi1_cs1.gpio7_11 */
- P9_23_gpio_pin: pinmux_P9_23_gpio_pin { pinctrl-single,pins = < P9_23_GPIO >; }; /* spi1_cs1.gpio7_11 */
- P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin { pinctrl-single,pins = < P9_23_GPIO_PU >; }; /* spi1_cs1.gpio7_11 */
- P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin { pinctrl-single,pins = < P9_23_GPIO_PD >; }; /* spi1_cs1.gpio7_11 */
- P9_23_gpio_input_pin: pinmux_P9_23_gpio_input_pin { pinctrl-single,pins = < P9_23_GPIO_INPUT >; }; /* spi1_cs1.gpio7_11 */
+ P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = <
+ P9_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
+ P9_23_gpio_pin: pinmux_P9_23_gpio_pin { pinctrl-single,pins = <
+ P9_23( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
+ P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin { pinctrl-single,pins = <
+ P9_23( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
+ P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin { pinctrl-single,pins = <
+ P9_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
+ P9_23_gpio_input_pin: pinmux_P9_23_gpio_input_pin { pinctrl-single,pins = <
+ P9_23( PIN_INPUT | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
/* P9_24 (ball F20) gpio6_15*/
- P9_24_default_pin: pinmux_P9_24_default_pin { pinctrl-single,pins = < P9_24_DEFAULT >; }; /* gpio6_15.gpio6_15 */
- P9_24_gpio_pin: pinmux_P9_24_gpio_pin { pinctrl-single,pins = < P9_24_GPIO >; }; /* gpio6_15.gpio6_15 */
- P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin { pinctrl-single,pins = < P9_24_GPIO_PU >; }; /* gpio6_15.gpio6_15 */
- P9_24_gpio_pd_pin: pinmux_P9_24_gpio_pd_pin { pinctrl-single,pins = < P9_24_GPIO_PD >; }; /* gpio6_15.gpio6_15 */
- P9_24_gpio_input_pin: pinmux_P9_24_gpio_input_pin { pinctrl-single,pins = < P9_24_GPIO_INPUT >; }; /* gpio6_15.gpio6_15 */
- P9_24_uart_pin: pinmux_P9_24_uart_pin { pinctrl-single,pins = < P9_24_UART >; }; /* gpio6_15.uart10_txd */
- P9_24_can_pin: pinmux_P9_24_can_pin { pinctrl-single,pins = < P9_24_CAN >; }; /* gpio6_15.dcan2_rx */
- P9_24_i2c_pin: pinmux_P9_24_i2c_pin { pinctrl-single,pins = < P9_24_I2C >; }; /* gpio6_15.i2c3_scl */
+ P9_24_default_pin: pinmux_P9_24_default_pin { pinctrl-single,pins = <
+ P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
+ P9_24_gpio_pin: pinmux_P9_24_gpio_pin { pinctrl-single,pins = <
+ P9_24( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
+ P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin { pinctrl-single,pins = <
+ P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
+ P9_24_gpio_pd_pin: pinmux_P9_24_gpio_pd_pin { pinctrl-single,pins = <
+ P9_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
+ P9_24_gpio_input_pin: pinmux_P9_24_gpio_input_pin { pinctrl-single,pins = <
+ P9_24( PIN_INPUT | MUX_MODE14) >; }; /* gpio6_15.gpio6_15 */
+ P9_24_uart_pin: pinmux_P9_24_uart_pin { pinctrl-single,pins = <
+ P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* gpio6_15.uart10_txd */
+ P9_24_can_pin: pinmux_P9_24_can_pin { pinctrl-single,pins = <
+ P9_24( PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* gpio6_15.dcan2_rx */
+ P9_24_i2c_pin: pinmux_P9_24_i2c_pin { pinctrl-single,pins = <
+ P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9) >; }; /* gpio6_15.i2c3_scl */
/* P9_25 (ball D18) gpio6_17 */
- P9_25_default_pin: pinmux_P9_25_default_pin { pinctrl-single,pins = < P9_25_DEFAULT >; }; /* xref_clk0.gpio6_17 */
- P9_25_gpio_pin: pinmux_P9_25_gpio_pin { pinctrl-single,pins = < P9_25_GPIO >; }; /* xref_clk0.gpio6_17 */
- P9_25_gpio_pu_pin: pinmux_P9_25_gpio_pu_pin { pinctrl-single,pins = < P9_25_GPIO_PU >; }; /* xref_clk0.gpio6_17 */
- P9_25_gpio_pd_pin: pinmux_P9_25_gpio_pd_pin { pinctrl-single,pins = < P9_25_GPIO_PD >; }; /* xref_clk0.gpio6_17 */
- P9_25_gpio_input_pin: pinmux_P9_25_gpio_input_pin { pinctrl-single,pins = < P9_25_GPIO_INPUT >; }; /* xref_clk0.gpio6_17 */
- P9_25_pruout_pin: pinmux_P9_25_pruout_pin { pinctrl-single,pins = < P9_25_PRUOUT >; }; /* xref_clk0.pr2_pru1_gpo5 */
- P9_25_pruin_pin: pinmux_P9_25_pruin_pin { pinctrl-single,pins = < P9_25_PRUIN >; }; /* xref_clk0.pr2_pru1_gpi5 */
+ P9_25_default_pin: pinmux_P9_25_default_pin { pinctrl-single,pins = <
+ P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
+ P9_25_gpio_pin: pinmux_P9_25_gpio_pin { pinctrl-single,pins = <
+ P9_25( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
+ P9_25_gpio_pu_pin: pinmux_P9_25_gpio_pu_pin { pinctrl-single,pins = <
+ P9_25( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
+ P9_25_gpio_pd_pin: pinmux_P9_25_gpio_pd_pin { pinctrl-single,pins = <
+ P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
+ P9_25_gpio_input_pin: pinmux_P9_25_gpio_input_pin { pinctrl-single,pins = <
+ P9_25( PIN_INPUT | MUX_MODE14) >; }; /* xref_clk0.gpio6_17 */
+ P9_25_pruout_pin: pinmux_P9_25_pruout_pin { pinctrl-single,pins = <
+ P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* xref_clk0.pr2_pru1_gpo5 */
+ P9_25_pruin_pin: pinmux_P9_25_pruin_pin { pinctrl-single,pins = <
+ P9_25( PIN_INPUT | MUX_MODE12) >; }; /* xref_clk0.pr2_pru1_gpi5 */
/* P9_26a (ball E21) gpio6_14 */
- P9_26_default_pin: pinmux_P9_26_default_pin { pinctrl-single,pins = < P9_26_DEFAULT >; }; /* gpio6_14.gpio6_14, vin1a_d20.off */
- P9_26_gpio_pin: pinmux_P9_26_gpio_pin { pinctrl-single,pins = < P9_26_GPIO >; }; /* gpio6_14.gpio6_14, vin1a_d20.off */
- P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin { pinctrl-single,pins = < P9_26_GPIO_PU >; }; /* gpio6_14.gpio6_14, vin1a_d20.off */
- P9_26_gpio_pd_pin: pinmux_P9_26_gpio_pd_pin { pinctrl-single,pins = < P9_26_GPIO_PD >; }; /* gpio6_14.gpio6_14, vin1a_d20.off */
- P9_26_gpio_input_pin: pinmux_P9_26_gpio_input_pin { pinctrl-single,pins = < P9_26_GPIO_INPUT >; }; /* gpio6_14.gpio6_14, vin1a_d20.off */
- P9_26_uart_pin: pinmux_P9_26_uart_pin { pinctrl-single,pins = < P9_26_UART >; }; /* gpio6_14.uart10_rxd, vin1a_d20.off */
- P9_26_can_pin: pinmux_P9_26_can_pin { pinctrl-single,pins = < P9_26_CAN >; }; /* gpio6_14.dcan2_tx, vin1a_d20.off */
- P9_26_i2c_pin: pinmux_P9_26_i2c_pin { pinctrl-single,pins = < P9_26_I2C >; }; /* gpio6_14.i2c3_sda, vin1a_d20.off */
+ P9_26_default_pin: pinmux_P9_26_default_pin { pinctrl-single,pins = <
+ P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_26B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpio6_14.gpio6_14, vin1a_d20.off */
+ P9_26_gpio_pin: pinmux_P9_26_gpio_pin { pinctrl-single,pins = <
+ P9_26A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P9_26B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpio6_14.gpio6_14, vin1a_d20.off */
+ P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin { pinctrl-single,pins = <
+ P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_26B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpio6_14.gpio6_14, vin1a_d20.off */
+ P9_26_gpio_pd_pin: pinmux_P9_26_gpio_pd_pin { pinctrl-single,pins = <
+ P9_26A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_26B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpio6_14.gpio6_14, vin1a_d20.off */
+ P9_26_gpio_input_pin: pinmux_P9_26_gpio_input_pin { pinctrl-single,pins = <
+ P9_26A( PIN_INPUT | MUX_MODE14)
+ P9_26B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpio6_14.gpio6_14, vin1a_d20.off */
+ P9_26_uart_pin: pinmux_P9_26_uart_pin { pinctrl-single,pins = <
+ P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3)
+ P9_26B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpio6_14.uart10_rxd, vin1a_d20.off */
+ P9_26_can_pin: pinmux_P9_26_can_pin { pinctrl-single,pins = <
+ P9_26A( PIN_OUTPUT_PULLUP | MUX_MODE2)
+ P9_26B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpio6_14.dcan2_tx, vin1a_d20.off */
+ P9_26_i2c_pin: pinmux_P9_26_i2c_pin { pinctrl-single,pins = <
+ P9_26A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE9)
+ P9_26B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpio6_14.i2c3_sda, vin1a_d20.off */
/* P9_26b (ball AE2) gpio3_24 */
- P9_26_pruout_pin: pinmux_P9_26_pruout_pin { pinctrl-single,pins = < P9_26_PRUOUT >; }; /* vin1a_d20.pr1_pru0_gpo17, gpio6_14.off */
- P9_26_pruin_pin: pinmux_P9_26_pruin_pin { pinctrl-single,pins = < P9_26_PRUIN >; }; /* vin1a_d20.pr1_pru0_gpi17, gpio6_14.off */
+ P9_26_pruout_pin: pinmux_P9_26_pruout_pin { pinctrl-single,pins = <
+ P9_26B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P9_26A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin1a_d20.pr1_pru0_gpo17, gpio6_14.off */
+ P9_26_pruin_pin: pinmux_P9_26_pruin_pin { pinctrl-single,pins = <
+ P9_26B( PIN_INPUT | MUX_MODE12)
+ P9_26A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin1a_d20.pr1_pru0_gpi17, gpio6_14.off */
/* P9_27a (ball C3) gpio4_15 */
- P9_27_default_pin: pinmux_P9_27_default_pin { pinctrl-single,pins = < P9_27_DEFAULT >; }; /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
- P9_27_gpio_pin: pinmux_P9_27_gpio_pin { pinctrl-single,pins = < P9_27_GPIO >; }; /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
- P9_27_gpio_pu_pin: pinmux_P9_27_gpio_pu_pin { pinctrl-single,pins = < P9_27_GPIO_PU >; }; /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
- P9_27_gpio_pd_pin: pinmux_P9_27_gpio_pd_pin { pinctrl-single,pins = < P9_27_GPIO_PD >; }; /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
- P9_27_gpio_input_pin: pinmux_P9_27_gpio_input_pin { pinctrl-single,pins = < P9_27_GPIO_INPUT >; }; /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
- P9_27_qep_pin: pinmux_P9_27_qep_pin { pinctrl-single,pins = < P9_27_QEP >; }; /* vin2a_d14.eQEP3B_in, mcasp1_fsr.off */
- P9_27_pruout_pin: pinmux_P9_27_pruout_pin { pinctrl-single,pins = < P9_27_PRUOUT >; }; /* vin2a_d14.pr1_pru1_gpo11, mcasp1_fsr.off */
- P9_27_pruin_pin: pinmux_P9_27_pruin_pin { pinctrl-single,pins = < P9_27_PRUIN >; }; /* vin2a_d14.pr1_pru1_gpi11, mcasp1_fsr.off */
+ P9_27_default_pin: pinmux_P9_27_default_pin { pinctrl-single,pins = <
+ P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_27B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+ P9_27_gpio_pin: pinmux_P9_27_gpio_pin { pinctrl-single,pins = <
+ P9_27A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P9_27B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+ P9_27_gpio_pu_pin: pinmux_P9_27_gpio_pu_pin { pinctrl-single,pins = <
+ P9_27A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_27B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+ P9_27_gpio_pd_pin: pinmux_P9_27_gpio_pd_pin { pinctrl-single,pins = <
+ P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_27B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+ P9_27_gpio_input_pin: pinmux_P9_27_gpio_input_pin { pinctrl-single,pins = <
+ P9_27A( PIN_INPUT | MUX_MODE14)
+ P9_27B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d14.gpio4_15, mcasp1_fsr.off */
+ P9_27_qep_pin: pinmux_P9_27_qep_pin { pinctrl-single,pins = <
+ P9_27A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10)
+ P9_27B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d14.eQEP3B_in, mcasp1_fsr.off */
+ P9_27_pruout_pin: pinmux_P9_27_pruout_pin { pinctrl-single,pins = <
+ P9_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P9_27B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d14.pr1_pru1_gpo11, mcasp1_fsr.off */
+ P9_27_pruin_pin: pinmux_P9_27_pruin_pin { pinctrl-single,pins = <
+ P9_27A( PIN_INPUT | MUX_MODE12)
+ P9_27B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d14.pr1_pru1_gpi11, mcasp1_fsr.off */
/* P9_27b (ball J14) gpio5_1 */
/* P9_28 (ball A12) gpio4_17 */
- P9_28_default_pin: pinmux_P9_28_default_pin { pinctrl-single,pins = < P9_28_DEFAULT >; }; /* mcasp1_axr11.gpio4_17 */
- P9_28_gpio_pin: pinmux_P9_28_gpio_pin { pinctrl-single,pins = < P9_28_GPIO >; }; /* mcasp1_axr11.gpio4_17 */
- P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin { pinctrl-single,pins = < P9_28_GPIO_PU >; }; /* mcasp1_axr11.gpio4_17 */
- P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin { pinctrl-single,pins = < P9_28_GPIO_PD >; }; /* mcasp1_axr11.gpio4_17 */
- P9_28_gpio_input_pin: pinmux_P9_28_gpio_input_pin { pinctrl-single,pins = < P9_28_GPIO_INPUT >; }; /* mcasp1_axr11.gpio4_17 */
- P9_28_spi_cs_pin: pinmux_P9_28_spi_cs_pin { pinctrl-single,pins = < P9_28_SPI >; }; /* mcasp1_axr11.spi3_cs0 */
- P9_28_pruout_pin: pinmux_P9_28_pruout_pin { pinctrl-single,pins = < P9_28_PRUOUT >; }; /* mcasp1_axr11.pr2_pru1_gpo13 */
- P9_28_pruin_pin: pinmux_P9_28_pruin_pin { pinctrl-single,pins = < P9_28_PRUIN >; }; /* mcasp1_axr11.pr2_pru1_gpi13 */
+ P9_28_default_pin: pinmux_P9_28_default_pin { pinctrl-single,pins = <
+ P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28_gpio_pin: pinmux_P9_28_gpio_pin { pinctrl-single,pins = <
+ P9_28( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin { pinctrl-single,pins = <
+ P9_28( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin { pinctrl-single,pins = <
+ P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28_gpio_input_pin: pinmux_P9_28_gpio_input_pin { pinctrl-single,pins = <
+ P9_28( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr11.gpio4_17 */
+ P9_28_spi_cs_pin: pinmux_P9_28_spi_cs_pin { pinctrl-single,pins = <
+ P9_28( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr11.spi3_cs0 */
+ P9_28_pruout_pin: pinmux_P9_28_pruout_pin { pinctrl-single,pins = <
+ P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr11.pr2_pru1_gpo13 */
+ P9_28_pruin_pin: pinmux_P9_28_pruin_pin { pinctrl-single,pins = <
+ P9_28( PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr11.pr2_pru1_gpi13 */
/* P9_29a (ball A11) gpio5_11*/
- P9_29_default_pin: pinmux_P9_29_default_pin { pinctrl-single,pins = < P9_29_DEFAULT >; }; /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
- P9_29_gpio_pin: pinmux_P9_29_gpio_pin { pinctrl-single,pins = < P9_29_GPIO >; }; /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
- P9_29_gpio_pu_pin: pinmux_P9_29_gpio_pu_pin { pinctrl-single,pins = < P9_29_GPIO_PU >; }; /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
- P9_29_gpio_pd_pin: pinmux_P9_29_gpio_pd_pin { pinctrl-single,pins = < P9_29_GPIO_PD >; }; /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
- P9_29_gpio_input_pin: pinmux_P9_29_gpio_input_pin { pinctrl-single,pins = < P9_29_GPIO_INPUT >; }; /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
- P9_29_spi_pin: pinmux_P9_29_spi_pin { pinctrl-single,pins = < P9_29_SPI >; }; /* mcasp1_axr9.spi3_d1, mcasp1_fsx.off */
- P9_29_pruout_pin: pinmux_P9_29_pruout_pin { pinctrl-single,pins = < P9_29_PRUOUT >; }; /* mcasp1_axr9.pr2_pru1_gpo11, mcasp1_fsx.off */
- P9_29_pruin_pin: pinmux_P9_29_pruin_pin { pinctrl-single,pins = < P9_29_PRUIN >; }; /* mcasp1_axr9.pr2_pru1_gpi11, mcasp1_fsx.off */
+ P9_29_default_pin: pinmux_P9_29_default_pin { pinctrl-single,pins = <
+ P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_29B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
+ P9_29_gpio_pin: pinmux_P9_29_gpio_pin { pinctrl-single,pins = <
+ P9_29A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P9_29B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
+ P9_29_gpio_pu_pin: pinmux_P9_29_gpio_pu_pin { pinctrl-single,pins = <
+ P9_29A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_29B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
+ P9_29_gpio_pd_pin: pinmux_P9_29_gpio_pd_pin { pinctrl-single,pins = <
+ P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_29B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
+ P9_29_gpio_input_pin: pinmux_P9_29_gpio_input_pin { pinctrl-single,pins = <
+ P9_29A( PIN_INPUT | MUX_MODE14)
+ P9_29B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr9.gpio5_11, mcasp1_fsx.off */
+ P9_29_spi_pin: pinmux_P9_29_spi_pin { pinctrl-single,pins = <
+ P9_29A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3)
+ P9_29B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr9.spi3_d1, mcasp1_fsx.off */
+ P9_29_pruout_pin: pinmux_P9_29_pruout_pin { pinctrl-single,pins = <
+ P9_29A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P9_29B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr9.pr2_pru1_gpo11, mcasp1_fsx.off */
+ P9_29_pruin_pin: pinmux_P9_29_pruin_pin { pinctrl-single,pins = <
+ P9_29A( PIN_INPUT | MUX_MODE12)
+ P9_29B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr9.pr2_pru1_gpi11, mcasp1_fsx.off */
/* P9_29b (ball D14) gpio7_30 */
/* P9_30 (ball B13) gpio5_12*/
- P9_30_default_pin: pinmux_P9_30_default_pin { pinctrl-single,pins = < P9_30_DEFAULT >; }; /* mcasp1_axr10.gpio5_12 */
- P9_30_gpio_pin: pinmux_P9_30_gpio_pin { pinctrl-single,pins = < P9_30_GPIO >; }; /* mcasp1_axr10.gpio5_12 */
- P9_30_gpio_pu_pin: pinmux_P9_30_gpio_pu_pin { pinctrl-single,pins = < P9_30_GPIO_PU >; }; /* mcasp1_axr10.gpio5_12 */
- P9_30_gpio_pd_pin: pinmux_P9_30_gpio_pd_pin { pinctrl-single,pins = < P9_30_GPIO_PD >; }; /* mcasp1_axr10.gpio5_12 */
- P9_30_gpio_input_pin: pinmux_P9_30_gpio_input_pin { pinctrl-single,pins = < P9_30_GPIO_INPUT >; }; /* mcasp1_axr10.gpio5_12 */
- P9_30_spi_pin: pinmux_P9_30_spi_pin { pinctrl-single,pins = < P9_30_SPI >; }; /* mcasp1_axr10.spi3_d0 */
- P9_30_pruout_pin: pinmux_P9_30_pruout_pin { pinctrl-single,pins = < P9_30_PRUOUT >; }; /* mcasp1_axr10.pr2_pru1_gpo12 */
- P9_30_pruin_pin: pinmux_P9_30_pruin_pin { pinctrl-single,pins = < P9_30_PRUIN >; }; /* mcasp1_axr10.pr2_pru1_gpi12 */
+ P9_30_default_pin: pinmux_P9_30_default_pin { pinctrl-single,pins = <
+ P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30_gpio_pin: pinmux_P9_30_gpio_pin { pinctrl-single,pins = <
+ P9_30( PIN_OUTPUT | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30_gpio_pu_pin: pinmux_P9_30_gpio_pu_pin { pinctrl-single,pins = <
+ P9_30( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30_gpio_pd_pin: pinmux_P9_30_gpio_pd_pin { pinctrl-single,pins = <
+ P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30_gpio_input_pin: pinmux_P9_30_gpio_input_pin { pinctrl-single,pins = <
+ P9_30( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr10.gpio5_12 */
+ P9_30_spi_pin: pinmux_P9_30_spi_pin { pinctrl-single,pins = <
+ P9_30( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp1_axr10.spi3_d0 */
+ P9_30_pruout_pin: pinmux_P9_30_pruout_pin { pinctrl-single,pins = <
+ P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr10.pr2_pru1_gpo12 */
+ P9_30_pruin_pin: pinmux_P9_30_pruin_pin { pinctrl-single,pins = <
+ P9_30( PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr10.pr2_pru1_gpi12 */
/* P9_31a (ball B12) gpio5_10 */
- P9_31_default_pin: pinmux_P9_31_default_pin { pinctrl-single,pins = < P9_31_DEFAULT >; }; /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
- P9_31_gpio_pin: pinmux_P9_31_gpio_pin { pinctrl-single,pins = < P9_31_GPIO >; }; /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
- P9_31_gpio_pu_pin: pinmux_P9_31_gpio_pu_pin { pinctrl-single,pins = < P9_31_GPIO_PU >; }; /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
- P9_31_gpio_pd_pin: pinmux_P9_31_gpio_pd_pin { pinctrl-single,pins = < P9_31_GPIO_PD >; }; /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
- P9_31_gpio_input_pin: pinmux_P9_31_gpio_input_pin { pinctrl-single,pins = < P9_31_GPIO_INPUT >; }; /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
- P9_31_spi_sclk_pin: pinmux_P9_31_spi_sclk_pin { pinctrl-single,pins = < P9_31_SPI >; }; /* mcasp1_axr8.spi3_sclk, mcasp1_aclkx.off */
- P9_31_pruout_pin: pinmux_P9_31_pruout_pin { pinctrl-single,pins = < P9_31_PRUOUT >; }; /* mcasp1_axr8.pr2_pru1_gpo10, mcasp1_aclkx.off */
- P9_31_pruin_pin: pinmux_P9_31_pruin_pin { pinctrl-single,pins = < P9_31_PRUIN >; }; /* mcasp1_axr8.pr2_pru1_gpi10, mcasp1_aclkx.off */
+ P9_31_default_pin: pinmux_P9_31_default_pin { pinctrl-single,pins = <
+ P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_31B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
+ P9_31_gpio_pin: pinmux_P9_31_gpio_pin { pinctrl-single,pins = <
+ P9_31A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P9_31B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
+ P9_31_gpio_pu_pin: pinmux_P9_31_gpio_pu_pin { pinctrl-single,pins = <
+ P9_31A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_31B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
+ P9_31_gpio_pd_pin: pinmux_P9_31_gpio_pd_pin { pinctrl-single,pins = <
+ P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_31B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
+ P9_31_gpio_input_pin: pinmux_P9_31_gpio_input_pin { pinctrl-single,pins = <
+ P9_31A( PIN_INPUT | MUX_MODE14)
+ P9_31B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr8.gpio5_10, mcasp1_aclkx.off */
+ P9_31_spi_sclk_pin: pinmux_P9_31_spi_sclk_pin { pinctrl-single,pins = <
+ P9_31A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3)
+ P9_31B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr8.spi3_sclk, mcasp1_aclkx.off */
+ P9_31_pruout_pin: pinmux_P9_31_pruout_pin { pinctrl-single,pins = <
+ P9_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P9_31B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr8.pr2_pru1_gpo10, mcasp1_aclkx.off */
+ P9_31_pruin_pin: pinmux_P9_31_pruin_pin { pinctrl-single,pins = <
+ P9_31A( PIN_INPUT | MUX_MODE12)
+ P9_31B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr8.pr2_pru1_gpi10, mcasp1_aclkx.off */
/* P9_31b (ball C14) gpio7_31*/
@@ -671,27 +1281,57 @@
/* P9_40 AIN1*/
/* P9_41a (ball C23) gpio6_20 */
- P9_41_default_pin: pinmux_P9_41_default_pin { pinctrl-single,pins = < P9_41_DEFAULT >; }; /* xref_clk3.gpio6_20, vin2a_d6.off */
- P9_41_gpio_pin: pinmux_P9_41_gpio_pin { pinctrl-single,pins = < P9_41_GPIO >; }; /* xref_clk3.gpio6_20, vin2a_d6.off */
- P9_41_gpio_pu_pin: pinmux_P9_41_gpio_pu_pin { pinctrl-single,pins = < P9_41_GPIO_PU >; }; /* xref_clk3.gpio6_20, vin2a_d6.off */
- P9_41_gpio_pd_pin: pinmux_P9_41_gpio_pd_pin { pinctrl-single,pins = < P9_41_GPIO_PD >; }; /* xref_clk3.gpio6_20, vin2a_d6.off */
- P9_41_gpio_input_pin: pinmux_P9_41_gpio_input_pin { pinctrl-single,pins = < P9_41_GPIO_INPUT >; }; /* xref_clk3.gpio6_20, vin2a_d6.off */
+ P9_41_default_pin: pinmux_P9_41_default_pin { pinctrl-single,pins = <
+ P9_41A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_41B( PIN_OUTPUT | MUX_MODE15) >; }; /* xref_clk3.gpio6_20, vin2a_d6.off */
+ P9_41_gpio_pin: pinmux_P9_41_gpio_pin { pinctrl-single,pins = <
+ P9_41A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P9_41B( PIN_OUTPUT | MUX_MODE15) >; }; /* xref_clk3.gpio6_20, vin2a_d6.off */
+ P9_41_gpio_pu_pin: pinmux_P9_41_gpio_pu_pin { pinctrl-single,pins = <
+ P9_41A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_41B( PIN_OUTPUT | MUX_MODE15) >; }; /* xref_clk3.gpio6_20, vin2a_d6.off */
+ P9_41_gpio_pd_pin: pinmux_P9_41_gpio_pd_pin { pinctrl-single,pins = <
+ P9_41A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_41B( PIN_OUTPUT | MUX_MODE15) >; }; /* xref_clk3.gpio6_20, vin2a_d6.off */
+ P9_41_gpio_input_pin: pinmux_P9_41_gpio_input_pin { pinctrl-single,pins = <
+ P9_41A( PIN_INPUT | MUX_MODE14)
+ P9_41B( PIN_OUTPUT | MUX_MODE15) >; }; /* xref_clk3.gpio6_20, vin2a_d6.off */
/* P9_41b (ball C1) gpio4_7 */
- P9_41_pruout_pin: pinmux_P9_41_pruout_pin { pinctrl-single,pins = < P9_41_PRUOUT >; }; /* vin2a_d6.pr1_pru1_gpo3, xref_clk3.off */
- P9_41_pruin_pin: pinmux_P9_41_pruin_pin { pinctrl-single,pins = < P9_41_PRUIN >; }; /* vin2a_d6.pr1_pru1_gpi3, xref_clk3.off */
+ P9_41_pruout_pin: pinmux_P9_41_pruout_pin { pinctrl-single,pins = <
+ P9_41B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P9_41A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d6.pr1_pru1_gpo3, xref_clk3.off */
+ P9_41_pruin_pin: pinmux_P9_41_pruin_pin { pinctrl-single,pins = <
+ P9_41B( PIN_INPUT | MUX_MODE12)
+ P9_41A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d6.pr1_pru1_gpi3, xref_clk3.off */
/* P9_42a (ball E14) gpio4_18 */
- P9_42_default_pin: pinmux_P9_42_default_pin { pinctrl-single,pins = < P9_42_DEFAULT >; }; /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
- P9_42_gpio_pin: pinmux_P9_42_gpio_pin { pinctrl-single,pins = < P9_42_GPIO >; }; /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
- P9_42_gpio_pu_pin: pinmux_P9_42_gpio_pu_pin { pinctrl-single,pins = < P9_42_GPIO_PU >; }; /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
- P9_42_gpio_pd_pin: pinmux_P9_42_gpio_pd_pin { pinctrl-single,pins = < P9_42_GPIO_PD >; }; /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
- P9_42_gpio_input_pin: pinmux_P9_42_gpio_input_pin { pinctrl-single,pins = < P9_42_GPIO_INPUT >; }; /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
- P9_42_spi_cs_pin: pinmux_P9_42_spi_cs_pin { pinctrl-single,pins = < P9_42_SPI >; }; /* mcasp1_axr12.spi3_cs1, vin2a_d13.off */
+ P9_42_default_pin: pinmux_P9_42_default_pin { pinctrl-single,pins = <
+ P9_42A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_42B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+ P9_42_gpio_pin: pinmux_P9_42_gpio_pin { pinctrl-single,pins = <
+ P9_42A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P9_42B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+ P9_42_gpio_pu_pin: pinmux_P9_42_gpio_pu_pin { pinctrl-single,pins = <
+ P9_42A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_42B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+ P9_42_gpio_pd_pin: pinmux_P9_42_gpio_pd_pin { pinctrl-single,pins = <
+ P9_42A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_42B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+ P9_42_gpio_input_pin: pinmux_P9_42_gpio_input_pin { pinctrl-single,pins = <
+ P9_42A( PIN_INPUT | MUX_MODE14)
+ P9_42B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
+ P9_42_spi_cs_pin: pinmux_P9_42_spi_cs_pin { pinctrl-single,pins = <
+ P9_42A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3)
+ P9_42B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr12.spi3_cs1, vin2a_d13.off */
/* P9_42b (ball C2) gpio4_14*/
- P9_42_pruout_pin: pinmux_P9_42_pruout_pin { pinctrl-single,pins = < P9_42_PRUOUT >; }; /* vin2a_d13.pr1_pru1_gpo10, mcasp1_axr12.off */
- P9_42_pruin_pin: pinmux_P9_42_pruin_pin { pinctrl-single,pins = < P9_42_PRUIN >; }; /* vin2a_d13.pr1_pru1_gpi10, mcasp1_axr12.off */
+ P9_42_pruout_pin: pinmux_P9_42_pruout_pin { pinctrl-single,pins = <
+ P9_42B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P9_42A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d13.pr1_pru1_gpo10, mcasp1_axr12.off */
+ P9_42_pruin_pin: pinmux_P9_42_pruin_pin { pinctrl-single,pins = <
+ P9_42B( PIN_INPUT | MUX_MODE12)
+ P9_42A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d13.pr1_pru1_gpi10, mcasp1_axr12.off */
/* P9_43 GND */
--
GitLab
From 80879eae16b9d05cfefa8f08ce0bd4900140fe11 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Sun, 12 Jul 2020 20:03:50 +0530
Subject: [PATCH 31/86] cape_pins node no longer valid
This is deprecated with the addition of new code that uses "bone-pinmux-helper"
&cape_pins {
status = "disabled";
};
---
src/arm/am5729-beagleboneai-roboticscape.dts | 4 ----
1 file changed, 4 deletions(-)
diff --git a/src/arm/am5729-beagleboneai-roboticscape.dts b/src/arm/am5729-beagleboneai-roboticscape.dts
index 023e16c8..a14da872 100644
--- a/src/arm/am5729-beagleboneai-roboticscape.dts
+++ b/src/arm/am5729-beagleboneai-roboticscape.dts
@@ -70,10 +70,6 @@
};
};
-&cape_pins {
- status = "disabled";
-};
-
&dra7_pmx_core {
cape_pins_rc: cape_pins_rc {
pinctrl-single,pins = <
--
GitLab
From deba87e003850f0b2cd54cf729dced87c47b6164 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Sun, 12 Jul 2020 20:06:08 +0530
Subject: [PATCH 32/86] Fix P9_27 bug
The gpio of P9_27 was not correct and causing problem during initialization.
This is what the error looks like:
dmesg | grep gpio-of-helper
[ 1.055672] gpio-of-helper 44000000.ocp:cape-universal: Failed to request gpio 'P9_27'
[ 1.055688] gpio-of-helper 44000000.ocp:cape-universal: Failed to create gpio entry
[ 1.062842] gpio-of-helper: probe of 44000000.ocp:cape-universal failed with error -1
---
src/arm/am572x-bone-common-univ.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/arm/am572x-bone-common-univ.dtsi b/src/arm/am572x-bone-common-univ.dtsi
index 39b8d66f..a043c27b 100644
--- a/src/arm/am572x-bone-common-univ.dtsi
+++ b/src/arm/am572x-bone-common-univ.dtsi
@@ -2672,7 +2672,7 @@
P9_27 {
gpio-name = "P9_27";
- gpio = <&gpio6 15 0>;
+ gpio = <&gpio4 15 0>;
input;
dir-changeable;
};
--
GitLab
From 687f01f81a8f625b8006170fad87bd10768bdaf0 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Sun, 12 Jul 2020 20:17:37 +0530
Subject: [PATCH 33/86] BBAI: Remove bone-bus pinmxing in base dtb
This is causing unintended changes in the pinmuxing and generating conflicts even when not used. This might also restrict users in future thus it's better to do pinmuxing in the overlay itself.
This is what the conflict looks like on BBAI:
dmesg | grep pinctrl-single
[ 1.028246] pinctrl-single 4a003400.pinmux: 282 pins, size 1128
[ 1.369830] pinctrl-single 4a003400.pinmux: pin PIN160 already requested by 44000000.ocp:P9_13_pinmux; cannot claim for unused_pins
[ 1.381777] pinctrl-single 4a003400.pinmux: pin-160 (unused_pins) status -22
[ 1.388893] pinctrl-single 4a003400.pinmux: could not request pin 160 (PIN160) from group unused_pins_default on device pinctrl-single
[ 1.408828] pinctrl-single 4a003400.pinmux: pin PIN231 already requested by 44000000.ocp:P8_03_pinmux; cannot claim for cape_pins
[ 1.420564] pinctrl-single 4a003400.pinmux: pin-231 (cape_pins) status -22
[ 1.427494] pinctrl-single 4a003400.pinmux: could not request pin 231 (PIN231) from group cape_pins_default on device pinctrl-single
---
src/arm/bbai-bone-buses.dtsi | 113 -----------------------------------
1 file changed, 113 deletions(-)
diff --git a/src/arm/bbai-bone-buses.dtsi b/src/arm/bbai-bone-buses.dtsi
index 6e187a31..ff796c3c 100644
--- a/src/arm/bbai-bone-buses.dtsi
+++ b/src/arm/bbai-bone-buses.dtsi
@@ -353,123 +353,17 @@
};
};
-&dra7_pmx_core {
- // Uarts
- bone_uart_1_pins: pinmux_bone_uart_1_pins {
- pinctrl-single,pins = <
- P9_24( PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpio6_15.uart10_txd */
- P9_26A( PIN_INPUT_PULLUP | MUX_MODE3) /* gpio6_14.uart10_rxd */
- /* unused pins */
- P9_26B( PIN_OUTPUT | MUX_MODE15) /* vin1a_d20.off */
- >;
- };
-
- bone_uart_2_pins: pinmux_bone_uart_2_pins {
- pinctrl-single,pins = <
- P9_21B( PIN_OUTPUT_PULLUP | MUX_MODE1) /* spi2_d1.uart3_txd */
- P9_22B( PIN_INPUT_PULLUP | MUX_MODE1) /* spi2_sclk.uart3_rxd */
- /* unused pins */
- P9_21A( PIN_OUTPUT | MUX_MODE15) /* vin1a_vsync0.off */
- P9_22A( PIN_OUTPUT | MUX_MODE15) /* xref_clk2.off */
- >;
- };
-
- bone_uart_4_pins: pinmux_bone_uart_4_pins {
- pinctrl-single,pins = <
- P9_13A( PIN_OUTPUT_PULLUP | MUX_MODE4) /* mcasp3_axr1.uart5_txd */
- P9_11A( PIN_INPUT_PULLUP | MUX_MODE4) /* mcasp3_axr0.uart5_rxd */
- /* unused pins */
- P9_13B( PIN_OUTPUT | MUX_MODE15) /* usb1_drvvbus */
- P9_11B( PIN_OUTPUT | MUX_MODE15) /* vout1_d17.off */
- >;
- };
-
- bone_uart_5_pins: pinmux_bone_uart_5_pins {
- pinctrl-single,pins = <
- P8_37B( PIN_OUTPUT_PULLUP | MUX_MODE3) /* uart8_txd */
- P8_38B( PIN_INPUT_PULLUP | MUX_MODE3) /* uart8_rxd */
- /* unused pins */
- P8_37A( PIN_OUTPUT | MUX_MODE15) /* vout1_d8.off */
- P8_38A( PIN_OUTPUT | MUX_MODE15) /* vout1_d9.off */
- >;
- };
-
- // I2Cs
- bone_i2c_1_pins: pinmux_bone_i2c_1_pins {
- pinctrl-single,pins = <
- P9_18B( PIN_INPUT_PULLUP | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
- P9_17B( PIN_INPUT_PULLUP | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
- /* unused pins */
- P9_18A( PIN_OUTPUT | MUX_MODE15) /* spi2_d0.off */
- P9_17A( PIN_OUTPUT | MUX_MODE15) /* spi2_cs0.off */
- >;
- };
-
- bone_i2c_2_pins: pinmux_bone_i2c_2_pins {
- pinctrl-single,pins = <
- P9_20A( PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a1.i2c4_sda */
- P9_19A( PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a0.i2c4_scl */
- /* unused pins */
- P9_20B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d4.off */
- P9_19B( PIN_OUTPUT | MUX_MODE15) /* vin2a_d5.off */
- >;
- };
-
- bone_i2c_3_pins: pinmux_bone_i2c_3_pins {
- pinctrl-single,pins = <
- P9_26A( PIN_INPUT_PULLUP | MUX_MODE9) /* gpio6_14.i2c3_sda */
- P9_24( PIN_INPUT_PULLUP | MUX_MODE9) /* gpio6_15.i2c3_scl */
- /* unused pins*/
- P9_26B( PIN_OUTPUT | MUX_MODE15) /* gpio6_14.off */
- >;
- };
-
- // SPIs
- bone_spi_0_pins: pinmux_bone_spi_0_pins {
- pinctrl-single,pins = <
- P9_22B( PIN_INPUT | MUX_MODE0) /* spi2_sclk.spi2_sclk */
- P9_21B( PIN_INPUT | MUX_MODE0) /* spi2_d1.spi2_d1 */
- P9_18A( PIN_INPUT | MUX_MODE0) /* spi2_d0.spi2_d0 */
- P9_17A( PIN_INPUT | MUX_MODE0) /* spi2_cs0.spi2_cs0 */
- /* unused pins */
- P9_22A( PIN_INPUT | MUX_MODE15) /* xref_clk2.off */
- P9_21A( PIN_INPUT | MUX_MODE15) /* vin1a_vsync0.off */
- P9_18B( PIN_INPUT | MUX_MODE15) /* mcasp1_axr0.off */
- P9_17B( PIN_INPUT | MUX_MODE15) /* mcasp1_axr1.off */
- >;
- };
-
- bone_spi_1_pins: pinmux_bone_spi_1_pins {
- pinctrl-single,pins = <
- P9_31A( PIN_INPUT | MUX_MODE3) /* mcasp1_axr8.spi3_sclk */
- P9_29A( PIN_INPUT | MUX_MODE3) /* mcasp1_axr9.spi3_d1 */
- P9_30( PIN_INPUT | MUX_MODE3) /* mcasp1_axr10.spi3_d0 */
- P9_28( PIN_INPUT | MUX_MODE3) /* mcasp1_axr11.spi3_cs0 */
- P9_42A( PIN_INPUT | MUX_MODE3) /* mcasp1_axr12.spi3_cs1 */
- // P8_45A( PIN_INPUT | MUX_MODE8) /* vout1_d0.spi3_cs2 */
- // P8_46B( PIN_INPUT | MUX_MODE8) /* vout1_d23.spi3_cs3 */
- /* unused pins */
- P9_31B( PIN_INPUT | MUX_MODE15) /* mcasp1_axr8.off */
- P9_29B( PIN_INPUT | MUX_MODE15) /* mcasp1_axr9.off */
- P9_42B( PIN_INPUT | MUX_MODE15) /* vin2a_d13.off */
- // P8_45B( PIN_INPUT | MUX_MODE8) /* vout1_d16.off */
- // P8_46A( PIN_INPUT | MUX_MODE8) /* vout1_d1.off */
- >;
- };
-};
// UARTs
bone_uart_1: &uart10 {
status = "disabled";
pinctrl-names = "default";
- pinctrl-0 = <&bone_uart_1_pins>;
symlink = "bone/uart/1";
};
bone_uart_2: &uart3 {
status = "disabled";
pinctrl-names = "default";
- pinctrl-0 = <&bone_uart_2_pins>;
symlink = "bone/uart/2";
};
@@ -480,14 +374,12 @@ bone_uart_3: &ocp{
bone_uart_4: &uart5 {
status = "disabled";
pinctrl-names = "default";
- pinctrl-0 = <&bone_uart_4_pins>;
symlink = "bone/uart/4";
};
bone_uart_5: &uart8 {
status = "disabled";
pinctrl-names = "default";
- pinctrl-0 = <&bone_uart_5_pins>;
symlink = "bone/uart/5";
};
@@ -495,14 +387,12 @@ bone_uart_5: &uart8 {
bone_i2c_1: &i2c5 {
status = "disabled";
pinctrl-names = "default";
- pinctrl-0 = <&bone_i2c_1_pins>;
symlink = "bone/i2c/1";
};
bone_i2c_2: &i2c4 {
// status = "disabled";
pinctrl-names = "default";
- pinctrl-0 = <&bone_i2c_2_pins>;
// symlink = "bone/i2c/2";
};
@@ -513,7 +403,6 @@ bone_i2c_2a: &ocp {
bone_i2c_3: &i2c3 {
status = "disabled";
pinctrl-names = "default";
- pinctrl-0 = <&bone_i2c_3_pins>;
symlink = "bone/i2c/3";
};
@@ -524,7 +413,6 @@ bone_spi_0: &mcspi2 {
status = "disabled";
pinctrl-names = "default";
- pinctrl-0 = <&bone_spi_0_pins>;
channel@0 {
#address-cells = <1>;
@@ -545,7 +433,6 @@ bone_spi_1: &mcspi3 {
status = "disabled";
pinctrl-names = "default";
- pinctrl-0 = <&bone_spi_1_pins>;
ti,pio-mode; /* disable dma when used as an overlay, dma gets stuck at 160 bits... */
channel@0 {
--
GitLab
From a91ecc900b407b3b39002a814b1059130191330a Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Sun, 12 Jul 2020 20:20:23 +0530
Subject: [PATCH 34/86] BBB: remove bone-bus pinmuxing nodes
This might also cause similar problems we encountered on BBAI. Removal of this will also creates things flexible for end-user.
---
src/arm/bbb-bone-buses.dtsi | 100 ------------------------------------
1 file changed, 100 deletions(-)
diff --git a/src/arm/bbb-bone-buses.dtsi b/src/arm/bbb-bone-buses.dtsi
index 42e1b7ed..d77582dc 100644
--- a/src/arm/bbb-bone-buses.dtsi
+++ b/src/arm/bbb-bone-buses.dtsi
@@ -368,128 +368,34 @@
};
};
-&am33xx_pinmux {
- // UARTs
- bone_uart_1_pins: pinmux_bone_uart_1_pins {
- pinctrl-single,pins = <
- P9_24( PIN_OUTPUT_PULLUP | MUX_MODE0) /* uart1_txd */
- P9_26( PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd */
- >;
- };
-
- bone_uart_2_pins: pinmux_bone_uart_2_pins {
- pinctrl-single,pins = <
- P9_21( PIN_OUTPUT_PULLUP | MUX_MODE1) /* spi0_d0 */
- P9_22( PIN_INPUT_PULLUP | MUX_MODE1) /* spi0_sclk */
- >;
- };
-
- bone_uart_3_pins: pinmux_bone_uart_3_pins {
- pinctrl-single,pins = <
- P9_42A (PIN_OUTPUT_PULLUP | MUX_MODE1) /* P0_in_PWM0_out */
- >;
- };
-
- bone_uart_4_pins: pinmux_bone_uart_4_pins {
- pinctrl-single,pins = <
- P9_13(PIN_OUTPUT_PULLUP | MUX_MODE6) /* gpmc_wpn */
- P9_11(PIN_OUTPUT_PULLUP | MUX_MODE6) /* gpmc_wait0 */
- >;
- };
-
- bone_uart_5_pins: pinmux_bone_uart_5_pins {
- pinctrl-single,pins = <
- P8_37( PIN_OUTPUT_PULLUP | MUX_MODE4) /* lcd_data8 */
- P8_38( PIN_INPUT_PULLUP | MUX_MODE4) /* lcd_data9 */
- >;
- };
-
- // I2Cs
- bone_i2c_1_pins: pinmux_bone_i2c_1_pins {
- pinctrl-single,pins = <
- P9_18( SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
- P9_17( SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
- >;
- };
-
- bone_i2c_2_pins: pinmux_bone_i2c_2_pins {
- pinctrl-single,pins = <
- P9_20( SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
- P9_19( SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
- >;
- };
-
- // use only when bone_i2c_2 is not in use
- bone_i2c_2a_pins: pinmux_bone_i2c_2a_pins {
- pinctrl-single,pins = <
- P9_22( SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_sclk.i2c2_sda */
- P9_21( SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d0.i2c2_scl */
- >;
- };
-
- // use only when bone_i2c_1 is not in use
- bone_i2c_3_pins: pinmux_bone_i2c_3_pins {
- pinctrl-single,pins = <
- P9_26( SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rxd.i2c1_sda */
- P9_24( SLEWCTRL_SLOW | PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_txd.i2c1_scl */
- >;
- };
-
- // SPIs
- bone_spi_0_pins: pinmux_bone_spi_0_pins {
- pinctrl-single,pins = <
- P9_22( PIN_INPUT | MUX_MODE0) /* spi0_sclk.spi0_sclk */
- P9_21( PIN_INPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */
- P9_18( PIN_INPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */
- P9_17( PIN_INPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
- >;
- };
-
- bone_spi_1_pins: pinmux_bone_spi_1_pins {
- pinctrl-single,pins = <
- P9_31( PIN_INPUT | MUX_MODE3) /* mcasp0_aclkx.spi1_sclk */
- P9_29( PIN_INPUT | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */
- P9_30( PIN_INPUT | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */
- P9_28( PIN_INPUT | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */
- P9_42A( PIN_INPUT | MUX_MODE2) /* eCAP0_in_PWM0_out.spi1_cs1 */
- >;
- };
-
-};
-
// UARTs
bone_uart_1: &uart1 {
status = "disabled";
pinctrl-names = "default";
- pinctrl-0 = <&bone_uart_1_pins>;
symlink = "bone/uart/1";
};
bone_uart_2: &uart2 {
status = "disabled";
pinctrl-names = "default";
- pinctrl-0 = <&bone_uart_2_pins>;
symlink = "bone/uart/2";
};
bone_uart_3: &uart3 {
status = "disabled";
pinctrl-names = "default";
- pinctrl-0 = <&bone_uart_3_pins>;
symlink = "bone/uart/3";
};
bone_uart_4: &uart4 {
status = "disabled";
pinctrl-names = "default";
- pinctrl-0 = <&bone_uart_4_pins>;
symlink = "bone/uart/4";
};
bone_uart_5: &uart5 {
status = "disabled";
pinctrl-names = "default";
- pinctrl-0 = <&bone_uart_5_pins>;
symlink = "bone/uart/5";
};
@@ -497,14 +403,12 @@ bone_uart_5: &uart5 {
bone_i2c_1: &i2c1 {
status = "disabled";
pinctrl-names = "default";
- pinctrl-0 = <&bone_i2c_1_pins>;
symlink = "bone/i2c/1";
};
bone_i2c_2: &i2c2 {
status = "disabled";
pinctrl-names = "default";
- pinctrl-0 = <&bone_i2c_2_pins>;
symlink = "bone/i2c/2";
};
@@ -512,7 +416,6 @@ bone_i2c_2: &i2c2 {
bone_i2c_2a: &i2c2 {
// status = "disabled";
// pinctrl-names = "default";
- // pinctrl-0 = <&bone_i2c_2a_pins>;
// symlink = "bone/i2c/2a";
};
@@ -520,7 +423,6 @@ bone_i2c_2a: &i2c2 {
bone_i2c_3: &i2c1 {
// status = "disabled";
// pinctrl-names = "default";
- // pinctrl-0 = <&bone_i2c_3_pins>;
// symlink = "bone/i2c/3";
};
@@ -531,7 +433,6 @@ bone_spi_0: &spi0 {
status = "disabled";
pinctrl-names = "default";
- pinctrl-0 = <&bone_spi_0_pins>;
channel@0 {
#address-cells = <1>;
@@ -552,7 +453,6 @@ bone_spi_1: &spi1 {
status = "disabled";
pinctrl-names = "default";
- pinctrl-0 = <&bone_spi_1_pins>;
ti,pio-mode; /* disable dma when used as an overlay, dma gets stuck at 160 bits... */
channel@0 {
--
GitLab
From c3d301152fa126ab0ca336d4865563447e8b0a71 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Mon, 13 Jul 2020 20:46:56 +0530
Subject: [PATCH 35/86] BBB: Remove status & pinctrl-names from bone_* nodes
The default properties are already set in the base files and we don't require these values here.
---
src/arm/bbb-bone-buses.dtsi | 25 +------------------------
1 file changed, 1 insertion(+), 24 deletions(-)
diff --git a/src/arm/bbb-bone-buses.dtsi b/src/arm/bbb-bone-buses.dtsi
index d77582dc..c2e50dc4 100644
--- a/src/arm/bbb-bone-buses.dtsi
+++ b/src/arm/bbb-bone-buses.dtsi
@@ -370,59 +370,41 @@
// UARTs
bone_uart_1: &uart1 {
- status = "disabled";
- pinctrl-names = "default";
symlink = "bone/uart/1";
};
bone_uart_2: &uart2 {
- status = "disabled";
- pinctrl-names = "default";
symlink = "bone/uart/2";
};
bone_uart_3: &uart3 {
- status = "disabled";
- pinctrl-names = "default";
symlink = "bone/uart/3";
};
bone_uart_4: &uart4 {
- status = "disabled";
- pinctrl-names = "default";
symlink = "bone/uart/4";
};
bone_uart_5: &uart5 {
- status = "disabled";
- pinctrl-names = "default";
symlink = "bone/uart/5";
};
// I2Cs
bone_i2c_1: &i2c1 {
- status = "disabled";
- pinctrl-names = "default";
symlink = "bone/i2c/1";
};
bone_i2c_2: &i2c2 {
- status = "disabled";
- pinctrl-names = "default";
symlink = "bone/i2c/2";
};
// use only when bone_i2c_2 is not in use
bone_i2c_2a: &i2c2 {
- // status = "disabled";
- // pinctrl-names = "default";
// symlink = "bone/i2c/2a";
};
// use only when bone_i2c_1 is not in use
bone_i2c_3: &i2c1 {
- // status = "disabled";
- // pinctrl-names = "default";
// symlink = "bone/i2c/3";
};
@@ -431,9 +413,6 @@ bone_spi_0: &spi0 {
#address-cells = <1>;
#size-cells = <0>;
- status = "disabled";
- pinctrl-names = "default";
-
channel@0 {
#address-cells = <1>;
#size-cells = <0>;
@@ -451,8 +430,6 @@ bone_spi_1: &spi1 {
#address-cells = <1>;
#size-cells = <0>;
- status = "disabled";
- pinctrl-names = "default";
ti,pio-mode; /* disable dma when used as an overlay, dma gets stuck at 160 bits... */
channel@0 {
@@ -477,4 +454,4 @@ bone_spi_1: &spi1 {
reg = <1>;
spi-max-frequency = <16000000>;
};
-};
\ No newline at end of file
+};
--
GitLab
From 4552ec052081d903a4b155d482edcd6fa4a5e29f Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Mon, 13 Jul 2020 20:47:18 +0530
Subject: [PATCH 36/86] BBB: add PWM nodes
These nodes provides a way to make DT overlays compatible on both BBB and BBAI. For example, LCD cape and Motor cape uses these PWM and by uisng these nodes we can write one overlay to work on both BBB and BBAI.
---
src/arm/bbb-bone-buses.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/src/arm/bbb-bone-buses.dtsi b/src/arm/bbb-bone-buses.dtsi
index c2e50dc4..3598e88c 100644
--- a/src/arm/bbb-bone-buses.dtsi
+++ b/src/arm/bbb-bone-buses.dtsi
@@ -455,3 +455,20 @@ bone_spi_1: &spi1 {
spi-max-frequency = <16000000>;
};
};
+
+// PWMs & TIMERs
+bone_pwm_1: &ehrpwm1 {
+
+};
+
+bone_pwmss_1: &epwmss1 {
+
+};
+
+bone_pwm_2: &ehrpwm2 {
+
+};
+
+bone_pwmss_2: &epwmss2 {
+
+};
--
GitLab
From a66a07adffc90062d6b4004ea75ddc66f9452299 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Mon, 13 Jul 2020 20:48:03 +0530
Subject: [PATCH 37/86] BBAI: Remove status & pinctrl-names from bone_* nodes
The default properties are already set in the base files like dra7.dtsi and we don't require these values here.
---
src/arm/bbai-bone-buses.dtsi | 20 +-------------------
1 file changed, 1 insertion(+), 19 deletions(-)
diff --git a/src/arm/bbai-bone-buses.dtsi b/src/arm/bbai-bone-buses.dtsi
index ff796c3c..3babfcf7 100644
--- a/src/arm/bbai-bone-buses.dtsi
+++ b/src/arm/bbai-bone-buses.dtsi
@@ -356,14 +356,10 @@
// UARTs
bone_uart_1: &uart10 {
- status = "disabled";
- pinctrl-names = "default";
symlink = "bone/uart/1";
};
bone_uart_2: &uart3 {
- status = "disabled";
- pinctrl-names = "default";
symlink = "bone/uart/2";
};
@@ -372,27 +368,19 @@ bone_uart_3: &ocp{
};
bone_uart_4: &uart5 {
- status = "disabled";
- pinctrl-names = "default";
symlink = "bone/uart/4";
};
bone_uart_5: &uart8 {
- status = "disabled";
- pinctrl-names = "default";
symlink = "bone/uart/5";
};
// I2Cs
bone_i2c_1: &i2c5 {
- status = "disabled";
- pinctrl-names = "default";
symlink = "bone/i2c/1";
};
bone_i2c_2: &i2c4 {
- // status = "disabled";
- pinctrl-names = "default";
// symlink = "bone/i2c/2";
};
@@ -401,8 +389,6 @@ bone_i2c_2a: &ocp {
};
bone_i2c_3: &i2c3 {
- status = "disabled";
- pinctrl-names = "default";
symlink = "bone/i2c/3";
};
@@ -411,8 +397,6 @@ bone_spi_0: &mcspi2 {
#address-cells = <1>;
#size-cells = <0>;
- status = "disabled";
- pinctrl-names = "default";
channel@0 {
#address-cells = <1>;
@@ -431,8 +415,6 @@ bone_spi_1: &mcspi3 {
#address-cells = <1>;
#size-cells = <0>;
- status = "disabled";
- pinctrl-names = "default";
ti,pio-mode; /* disable dma when used as an overlay, dma gets stuck at 160 bits... */
channel@0 {
@@ -457,4 +439,4 @@ bone_spi_1: &mcspi3 {
reg = <1>;
spi-max-frequency = <16000000>;
};
-};
\ No newline at end of file
+};
--
GitLab
From 5551091b640bdb07c5c1fc540931cac809bef2aa Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Mon, 13 Jul 2020 20:49:10 +0530
Subject: [PATCH 38/86] BBAI: add PWM nodes
These nodes provides a way to make DT overlays compatible on both BBB and BBAI. For example, LCD cape and Motor cape uses these PWM and by uisng these nodes we can write one overlay to work on both BBB and BBAI.
---
src/arm/bbai-bone-buses.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/src/arm/bbai-bone-buses.dtsi b/src/arm/bbai-bone-buses.dtsi
index 3babfcf7..c0b05438 100644
--- a/src/arm/bbai-bone-buses.dtsi
+++ b/src/arm/bbai-bone-buses.dtsi
@@ -440,3 +440,18 @@ bone_spi_1: &mcspi3 {
spi-max-frequency = <16000000>;
};
};
+
+// PWMs & TIMERs
+bone_pwm_1: &ehrpwm2 {
+
+};
+
+bone_pwmss_1: &epwmss2 {
+};
+
+bone_pwm_2: &ehrpwm1 {
+
+};
+
+bone_pwmss_2: &epwmss1 {
+};
\ No newline at end of file
--
GitLab
From bfdaed3899e1bef071e82be52e0419768cfbe2ff Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 15 Jul 2020 22:04:41 +0530
Subject: [PATCH 39/86] add am5729-bone-pins.h
I have removed the redundant code and changed the file name as discussed on irc.
---
include/dt-bindings/board/am5729-bone-pins.h | 109 +++++++++++++++++++
include/dt-bindings/board/am572x-bbai-pins.h | 109 -------------------
2 files changed, 109 insertions(+), 109 deletions(-)
create mode 100644 include/dt-bindings/board/am5729-bone-pins.h
delete mode 100644 include/dt-bindings/board/am572x-bbai-pins.h
diff --git a/include/dt-bindings/board/am5729-bone-pins.h b/include/dt-bindings/board/am5729-bone-pins.h
new file mode 100644
index 00000000..6d358c8d
--- /dev/null
+++ b/include/dt-bindings/board/am5729-bone-pins.h
@@ -0,0 +1,109 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _DT_BINDINGS_BOARD_AM5729_BBAI_PINS_H
+#define _DT_BINDINGS_BOARD_AM5729_BBAI_PINS_H
+
+#define P8_03(mode) DRA7XX_CORE_IOPAD(0x379C, mode) /* AB8: mmc3_dat6 */
+#define P8_04(mode) DRA7XX_CORE_IOPAD(0x37A0, mode) /* AB5: mmc3_dat7 */
+#define P8_05(mode) DRA7XX_CORE_IOPAD(0x378C, mode) /* AC9: mmc3_dat2 */
+#define P8_06(mode) DRA7XX_CORE_IOPAD(0x3790, mode) /* AC3: mmc3_dat3 */
+#define P8_07(mode) DRA7XX_CORE_IOPAD(0x36EC, mode) /* G14: mcasp1_axr14 */
+#define P8_08(mode) DRA7XX_CORE_IOPAD(0x36F0, mode) /* F14: mcasp1_axr15 */
+#define P8_09(mode) DRA7XX_CORE_IOPAD(0x3698, mode) /* E17: xref_clk1 */
+#define P8_10(mode) DRA7XX_CORE_IOPAD(0x36E8, mode) /* A13: mcasp1_axr13 */
+#define P8_11(mode) DRA7XX_CORE_IOPAD(0x3510, mode) /* AH4: vin1a_d7 */
+#define P8_12(mode) DRA7XX_CORE_IOPAD(0x350C, mode) /* AG6: vin1a_d6 */
+#define P8_13(mode) DRA7XX_CORE_IOPAD(0x3590, mode) /* D3: vin2a_d10 */
+#define P8_14(mode) DRA7XX_CORE_IOPAD(0x3598, mode) /* D5: vin2a_d12 */
+#define P8_15A(mode) DRA7XX_CORE_IOPAD(0x3570, mode) /* D1: vin2a_d2 */
+#define P8_15B(mode) DRA7XX_CORE_IOPAD(0x35B4, mode) /* A3: vin2a_d19 */
+#define P8_16(mode) DRA7XX_CORE_IOPAD(0x35BC, mode) /* B4: vin2a_d21 */
+#define P8_17(mode) DRA7XX_CORE_IOPAD(0x3624, mode) /* A7: vout1_d18 */
+#define P8_18(mode) DRA7XX_CORE_IOPAD(0x3588, mode) /* F5: vin2a_d8 */
+#define P8_19(mode) DRA7XX_CORE_IOPAD(0x358C, mode) /* E6: vin2a_d9 */
+#define P8_20(mode) DRA7XX_CORE_IOPAD(0x3780, mode) /* AC4: mmc3_cmd */
+#define P8_21(mode) DRA7XX_CORE_IOPAD(0x377C, mode) /* AD4: mmc3_clk */
+#define P8_22(mode) DRA7XX_CORE_IOPAD(0x3798, mode) /* AD6: mmc3_dat5 */
+#define P8_23(mode) DRA7XX_CORE_IOPAD(0x3794, mode) /* AC8: mmc3_dat4 */
+#define P8_24(mode) DRA7XX_CORE_IOPAD(0x3788, mode) /* AC6: mmc3_dat1 */
+#define P8_25(mode) DRA7XX_CORE_IOPAD(0x3784, mode) /* AC7: mmc3_dat0 */
+#define P8_26(mode) DRA7XX_CORE_IOPAD(0x35B8, mode) /* B3: vin2a_d20 */
+#define P8_27A(mode) DRA7XX_CORE_IOPAD(0x35D8, mode) /* E11: vout1_vsync */
+#define P8_27B(mode) DRA7XX_CORE_IOPAD(0x3628, mode) /* A8: vout1_d19 */
+#define P8_28A(mode) DRA7XX_CORE_IOPAD(0x35C8, mode) /* D11: vout1_clk */
+#define P8_28B(mode) DRA7XX_CORE_IOPAD(0x362C, mode) /* C9: vout1_d20 */
+#define P8_29A(mode) DRA7XX_CORE_IOPAD(0x35D4, mode) /* C11: vout1_hsync */
+#define P8_29B(mode) DRA7XX_CORE_IOPAD(0x3630, mode) /* A9: vout1_d21 */
+#define P8_30A(mode) DRA7XX_CORE_IOPAD(0x35CC, mode) /* B10: vout1_de */
+#define P8_30B(mode) DRA7XX_CORE_IOPAD(0x3634, mode) /* B9: vout1_d22 */
+#define P8_31A(mode) DRA7XX_CORE_IOPAD(0x3614, mode) /* C8: vout1_d14 */
+#define P8_31B(mode) DRA7XX_CORE_IOPAD(0x373C, mode) /* G16: mcasp4_axr0 */
+#define P8_32A(mode) DRA7XX_CORE_IOPAD(0x3618, mode) /* C7: vout1_d15 */
+#define P8_32B(mode) DRA7XX_CORE_IOPAD(0x3740, mode) /* D17: mcasp4_axr1 */
+#define P8_33A(mode) DRA7XX_CORE_IOPAD(0x3610, mode) /* C6: vout1_d13 */
+#define P8_33B(mode) DRA7XX_CORE_IOPAD(0x34E8, mode) /* AF9: vin1a_fld0 */
+#define P8_34A(mode) DRA7XX_CORE_IOPAD(0x3608, mode) /* D8: vout1_d11 */
+#define P8_34B(mode) DRA7XX_CORE_IOPAD(0x3564, mode) /* G6: vin2a_vsync0 */
+#define P8_35A(mode) DRA7XX_CORE_IOPAD(0x360C, mode) /* A5: vout1_d12 */
+#define P8_35B(mode) DRA7XX_CORE_IOPAD(0x34E4, mode) /* AD9: vin1a_de0 */
+#define P8_36A(mode) DRA7XX_CORE_IOPAD(0x3604, mode) /* D7: vout1_d10 */
+#define P8_36B(mode) DRA7XX_CORE_IOPAD(0x3568, mode) /* F2: vin2a_d0 */
+#define P8_37A(mode) DRA7XX_CORE_IOPAD(0x35FC, mode) /* E8: vout1_d8 */
+#define P8_37B(mode) DRA7XX_CORE_IOPAD(0x3738, mode) /* A21: mcasp4_fsx */
+#define P8_38A(mode) DRA7XX_CORE_IOPAD(0x3600, mode) /* D9: vout1_d9 */
+#define P8_38B(mode) DRA7XX_CORE_IOPAD(0x3734, mode) /* C18: mcasp4_aclkx */
+#define P8_39(mode) DRA7XX_CORE_IOPAD(0x35F4, mode) /* F8: vout1_d6 */
+#define P8_40(mode) DRA7XX_CORE_IOPAD(0x35F8, mode) /* E7: vout1_d7 */
+#define P8_41(mode) DRA7XX_CORE_IOPAD(0x35EC, mode) /* E9: vout1_d4 */
+#define P8_42(mode) DRA7XX_CORE_IOPAD(0x35F0, mode) /* F9: vout1_d5 */
+#define P8_43(mode) DRA7XX_CORE_IOPAD(0x35E4, mode) /* F10: vout1_d2 */
+#define P8_44(mode) DRA7XX_CORE_IOPAD(0x35E8, mode) /* G11: vout1_d3 */
+#define P8_45A(mode) DRA7XX_CORE_IOPAD(0x35DC, mode) /* F11: vout1_d0 */
+#define P8_45B(mode) DRA7XX_CORE_IOPAD(0x361C, mode) /* B7: vout1_d16 */
+#define P8_46A(mode) DRA7XX_CORE_IOPAD(0x35E0, mode) /* G10: vout1_d1 */
+#define P8_46B(mode) DRA7XX_CORE_IOPAD(0x3638, mode) /* A10: vout1_d23 */
+#define P9_11A(mode) DRA7XX_CORE_IOPAD(0x372C, mode) /* B19: mcasp3_axr0 */
+#define P9_11B(mode) DRA7XX_CORE_IOPAD(0x3620, mode) /* B8: vout1_d17 */
+#define P9_12(mode) DRA7XX_CORE_IOPAD(0x36AC, mode) /* B14: mcasp1_aclkr */
+#define P9_13A(mode) DRA7XX_CORE_IOPAD(0x3730, mode) /* C17: mcasp3_axr1 */
+#define P9_13B(mode) DRA7XX_CORE_IOPAD(0x3680, mode) /* AB10: usb1_drvvbus */
+#define P9_14(mode) DRA7XX_CORE_IOPAD(0x35AC, mode) /* D6: vin2a_d17 */
+#define P9_15(mode) DRA7XX_CORE_IOPAD(0x3514, mode) /* AG4: vin1a_d8 */
+#define P9_16(mode) DRA7XX_CORE_IOPAD(0x35B0, mode) /* C5: vin2a_d18 */
+#define P9_17A(mode) DRA7XX_CORE_IOPAD(0x37CC, mode) /* B24: spi2_cs0 */
+#define P9_17B(mode) DRA7XX_CORE_IOPAD(0x36B8, mode) /* F12: mcasp1_axr1 */
+#define P9_18A(mode) DRA7XX_CORE_IOPAD(0x37C8, mode) /* G17: spi2_d0 */
+#define P9_18B(mode) DRA7XX_CORE_IOPAD(0x36B4, mode) /* G12: mcasp1_axr0 */
+#define P9_19A(mode) DRA7XX_CORE_IOPAD(0x3440, mode) /* R6: gpmc_a0.i2c4_scl */
+#define P9_19B(mode) DRA7XX_CORE_IOPAD(0x357C, mode) /* F4: vin2a_d5.pr1_pru1_gpi2 */
+#define P9_20A(mode) DRA7XX_CORE_IOPAD(0x3444, mode) /* T9: gpmc_a1.i2c4_sda */
+#define P9_20B(mode) DRA7XX_CORE_IOPAD(0x3578, mode) /* D2: vin2a_d4.pr1_pru1_gpi1 */
+#define P9_21A(mode) DRA7XX_CORE_IOPAD(0x34F0, mode) /* AF8: vin1a_vsync0 */
+#define P9_21B(mode) DRA7XX_CORE_IOPAD(0x37C4, mode) /* B22: spi2_d1 */
+#define P9_22A(mode) DRA7XX_CORE_IOPAD(0x369C, mode) /* B26: xref_clk2 */
+#define P9_22B(mode) DRA7XX_CORE_IOPAD(0x37C0, mode) /* A26: spi2_sclk */
+#define P9_23(mode) DRA7XX_CORE_IOPAD(0x37B4, mode) /* A22: spi1_cs1 */
+#define P9_24(mode) DRA7XX_CORE_IOPAD(0x368C, mode) /* F20: gpio6_15 */
+#define P9_25(mode) DRA7XX_CORE_IOPAD(0x3694, mode) /* D18: xref_clk0 */
+#define P9_26A(mode) DRA7XX_CORE_IOPAD(0x3688, mode) /* E21: gpio6_14 */
+#define P9_26B(mode) DRA7XX_CORE_IOPAD(0x3544, mode) /* AE2: vin1a_d20 */
+#define P9_27A(mode) DRA7XX_CORE_IOPAD(0x35A0, mode) /* C3: vin2a_d14 */
+#define P9_27B(mode) DRA7XX_CORE_IOPAD(0x36B0, mode) /* J14: mcasp1_fsr */
+#define P9_28(mode) DRA7XX_CORE_IOPAD(0x36E0, mode) /* A12: mcasp1_axr11 */
+#define P9_29A(mode) DRA7XX_CORE_IOPAD(0x36D8, mode) /* A11: mcasp1_axr9 */
+#define P9_29B(mode) DRA7XX_CORE_IOPAD(0x36A8, mode) /* D14: mcasp1_fsx */
+#define P9_30(mode) DRA7XX_CORE_IOPAD(0x36DC, mode) /* B13: mcasp1_axr10 */
+#define P9_31A(mode) DRA7XX_CORE_IOPAD(0x36D4, mode) /* B12: mcasp1_axr8 */
+#define P9_31B(mode) DRA7XX_CORE_IOPAD(0x36A4, mode) /* C14: mcasp1_aclkx */
+#define P9_41A(mode) DRA7XX_CORE_IOPAD(0x36A0, mode) /* C23: xref_clk3 */
+#define P9_41B(mode) DRA7XX_CORE_IOPAD(0x3580, mode) /* C1: vin2a_d6 */
+#define P9_42A(mode) DRA7XX_CORE_IOPAD(0x36E4, mode) /* E14: mcasp1_axr12 */
+#define P9_42B(mode) DRA7XX_CORE_IOPAD(0x359C, mode) /* C2: vin2a_d13 */
+
+#endif
\ No newline at end of file
diff --git a/include/dt-bindings/board/am572x-bbai-pins.h b/include/dt-bindings/board/am572x-bbai-pins.h
deleted file mode 100644
index c2639592..00000000
--- a/include/dt-bindings/board/am572x-bbai-pins.h
+++ /dev/null
@@ -1,109 +0,0 @@
-/*
- * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef _DT_BINDINGS_BOARD_AM5729_BBAI_PINS_H
-#define _DT_BINDINGS_BOARD_AM5729_BBAI_PINS_H
-
-#define P8_03(mode) DRA7XX_CORE_IOPAD(0x379C, mode) /* AB8: P8.3: mmc3_dat6 */
-#define P8_04(mode) DRA7XX_CORE_IOPAD(0x37A0, mode) /* AB5: P8.4: mmc3_dat7 */
-#define P8_05(mode) DRA7XX_CORE_IOPAD(0x378C, mode) /* AC9: P8.5: mmc3_dat2 */
-#define P8_06(mode) DRA7XX_CORE_IOPAD(0x3790, mode) /* AC3: P8.6: mmc3_dat3 */
-#define P8_07(mode) DRA7XX_CORE_IOPAD(0x36EC, mode) /* G14: P8.7: mcasp1_axr14 */
-#define P8_08(mode) DRA7XX_CORE_IOPAD(0x36F0, mode) /* F14: P8.8: mcasp1_axr15 */
-#define P8_09(mode) DRA7XX_CORE_IOPAD(0x3698, mode) /* E17: P8.9: xref_clk1 */
-#define P8_10(mode) DRA7XX_CORE_IOPAD(0x36E8, mode) /* A13: P8.10: mcasp1_axr13 */
-#define P8_11(mode) DRA7XX_CORE_IOPAD(0x3510, mode) /* AH4: P8.11: vin1a_d7 */
-#define P8_12(mode) DRA7XX_CORE_IOPAD(0x350C, mode) /* AG6: P8.12: vin1a_d6 */
-#define P8_13(mode) DRA7XX_CORE_IOPAD(0x3590, mode) /* D3: P8.13: vin2a_d10 */
-#define P8_14(mode) DRA7XX_CORE_IOPAD(0x3598, mode) /* D5: P8.14: vin2a_d12 */
-#define P8_15A(mode) DRA7XX_CORE_IOPAD(0x3570, mode) /* D1: P8.15a: vin2a_d2 */
-#define P8_15B(mode) DRA7XX_CORE_IOPAD(0x35B4, mode) /* A3: P8.15b: vin2a_d19 */
-#define P8_16(mode) DRA7XX_CORE_IOPAD(0x35BC, mode) /* B4: P8.16: vin2a_d21 */
-#define P8_17(mode) DRA7XX_CORE_IOPAD(0x3624, mode) /* A7: P8.17: vout1_d18 */
-#define P8_18(mode) DRA7XX_CORE_IOPAD(0x3588, mode) /* F5: P8.18: vin2a_d8 */
-#define P8_19(mode) DRA7XX_CORE_IOPAD(0x358C, mode) /* E6: P8.19: vin2a_d9 */
-#define P8_20(mode) DRA7XX_CORE_IOPAD(0x3780, mode) /* AC4: P8.20: mmc3_cmd */
-#define P8_21(mode) DRA7XX_CORE_IOPAD(0x377C, mode) /* AD4: P8.21: mmc3_clk */
-#define P8_22(mode) DRA7XX_CORE_IOPAD(0x3798, mode) /* AD6: P8.22: mmc3_dat5 */
-#define P8_23(mode) DRA7XX_CORE_IOPAD(0x3794, mode) /* AC8: P8.23: mmc3_dat4 */
-#define P8_24(mode) DRA7XX_CORE_IOPAD(0x3788, mode) /* AC6: P8.24: mmc3_dat1 */
-#define P8_25(mode) DRA7XX_CORE_IOPAD(0x3784, mode) /* AC7: P8.25: mmc3_dat0 */
-#define P8_26(mode) DRA7XX_CORE_IOPAD(0x35B8, mode) /* B3: P8.26: vin2a_d20 */
-#define P8_27A(mode) DRA7XX_CORE_IOPAD(0x35D8, mode) /* E11: P8.27a: vout1_vsync */
-#define P8_27B(mode) DRA7XX_CORE_IOPAD(0x3628, mode) /* A8: P8.27b: vout1_d19 */
-#define P8_28A(mode) DRA7XX_CORE_IOPAD(0x35C8, mode) /* D11: P8.28a: vout1_clk */
-#define P8_28B(mode) DRA7XX_CORE_IOPAD(0x362C, mode) /* C9: P8.28b: vout1_d20 */
-#define P8_29A(mode) DRA7XX_CORE_IOPAD(0x35D4, mode) /* C11: P8.29a: vout1_hsync */
-#define P8_29B(mode) DRA7XX_CORE_IOPAD(0x3630, mode) /* A9: P8.29b: vout1_d21 */
-#define P8_30A(mode) DRA7XX_CORE_IOPAD(0x35CC, mode) /* B10: P8.30a: vout1_de */
-#define P8_30B(mode) DRA7XX_CORE_IOPAD(0x3634, mode) /* B9: P8.30b: vout1_d22 */
-#define P8_31A(mode) DRA7XX_CORE_IOPAD(0x3614, mode) /* C8: P8.31a: vout1_d14 */
-#define P8_31B(mode) DRA7XX_CORE_IOPAD(0x373C, mode) /* G16: P8.31b: mcasp4_axr0 */
-#define P8_32A(mode) DRA7XX_CORE_IOPAD(0x3618, mode) /* C7: P8.32a: vout1_d15 */
-#define P8_32B(mode) DRA7XX_CORE_IOPAD(0x3740, mode) /* D17: P8.32b: mcasp4_axr1 */
-#define P8_33A(mode) DRA7XX_CORE_IOPAD(0x3610, mode) /* C6: P8.33a: vout1_d13 */
-#define P8_33B(mode) DRA7XX_CORE_IOPAD(0x34E8, mode) /* AF9: P8.33b: vin1a_fld0 */
-#define P8_34A(mode) DRA7XX_CORE_IOPAD(0x3608, mode) /* D8: P8.34a: vout1_d11 */
-#define P8_34B(mode) DRA7XX_CORE_IOPAD(0x3564, mode) /* G6: P8.34b: vin2a_vsync0 */
-#define P8_35A(mode) DRA7XX_CORE_IOPAD(0x360C, mode) /* A5: P8.35a: vout1_d12 */
-#define P8_35B(mode) DRA7XX_CORE_IOPAD(0x34E4, mode) /* AD9: P8.35b: vin1a_de0 */
-#define P8_36A(mode) DRA7XX_CORE_IOPAD(0x3604, mode) /* D7: P8.36a: vout1_d10 */
-#define P8_36B(mode) DRA7XX_CORE_IOPAD(0x3568, mode) /* F2: P8.36b: vin2a_d0 */
-#define P8_37A(mode) DRA7XX_CORE_IOPAD(0x35FC, mode) /* E8: P8.37a: vout1_d8 */
-#define P8_37B(mode) DRA7XX_CORE_IOPAD(0x3738, mode) /* A21: P8.37b: mcasp4_fsx */
-#define P8_38A(mode) DRA7XX_CORE_IOPAD(0x3600, mode) /* D9: P8.38a: vout1_d9 */
-#define P8_38B(mode) DRA7XX_CORE_IOPAD(0x3734, mode) /* C18: P8.38b: mcasp4_aclkx */
-#define P8_39(mode) DRA7XX_CORE_IOPAD(0x35F4, mode) /* F8: P8.39: vout1_d6 */
-#define P8_40(mode) DRA7XX_CORE_IOPAD(0x35F8, mode) /* E7: P8.40: vout1_d7 */
-#define P8_41(mode) DRA7XX_CORE_IOPAD(0x35EC, mode) /* E9: P8.41: vout1_d4 */
-#define P8_42(mode) DRA7XX_CORE_IOPAD(0x35F0, mode) /* F9: P8.42: vout1_d5 */
-#define P8_43(mode) DRA7XX_CORE_IOPAD(0x35E4, mode) /* F10: P8.43: vout1_d2 */
-#define P8_44(mode) DRA7XX_CORE_IOPAD(0x35E8, mode) /* G11: P8.44: vout1_d3 */
-#define P8_45A(mode) DRA7XX_CORE_IOPAD(0x35DC, mode) /* F11: P8.45a: vout1_d0 */
-#define P8_45B(mode) DRA7XX_CORE_IOPAD(0x361C, mode) /* B7: P8.45b: vout1_d16 */
-#define P8_46A(mode) DRA7XX_CORE_IOPAD(0x35E0, mode) /* G10: P8.46a: vout1_d1 */
-#define P8_46B(mode) DRA7XX_CORE_IOPAD(0x3638, mode) /* A10: P8.46b: vout1_d23 */
-#define P9_11A(mode) DRA7XX_CORE_IOPAD(0x372C, mode) /* B19: P9.11a: mcasp3_axr0 */
-#define P9_11B(mode) DRA7XX_CORE_IOPAD(0x3620, mode) /* B8: P9.11b: vout1_d17 */
-#define P9_12(mode) DRA7XX_CORE_IOPAD(0x36AC, mode) /* B14: P9.12: mcasp1_aclkr */
-#define P9_13A(mode) DRA7XX_CORE_IOPAD(0x3730, mode) /* C17: P9.13a: mcasp3_axr1 */
-#define P9_13B(mode) DRA7XX_CORE_IOPAD(0x3680, mode) /* AB10: P9.13b: usb1_drvvbus */
-#define P9_14(mode) DRA7XX_CORE_IOPAD(0x35AC, mode) /* D6: P9.14: vin2a_d17 */
-#define P9_15(mode) DRA7XX_CORE_IOPAD(0x3514, mode) /* AG4: P9.15: vin1a_d8 */
-#define P9_16(mode) DRA7XX_CORE_IOPAD(0x35B0, mode) /* C5: P9.16: vin2a_d18 */
-#define P9_17A(mode) DRA7XX_CORE_IOPAD(0x37CC, mode) /* B24: P9.17a: spi2_cs0 */
-#define P9_17B(mode) DRA7XX_CORE_IOPAD(0x36B8, mode) /* F12: P9.17b: mcasp1_axr1 */
-#define P9_18A(mode) DRA7XX_CORE_IOPAD(0x37C8, mode) /* G17: P9.18a: spi2_d0 */
-#define P9_18B(mode) DRA7XX_CORE_IOPAD(0x36B4, mode) /* G12: P9.18b: mcasp1_axr0 */
-#define P9_19A(mode) DRA7XX_CORE_IOPAD(0x3440, mode) /* R6: P9.19a: gpmc_a0.i2c4_scl */
-#define P9_19B(mode) DRA7XX_CORE_IOPAD(0x357C, mode) /* F4: P9.19b: vin2a_d5.pr1_pru1_gpi2 */
-#define P9_20A(mode) DRA7XX_CORE_IOPAD(0x3444, mode) /* T9: P9.20a: gpmc_a1.i2c4_sda */
-#define P9_20B(mode) DRA7XX_CORE_IOPAD(0x3578, mode) /* D2: P9.20b: vin2a_d4.pr1_pru1_gpi1 */
-#define P9_21A(mode) DRA7XX_CORE_IOPAD(0x34F0, mode) /* AF8: P9.21a: vin1a_vsync0 */
-#define P9_21B(mode) DRA7XX_CORE_IOPAD(0x37C4, mode) /* B22: P9.21b: spi2_d1 */
-#define P9_22A(mode) DRA7XX_CORE_IOPAD(0x369C, mode) /* B26: P9.22a: xref_clk2 */
-#define P9_22B(mode) DRA7XX_CORE_IOPAD(0x37C0, mode) /* A26: P9.22b: spi2_sclk */
-#define P9_23(mode) DRA7XX_CORE_IOPAD(0x37B4, mode) /* A22: P9.23: spi1_cs1 */
-#define P9_24(mode) DRA7XX_CORE_IOPAD(0x368C, mode) /* F20: P9.24: gpio6_15 */
-#define P9_25(mode) DRA7XX_CORE_IOPAD(0x3694, mode) /* D18: P9.25: xref_clk0 */
-#define P9_26A(mode) DRA7XX_CORE_IOPAD(0x3688, mode) /* E21: P9.26a: gpio6_14 */
-#define P9_26B(mode) DRA7XX_CORE_IOPAD(0x3544, mode) /* AE2: P9.26b: vin1a_d20 */
-#define P9_27A(mode) DRA7XX_CORE_IOPAD(0x35A0, mode) /* C3: P9.27a: vin2a_d14 */
-#define P9_27B(mode) DRA7XX_CORE_IOPAD(0x36B0, mode) /* J14: P9.27b: mcasp1_fsr */
-#define P9_28(mode) DRA7XX_CORE_IOPAD(0x36E0, mode) /* A12: P9.28: mcasp1_axr11 */
-#define P9_29A(mode) DRA7XX_CORE_IOPAD(0x36D8, mode) /* A11: P9.29a: mcasp1_axr9 */
-#define P9_29B(mode) DRA7XX_CORE_IOPAD(0x36A8, mode) /* D14: P9.29b: mcasp1_fsx */
-#define P9_30(mode) DRA7XX_CORE_IOPAD(0x36DC, mode) /* B13: P9.30: mcasp1_axr10 */
-#define P9_31A(mode) DRA7XX_CORE_IOPAD(0x36D4, mode) /* B12: P9.31a: mcasp1_axr8 */
-#define P9_31B(mode) DRA7XX_CORE_IOPAD(0x36A4, mode) /* C14: P9.31b: mcasp1_aclkx */
-#define P9_41A(mode) DRA7XX_CORE_IOPAD(0x36A0, mode) /* C23: P9.41a: xref_clk3 */
-#define P9_41B(mode) DRA7XX_CORE_IOPAD(0x3580, mode) /* C1: P9.41b: vin2a_d6 */
-#define P9_42A(mode) DRA7XX_CORE_IOPAD(0x36E4, mode) /* E14: P9.42a: mcasp1_axr12 */
-#define P9_42B(mode) DRA7XX_CORE_IOPAD(0x359C, mode) /* C2: P9.42b: vin2a_d13 */
-
-#endif
\ No newline at end of file
--
GitLab
From e22a7cb7c5c0c5e3f4d28950a60fc692faf4ffba Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 15 Jul 2020 22:05:45 +0530
Subject: [PATCH 40/86] add am335x-bone-pins.h
I have added ball names and changed the name of file as discussed on IRC.
---
include/dt-bindings/board/am335x-bbb-pins.h | 82 -------------------
include/dt-bindings/board/am335x-bone-pins.h | 86 ++++++++++++++++++++
2 files changed, 86 insertions(+), 82 deletions(-)
delete mode 100644 include/dt-bindings/board/am335x-bbb-pins.h
create mode 100644 include/dt-bindings/board/am335x-bone-pins.h
diff --git a/include/dt-bindings/board/am335x-bbb-pins.h b/include/dt-bindings/board/am335x-bbb-pins.h
deleted file mode 100644
index e3b94f9d..00000000
--- a/include/dt-bindings/board/am335x-bbb-pins.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
- *
- * This program is free software you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef _DT_BINDINGS_BOARD_AM335X_BBB_PINS_H
-#define _DT_BINDINGS_BOARD_AM335X_BBB_PINS_H
-
-#define P8_03(mode) AM33XX_IOPAD(0x0818, mode) /* gpmc_ad6 */
-#define P8_04(mode) AM33XX_IOPAD(0x081c, mode) /* gpmc_ad7 */
-#define P8_05(mode) AM33XX_IOPAD(0x0808, mode) /* gpmc_ad2 */
-#define P8_06(mode) AM33XX_IOPAD(0x080c, mode) /* gpmc_ad3 */
-#define P8_07(mode) AM33XX_IOPAD(0x0890, mode) /* gpmc_advn_ale */
-#define P8_08(mode) AM33XX_IOPAD(0x0894, mode) /* gpmc_oen_ren */
-#define P8_09(mode) AM33XX_IOPAD(0x089c, mode) /* gpmc_be0n_cle */
-#define P8_10(mode) AM33XX_IOPAD(0x0898, mode) /* gpmc_wen */
-#define P8_11(mode) AM33XX_IOPAD(0x0834, mode) /* gpmc_ad13 */
-#define P8_12(mode) AM33XX_IOPAD(0x0830, mode) /* gpmc_ad12 */
-#define P8_13(mode) AM33XX_IOPAD(0x0824, mode) /* gpmc_ad9 */
-#define P8_14(mode) AM33XX_IOPAD(0x0828, mode) /* gpmc_ad10 */
-#define P8_15(mode) AM33XX_IOPAD(0x083c, mode) /* gpmc_ad15 */
-#define P8_16(mode) AM33XX_IOPAD(0x0838, mode) /* gpmc_ad14 */
-#define P8_17(mode) AM33XX_IOPAD(0x082c, mode) /* gpmc_ad11 */
-#define P8_18(mode) AM33XX_IOPAD(0x088c, mode) /* gpmc_clk */
-#define P8_19(mode) AM33XX_IOPAD(0x0820, mode) /* gpmc_ad8 */
-#define P8_20(mode) AM33XX_IOPAD(0x0884, mode) /* gpmc_csn2 */
-#define P8_21(mode) AM33XX_IOPAD(0x0880, mode) /* gpmc_csn1 */
-#define P8_22(mode) AM33XX_IOPAD(0x0814, mode) /* gpmc_ad5 */
-#define P8_23(mode) AM33XX_IOPAD(0x0810, mode) /* gpmc_ad4 */
-#define P8_24(mode) AM33XX_IOPAD(0x0804, mode) /* gpmc_ad1 */
-#define P8_25(mode) AM33XX_IOPAD(0x0800, mode) /* gpmc_ad0 */
-#define P8_26(mode) AM33XX_IOPAD(0x087c, mode) /* gpmc_csn0 */
-#define P8_27(mode) AM33XX_IOPAD(0x08e0, mode) /* lcd_vsync */
-#define P8_28(mode) AM33XX_IOPAD(0x08e8, mode) /* lcd_pclk */
-#define P8_29(mode) AM33XX_IOPAD(0x08e4, mode) /* lcd_hsync */
-#define P8_30(mode) AM33XX_IOPAD(0x08ec, mode) /* lcd_ac_bias_en */
-#define P8_31(mode) AM33XX_IOPAD(0x08d8, mode) /* lcd_data14 */
-#define P8_32(mode) AM33XX_IOPAD(0x08dc, mode) /* lcd_data15 */
-#define P8_33(mode) AM33XX_IOPAD(0x08d4, mode) /* lcd_data13 */
-#define P8_34(mode) AM33XX_IOPAD(0x08cc, mode) /* lcd_data11 */
-#define P8_35(mode) AM33XX_IOPAD(0x08d0, mode) /* lcd_data12 */
-#define P8_36(mode) AM33XX_IOPAD(0x08c8, mode) /* lcd_data10 */
-#define P8_37(mode) AM33XX_IOPAD(0x08c0, mode) /* lcd_data8 */
-#define P8_38(mode) AM33XX_IOPAD(0x08c4, mode) /* lcd_data9 */
-#define P8_39(mode) AM33XX_IOPAD(0x08b8, mode) /* lcd_data6 */
-#define P8_40(mode) AM33XX_IOPAD(0x08bc, mode) /* lcd_data7 */
-#define P8_41(mode) AM33XX_IOPAD(0x08b0, mode) /* lcd_data4 */
-#define P8_42(mode) AM33XX_IOPAD(0x08b4, mode) /* lcd_data5 */
-#define P8_43(mode) AM33XX_IOPAD(0x08a8, mode) /* lcd_data2 */
-#define P8_44(mode) AM33XX_IOPAD(0x08ac, mode) /* lcd_data3 */
-#define P8_45(mode) AM33XX_IOPAD(0x08a0, mode) /* lcd_data0 */
-#define P8_46(mode) AM33XX_IOPAD(0x08a4, mode) /* lcd_data1 */
-#define P9_11(mode) AM33XX_IOPAD(0x0870, mode) /* gpmc_wait0 */
-#define P9_12(mode) AM33XX_IOPAD(0x0878, mode) /* gpmc_be1n */
-#define P9_13(mode) AM33XX_IOPAD(0x0874, mode) /* gpmc_wpn */
-#define P9_14(mode) AM33XX_IOPAD(0x0848, mode) /* gpmc_a2 */
-#define P9_15(mode) AM33XX_IOPAD(0x0840, mode) /* gpmc_a0 */
-#define P9_16(mode) AM33XX_IOPAD(0x084c, mode) /* gpmc_a3 */
-#define P9_17(mode) AM33XX_IOPAD(0x095c, mode) /* spi0_cs0 */
-#define P9_18(mode) AM33XX_IOPAD(0x0958, mode) /* spi0_d1 */
-#define P9_19(mode) AM33XX_IOPAD(0x097c, mode) /* uart1_rtsn */
-#define P9_20(mode) AM33XX_IOPAD(0x0978, mode) /* uart1_ctsn */
-#define P9_21(mode) AM33XX_IOPAD(0x0954, mode) /* spi0_d0 */
-#define P9_22(mode) AM33XX_IOPAD(0x0950, mode) /* spi0_sclk */
-#define P9_23(mode) AM33XX_IOPAD(0x0844, mode) /* gpmc_a1 */
-#define P9_24(mode) AM33XX_IOPAD(0x0984, mode) /* uart1_txd */
-#define P9_25(mode) AM33XX_IOPAD(0x09ac, mode) /* mcasp0_ahclkx */
-#define P9_26(mode) AM33XX_IOPAD(0x0980, mode) /* uart1_rxd */
-#define P9_27(mode) AM33XX_IOPAD(0x09a4, mode) /* mcasp0_fsr */
-#define P9_28(mode) AM33XX_IOPAD(0x099c, mode) /* mcasp0_ahclkr */
-#define P9_29(mode) AM33XX_IOPAD(0x0994, mode) /* mcasp0_fsx */
-#define P9_30(mode) AM33XX_IOPAD(0x0998, mode) /* mcasp0_axr0 */
-#define P9_31(mode) AM33XX_IOPAD(0x0990, mode) /* mcasp0_aclkx */
-#define P9_41A(mode) AM33XX_IOPAD(0x09b4, mode) /* xdma_event_intr1 */
-#define P9_41B(mode) AM33XX_IOPAD(0x09a8, mode) /* mcasp0_axr1 */
-#define P9_42A(mode) AM33XX_IOPAD(0x0964, mode) /* P0_in_PWM0_out */
-#define P9_42B(mode) AM33XX_IOPAD(0x09a0, mode) /* mcasp0_aclkr */
-
-#endif
\ No newline at end of file
diff --git a/include/dt-bindings/board/am335x-bone-pins.h b/include/dt-bindings/board/am335x-bone-pins.h
new file mode 100644
index 00000000..d67972d9
--- /dev/null
+++ b/include/dt-bindings/board/am335x-bone-pins.h
@@ -0,0 +1,86 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * This program is free software you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _DT_BINDINGS_BOARD_AM335X_BBB_PINS_H
+#define _DT_BINDINGS_BOARD_AM335X_BBB_PINS_H
+
+#define P8_03(mode) AM33XX_IOPAD(0x0818, mode) /* R9: gpmc_ad6 */
+#define P8_04(mode) AM33XX_IOPAD(0x081c, mode) /* T9: gpmc_ad7 */
+#define P8_05(mode) AM33XX_IOPAD(0x0808, mode) /* R8: gpmc_ad2 */
+#define P8_06(mode) AM33XX_IOPAD(0x080c, mode) /* T8: gpmc_ad3 */
+#define P8_07(mode) AM33XX_IOPAD(0x0890, mode) /* R7: gpmc_advn_ale */
+#define P8_08(mode) AM33XX_IOPAD(0x0894, mode) /* T7: gpmc_oen_ren */
+#define P8_09(mode) AM33XX_IOPAD(0x089c, mode) /* T6: gpmc_be0n_cle */
+#define P8_10(mode) AM33XX_IOPAD(0x0898, mode) /* U6: gpmc_wen */
+#define P8_11(mode) AM33XX_IOPAD(0x0834, mode) /* R12: gpmc_ad13 */
+#define P8_12(mode) AM33XX_IOPAD(0x0830, mode) /* T12: gpmc_ad12 */
+#define P8_13(mode) AM33XX_IOPAD(0x0824, mode) /* T10: gpmc_ad9 */
+#define P8_14(mode) AM33XX_IOPAD(0x0828, mode) /* T11: gpmc_ad10 */
+#define P8_15(mode) AM33XX_IOPAD(0x083c, mode) /* U13: gpmc_ad15 */
+#define P8_16(mode) AM33XX_IOPAD(0x0838, mode) /* V13: gpmc_ad14 */
+#define P8_17(mode) AM33XX_IOPAD(0x082c, mode) /* U12: gpmc_ad11 */
+#define P8_18(mode) AM33XX_IOPAD(0x088c, mode) /* V12: gpmc_clk */
+#define P8_19(mode) AM33XX_IOPAD(0x0820, mode) /* U10: gpmc_ad8 */
+#define P8_20(mode) AM33XX_IOPAD(0x0884, mode) /* V9: gpmc_csn2 */
+#define P8_21(mode) AM33XX_IOPAD(0x0880, mode) /* U9: gpmc_csn1 */
+#define P8_22(mode) AM33XX_IOPAD(0x0814, mode) /* V8: gpmc_ad5 */
+#define P8_23(mode) AM33XX_IOPAD(0x0810, mode) /* U8: gpmc_ad4 */
+#define P8_24(mode) AM33XX_IOPAD(0x0804, mode) /* V7: gpmc_ad1 */
+#define P8_25(mode) AM33XX_IOPAD(0x0800, mode) /* U7: gpmc_ad0 */
+#define P8_26(mode) AM33XX_IOPAD(0x087c, mode) /* V6: gpmc_csn0 */
+#define P8_27(mode) AM33XX_IOPAD(0x08e0, mode) /* U5: lcd_vsync */
+#define P8_28(mode) AM33XX_IOPAD(0x08e8, mode) /* V5: lcd_pclk */
+#define P8_29(mode) AM33XX_IOPAD(0x08e4, mode) /* R5: lcd_hsync */
+#define P8_30(mode) AM33XX_IOPAD(0x08ec, mode) /* R6: lcd_ac_bias_en */
+#define P8_31(mode) AM33XX_IOPAD(0x08d8, mode) /* V4: lcd_data14 */
+#define P8_32(mode) AM33XX_IOPAD(0x08dc, mode) /* T5: lcd_data15 */
+#define P8_33(mode) AM33XX_IOPAD(0x08d4, mode) /* V3: lcd_data13 */
+#define P8_34(mode) AM33XX_IOPAD(0x08cc, mode) /* U4: lcd_data11 */
+#define P8_35(mode) AM33XX_IOPAD(0x08d0, mode) /* V2: lcd_data12 */
+#define P8_36(mode) AM33XX_IOPAD(0x08c8, mode) /* U3: lcd_data10 */
+#define P8_37(mode) AM33XX_IOPAD(0x08c0, mode) /* U1: lcd_data8 */
+#define P8_38(mode) AM33XX_IOPAD(0x08c4, mode) /* U2: lcd_data9 */
+#define P8_39(mode) AM33XX_IOPAD(0x08b8, mode) /* T3: lcd_data6 */
+#define P8_40(mode) AM33XX_IOPAD(0x08bc, mode) /* T4: lcd_data7 */
+#define P8_41(mode) AM33XX_IOPAD(0x08b0, mode) /* T1: lcd_data4 */
+#define P8_42(mode) AM33XX_IOPAD(0x08b4, mode) /* T2: lcd_data5 */
+#define P8_43(mode) AM33XX_IOPAD(0x08a8, mode) /* R3: lcd_data2 */
+#define P8_44(mode) AM33XX_IOPAD(0x08ac, mode) /* R4: lcd_data3 */
+#define P8_45(mode) AM33XX_IOPAD(0x08a0, mode) /* R1: lcd_data0 */
+#define P8_46(mode) AM33XX_IOPAD(0x08a4, mode) /* R2: lcd_data1 */
+#define P9_11(mode) AM33XX_IOPAD(0x0870, mode) /* T17: gpmc_wait0 */
+#define P9_12(mode) AM33XX_IOPAD(0x0878, mode) /* U18: gpmc_be1n */
+#define P9_13(mode) AM33XX_IOPAD(0x0874, mode) /* U17: gpmc_wpn */
+#define P9_14(mode) AM33XX_IOPAD(0x0848, mode) /* U14: gpmc_a2 */
+#define P9_15(mode) AM33XX_IOPAD(0x0840, mode) /* R13: gpmc_a0 */
+#define P9_16(mode) AM33XX_IOPAD(0x084c, mode) /* T14: gpmc_a3 */
+#define P9_17(mode) AM33XX_IOPAD(0x095c, mode) /* A16: spi0_cs0 */
+#define P9_18(mode) AM33XX_IOPAD(0x0958, mode) /* B16: spi0_d1 */
+#define P9_19(mode) AM33XX_IOPAD(0x097c, mode) /* D17: uart1_rtsn */
+#define P9_20(mode) AM33XX_IOPAD(0x0978, mode) /* D18: uart1_ctsn */
+#define P9_21(mode) AM33XX_IOPAD(0x0954, mode) /* B17: spi0_d0 */
+#define P9_22(mode) AM33XX_IOPAD(0x0950, mode) /* A17: spi0_sclk */
+#define P9_23(mode) AM33XX_IOPAD(0x0844, mode) /* V14: gpmc_a1 */
+#define P9_24(mode) AM33XX_IOPAD(0x0984, mode) /* D15: uart1_txd */
+#define P9_25(mode) AM33XX_IOPAD(0x09ac, mode) /* A14: mcasp0_ahclkx */
+#define P9_26(mode) AM33XX_IOPAD(0x0980, mode) /* D16: uart1_rxd */
+#define P9_27(mode) AM33XX_IOPAD(0x09a4, mode) /* C13: mcasp0_fsr */
+#define P9_28(mode) AM33XX_IOPAD(0x099c, mode) /* C12: mcasp0_ahclkr */
+#define P9_29(mode) AM33XX_IOPAD(0x0994, mode) /* B13: mcasp0_fsx */
+#define P9_30(mode) AM33XX_IOPAD(0x0998, mode) /* D12: mcasp0_axr0 */
+#define P9_31(mode) AM33XX_IOPAD(0x0990, mode) /* A13: mcasp0_aclkx */
+#define P9_41(mode) AM33XX_IOPAD(0x09b4, mode) /* D14: xdma_event_intr1 */
+#define P9_41A(mode) AM33XX_IOPAD(0x09b4, mode) /* D14: xdma_event_intr1 */
+#define P9_41B(mode) AM33XX_IOPAD(0x09a8, mode) /* D13: mcasp0_axr1 */
+#define P9_91(mode) AM33XX_IOPAD(0x09a8, mode) /* D13: mcasp0_axr1 */
+#define P9_42(mode) AM33XX_IOPAD(0x0964, mode) /* C18: P0_in_PWM0_out */
+#define P9_42A(mode) AM33XX_IOPAD(0x0964, mode) /* C18: P0_in_PWM0_out */
+#define P9_42B(mode) AM33XX_IOPAD(0x09a0, mode) /* B12: mcasp0_aclkr */
+#define P9_92(mode) AM33XX_IOPAD(0x09a0, mode) /* B12: mcasp0_aclkr */
+
+#endif
\ No newline at end of file
--
GitLab
From 9982683afba30e3d68f39235dc0d096adff2fcda Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Mon, 20 Jul 2020 10:55:11 +0530
Subject: [PATCH 41/86] BBB: use pinmux macros
---
src/arm/am335x-bone-common-univ.dtsi | 1020 ++++++++++++++------------
1 file changed, 531 insertions(+), 489 deletions(-)
diff --git a/src/arm/am335x-bone-common-univ.dtsi b/src/arm/am335x-bone-common-univ.dtsi
index c0f5bf58..cd6ddc48 100644
--- a/src/arm/am335x-bone-common-univ.dtsi
+++ b/src/arm/am335x-bone-common-univ.dtsi
@@ -3,6 +3,8 @@
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*/
+#include <dt-bindings/board/am335x-bone-pins.h>
+
&am33xx_pinmux {
/************************/
/* P8 Header */
@@ -15,659 +17,699 @@
/* P8_03 (ZCZ ball R9) emmc */
P8_03_default_pin: pinmux_P8_03_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
P8_03_gpio_pin: pinmux_P8_03_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0818, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
P8_03_gpio_pu_pin: pinmux_P8_03_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
P8_03_gpio_pd_pin: pinmux_P8_03_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
P8_03_gpio_input_pin: pinmux_P8_03_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0818, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
/* P8_04 (ZCZ ball T9) emmc */
P8_04_default_pin: pinmux_P8_04_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
P8_04_gpio_pin: pinmux_P8_04_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x081c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
P8_04_gpio_pu_pin: pinmux_P8_04_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
P8_04_gpio_pd_pin: pinmux_P8_04_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
P8_04_gpio_input_pin: pinmux_P8_04_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x081c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
/* P8_05 (ZCZ ball R8) emmc */
P8_05_default_pin: pinmux_P8_05_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
P8_05_gpio_pin: pinmux_P8_05_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0808, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
P8_05_gpio_pu_pin: pinmux_P8_05_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
P8_05_gpio_pd_pin: pinmux_P8_05_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
P8_05_gpio_input_pin: pinmux_P8_05_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0808, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
/* P8_06 (ZCZ ball T8) emmc */
P8_06_default_pin: pinmux_P8_06_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
P8_06_gpio_pin: pinmux_P8_06_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x080c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
P8_06_gpio_pu_pin: pinmux_P8_06_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
P8_06_gpio_pd_pin: pinmux_P8_06_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
P8_06_gpio_input_pin: pinmux_P8_06_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x080c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
/* P8_07 (ZCZ ball R7) gpio2_2 */
P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
P8_07_gpio_pin: pinmux_P8_07_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0890, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
P8_07_gpio_pd_pin: pinmux_P8_07_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
P8_07_gpio_input_pin: pinmux_P8_07_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0890, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
P8_07_timer_pin: pinmux_P8_07_timer_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_advn_ale.timer4 */
+ P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_advn_ale.timer4 */
/* P8_08 (ZCZ ball T7) gpio2_3 */
P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
P8_08_gpio_pin: pinmux_P8_08_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0894, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
P8_08_gpio_input_pin: pinmux_P8_08_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0894, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
P8_08_timer_pin: pinmux_P8_08_timer_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_oen_ren.timer7 */
+ P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_oen_ren.timer7 */
/* P8_09 (ZCZ ball T6) gpio2_5 */
P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
P8_09_gpio_pin: pinmux_P8_09_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x089c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
P8_09_gpio_pd_pin: pinmux_P8_09_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
P8_09_gpio_input_pin: pinmux_P8_09_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x089c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
P8_09_timer_pin: pinmux_P8_09_timer_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_be0n_cle.timer5 */
+ P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_be0n_cle.timer5 */
/* P8_10 (ZCZ ball U6) gpio2_4 */
P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
P8_10_gpio_pin: pinmux_P8_10_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0898, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
P8_10_gpio_pd_pin: pinmux_P8_10_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
P8_10_gpio_input_pin: pinmux_P8_10_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0898, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
P8_10_timer_pin: pinmux_P8_10_timer_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_wen.timer6 */
+ P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_wen.timer6 */
/* P8_11 (ZCZ ball R12) gpio1_13 */
P8_11_default_pin: pinmux_P8_11_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
P8_11_gpio_pin: pinmux_P8_11_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0834, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
P8_11_gpio_pu_pin: pinmux_P8_11_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
P8_11_gpio_pd_pin: pinmux_P8_11_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
P8_11_gpio_input_pin: pinmux_P8_11_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0834, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
P8_11_qep_pin: pinmux_P8_11_qep_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad13.eqep2b_in */
+ P8_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad13.eqep2b_in */
P8_11_pruout_pin: pinmux_P8_11_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad13.pru0_out15 */
+ P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad13.pru0_out15 */
/* P8_12 (ZCZ ball T12) gpio1_12 */
P8_12_default_pin: pinmux_P8_12_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
P8_12_gpio_pin: pinmux_P8_12_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0830, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
P8_12_gpio_pu_pin: pinmux_P8_12_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
P8_12_gpio_pd_pin: pinmux_P8_12_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
P8_12_gpio_input_pin: pinmux_P8_12_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0830, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
P8_12_qep_pin: pinmux_P8_12_qep_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad12.eqep2a_in */
+ P8_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad12.eqep2a_in */
P8_12_pruout_pin: pinmux_P8_12_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad12.pru0_out14 */
+ P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad12.pru0_out14 */
/* P8_13 (ZCZ ball T10) gpio0_23 */
P8_13_default_pin: pinmux_P8_13_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
P8_13_gpio_pin: pinmux_P8_13_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0824, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
P8_13_gpio_pu_pin: pinmux_P8_13_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
P8_13_gpio_pd_pin: pinmux_P8_13_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
P8_13_gpio_input_pin: pinmux_P8_13_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0824, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
P8_13_pwm_pin: pinmux_P8_13_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad9.ehrpwm2b */
+ P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad9.ehrpwm2b */
/* P8_14 (ZCZ ball T11) gpio0_26 */
P8_14_default_pin: pinmux_P8_14_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
P8_14_gpio_pin: pinmux_P8_14_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0828, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P8_14( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
P8_14_gpio_pu_pin: pinmux_P8_14_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P8_14( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
P8_14_gpio_pd_pin: pinmux_P8_14_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
P8_14_gpio_input_pin: pinmux_P8_14_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0828, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P8_14( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
P8_14_pwm_pin: pinmux_P8_14_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad10.ehrpwm2_tripzone_input */
+ P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad10.ehrpwm2_tripzone_input */
/* P8_15 (ZCZ ball U13) gpio1_15 */
P8_15_default_pin: pinmux_P8_15_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
P8_15_gpio_pin: pinmux_P8_15_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x083c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
P8_15_gpio_input_pin: pinmux_P8_15_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
P8_15_qep_pin: pinmux_P8_15_qep_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad15.eqep2_strobe */
+ P8_15( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad15.eqep2_strobe */
P8_15_pru_ecap_pin: pinmux_P8_15_pru_ecap_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_ad15.pr1_ecap0_ecap_capin_apwm_o */
+ P8_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_ad15.pr1_ecap0_ecap_capin_apwm_o */
P8_15_pruin_pin: pinmux_P8_15_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad15.pru0_in15 */
+ P8_15( PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad15.pru0_in15 */
/* P8_16 (ZCZ ball V13) gpio1_14 */
P8_16_default_pin: pinmux_P8_16_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
P8_16_gpio_pin: pinmux_P8_16_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0838, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
P8_16_gpio_pu_pin: pinmux_P8_16_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
P8_16_gpio_pd_pin: pinmux_P8_16_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
P8_16_gpio_input_pin: pinmux_P8_16_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
P8_16_qep_pin: pinmux_P8_16_qep_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad14.eqep2_index */
+ P8_16( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad14.eqep2_index */
P8_16_pruin_pin: pinmux_P8_16_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad14.pru0_in14 */
+ P8_16( PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad14.pru0_in14 */
/* P8_17 (ZCZ ball U12) gpio0_27 */
P8_17_default_pin: pinmux_P8_17_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P8_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
P8_17_gpio_pin: pinmux_P8_17_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x082c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P8_17( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
P8_17_gpio_pu_pin: pinmux_P8_17_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P8_17( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
P8_17_gpio_pd_pin: pinmux_P8_17_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P8_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
P8_17_gpio_input_pin: pinmux_P8_17_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x082c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P8_17( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
P8_17_pwm_pin: pinmux_P8_17_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad11.ehrpwm0_synco */
+ P8_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad11.ehrpwm0_synco */
/* P8_18 (ZCZ ball V12) gpio2_1 */
P8_18_default_pin: pinmux_P8_18_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
P8_18_gpio_pin: pinmux_P8_18_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x088c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
P8_18_gpio_pu_pin: pinmux_P8_18_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
P8_18_gpio_pd_pin: pinmux_P8_18_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
P8_18_gpio_input_pin: pinmux_P8_18_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x088c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
/* P8_19 (ZCZ ball U10) gpio0_22 */
P8_19_default_pin: pinmux_P8_19_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
P8_19_gpio_pin: pinmux_P8_19_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0820, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
P8_19_gpio_pu_pin: pinmux_P8_19_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
P8_19_gpio_pd_pin: pinmux_P8_19_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
P8_19_gpio_input_pin: pinmux_P8_19_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0820, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
P8_19_pwm_pin: pinmux_P8_19_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad8.ehrpwm2a */
+ P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad8.ehrpwm2a */
/* P8_20 (ZCZ ball V9) emmc */
P8_20_default_pin: pinmux_P8_20_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
P8_20_gpio_pin: pinmux_P8_20_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0884, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
P8_20_gpio_pu_pin: pinmux_P8_20_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
P8_20_gpio_pd_pin: pinmux_P8_20_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
P8_20_gpio_input_pin: pinmux_P8_20_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0884, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
P8_20_pruout_pin: pinmux_P8_20_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_csn2.pru1_out13 */
+ P8_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_csn2.pru1_out13 */
P8_20_pruin_pin: pinmux_P8_20_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0884, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_csn2.pru1_in13 */
+ P8_20( PIN_INPUT | MUX_MODE6) >; }; /* gpmc_csn2.pru1_in13 */
/* P8_21 (ZCZ ball U9) emmc */
P8_21_default_pin: pinmux_P8_21_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
P8_21_gpio_pin: pinmux_P8_21_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0880, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
P8_21_gpio_pu_pin: pinmux_P8_21_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
P8_21_gpio_pd_pin: pinmux_P8_21_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
P8_21_gpio_input_pin: pinmux_P8_21_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0880, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
P8_21_pruout_pin: pinmux_P8_21_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_csn1.pru1_out12 */
+ P8_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_csn1.pru1_out12 */
P8_21_pruin_pin: pinmux_P8_21_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0880, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_csn1.pru1_in12 */
+ P8_21( PIN_INPUT | MUX_MODE6) >; }; /* gpmc_csn1.pru1_in12 */
/* P8_22 (ZCZ ball V8) emmc */
P8_22_default_pin: pinmux_P8_22_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
P8_22_gpio_pin: pinmux_P8_22_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0814, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
P8_22_gpio_pu_pin: pinmux_P8_22_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
P8_22_gpio_pd_pin: pinmux_P8_22_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
P8_22_gpio_input_pin: pinmux_P8_22_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0814, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
/* P8_23 (ZCZ ball U8) emmc */
P8_23_default_pin: pinmux_P8_23_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
P8_23_gpio_pin: pinmux_P8_23_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0810, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
P8_23_gpio_pu_pin: pinmux_P8_23_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
P8_23_gpio_pd_pin: pinmux_P8_23_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
P8_23_gpio_input_pin: pinmux_P8_23_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0810, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
/* P8_24 (ZCZ ball V7) emmc */
P8_24_default_pin: pinmux_P8_24_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
P8_24_gpio_pin: pinmux_P8_24_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0804, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
P8_24_gpio_pu_pin: pinmux_P8_24_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
P8_24_gpio_pd_pin: pinmux_P8_24_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
P8_24_gpio_input_pin: pinmux_P8_24_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0804, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
/* P8_25 (ZCZ ball U7) emmc */
P8_25_default_pin: pinmux_P8_25_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
P8_25_gpio_pin: pinmux_P8_25_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0800, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
P8_25_gpio_pu_pin: pinmux_P8_25_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
P8_25_gpio_pd_pin: pinmux_P8_25_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
P8_25_gpio_input_pin: pinmux_P8_25_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0800, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
/* P8_26 (ZCZ ball V6) gpio1_29 */
P8_26_default_pin: pinmux_P8_26_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x087c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
+ P8_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
P8_26_gpio_pin: pinmux_P8_26_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x087c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
+ P8_26( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
P8_26_gpio_pu_pin: pinmux_P8_26_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x087c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
+ P8_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
P8_26_gpio_pd_pin: pinmux_P8_26_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x087c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
+ P8_26( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
P8_26_gpio_input_pin: pinmux_P8_26_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x087c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
+ P8_26( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
/* P8_27 (ZCZ ball U5) hdmi */
P8_27_default_pin: pinmux_P8_27_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
P8_27_gpio_pin: pinmux_P8_27_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
P8_27_gpio_pu_pin: pinmux_P8_27_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
P8_27_gpio_pd_pin: pinmux_P8_27_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
P8_27_gpio_input_pin: pinmux_P8_27_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27( PIN_INPUT | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
P8_27_pruout_pin: pinmux_P8_27_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_vsync.pru1_out8 */
+ P8_27( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_vsync.pru1_out8 */
P8_27_pruin_pin: pinmux_P8_27_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_vsync.pru1_in8 */
+ P8_27( PIN_INPUT | MUX_MODE6) >; }; /* lcd_vsync.pru1_in8 */
+ P8_27_lcd_pin: pinmux_P8_27_lcd_pin { pinctrl-single,pins = <
+ P8_27( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_vsync.lcd_vsync */
/* P8_28 (ZCZ ball V5) hdmi */
P8_28_default_pin: pinmux_P8_28_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
P8_28_gpio_pin: pinmux_P8_28_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
P8_28_gpio_pu_pin: pinmux_P8_28_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
P8_28_gpio_pd_pin: pinmux_P8_28_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
P8_28_gpio_input_pin: pinmux_P8_28_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28( PIN_INPUT | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
P8_28_pruout_pin: pinmux_P8_28_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_pclk.pru1_out10 */
+ P8_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_pclk.pru1_out10 */
P8_28_pruin_pin: pinmux_P8_28_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_pclk.pru1_in10 */
+ P8_28( PIN_INPUT | MUX_MODE6) >; }; /* lcd_pclk.pru1_in10 */
+ P8_28_lcd_pin: pinmux_P8_28_lcd_pin { pinctrl-single,pins = <
+ P8_28( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_pclk.lcd_pclk */
/* P8_29 (ZCZ ball R5) hdmi */
P8_29_default_pin: pinmux_P8_29_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
P8_29_gpio_pin: pinmux_P8_29_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
P8_29_gpio_pu_pin: pinmux_P8_29_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
P8_29_gpio_pd_pin: pinmux_P8_29_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
P8_29_gpio_input_pin: pinmux_P8_29_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29( PIN_INPUT | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
P8_29_pruout_pin: pinmux_P8_29_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_hsync.pru1_out9 */
+ P8_29( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_hsync.pru1_out9 */
P8_29_pruin_pin: pinmux_P8_29_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_hsync.pru1_in9 */
+ P8_29( PIN_INPUT | MUX_MODE6) >; }; /* lcd_hsync.pru1_in9 */
+ P8_29_lcd_pin: pinmux_P8_29_lcd_pin { pinctrl-single,pins = <
+ P8_29( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_hsync.lcd_hsync */
/* P8_30 (ZCZ ball R6) hdmi */
P8_30_default_pin: pinmux_P8_30_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
P8_30_gpio_pin: pinmux_P8_30_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08ec, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
P8_30_gpio_pu_pin: pinmux_P8_30_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
P8_30_gpio_pd_pin: pinmux_P8_30_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
P8_30_gpio_input_pin: pinmux_P8_30_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30( PIN_INPUT | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
P8_30_pruout_pin: pinmux_P8_30_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_ac_bias_en.pru1_out11 */
+ P8_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_ac_bias_en.pru1_out11 */
P8_30_pruin_pin: pinmux_P8_30_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE6) >; }; /* lcd_ac_bias_en.pru1_in11 */
+ P8_30( PIN_INPUT | MUX_MODE6) >; }; /* lcd_ac_bias_en.pru1_in11 */
+ P8_30_lcd_pin: pinmux_P8_30_lcd_pin { pinctrl-single,pins = <
+ P8_30( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_ac_bias_en.lcd_ac_bias_en */
/* P8_31 (ZCZ ball V4) hdmi */
P8_31_default_pin: pinmux_P8_31_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
P8_31_gpio_pin: pinmux_P8_31_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08d8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
P8_31_gpio_pu_pin: pinmux_P8_31_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
P8_31_gpio_pd_pin: pinmux_P8_31_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
P8_31_gpio_input_pin: pinmux_P8_31_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08d8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31( PIN_INPUT | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
P8_31_qep_pin: pinmux_P8_31_qep_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data14.eqep1_index */
+ P8_31( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data14.eqep1_index */
P8_31_uart_pin: pinmux_P8_31_uart_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data14.uart5_rxd */
+ P8_31( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data14.uart5_rxd */
+ P8_31_lcd_pin: pinmux_P8_31_lcd_pin { pinctrl-single,pins = <
+ P8_31( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_data14.lcd_data14 */
/* P8_32 (ZCZ ball T5) hdmi */
P8_32_default_pin: pinmux_P8_32_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
P8_32_gpio_pin: pinmux_P8_32_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08dc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
P8_32_gpio_pu_pin: pinmux_P8_32_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
P8_32_gpio_pd_pin: pinmux_P8_32_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
P8_32_gpio_input_pin: pinmux_P8_32_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08dc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32( PIN_INPUT | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
P8_32_qep_pin: pinmux_P8_32_qep_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data15.eqep1_strobe */
+ P8_32( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data15.eqep1_strobe */
+ P8_32_lcd_pin: pinmux_P8_32_lcd_pin { pinctrl-single,pins = <
+ P8_32( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_data15.lcd_data15 */
/* P8_33 (ZCZ ball V3) hdmi */
P8_33_default_pin: pinmux_P8_33_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
P8_33_gpio_pin: pinmux_P8_33_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08d4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
P8_33_gpio_pu_pin: pinmux_P8_33_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
P8_33_gpio_pd_pin: pinmux_P8_33_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
P8_33_gpio_input_pin: pinmux_P8_33_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08d4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33( PIN_INPUT | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
P8_33_qep_pin: pinmux_P8_33_qep_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data13.eqep1b_in */
+ P8_33( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data13.eqep1b_in */
+ P8_33_lcd_pin: pinmux_P8_33_lcd_pin { pinctrl-single,pins = <
+ P8_33( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_data13.lcd_data13 */
/* P8_34 (ZCZ ball U4) hdmi */
P8_34_default_pin: pinmux_P8_34_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
P8_34_gpio_pin: pinmux_P8_34_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08cc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
P8_34_gpio_pu_pin: pinmux_P8_34_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
P8_34_gpio_pd_pin: pinmux_P8_34_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
P8_34_gpio_input_pin: pinmux_P8_34_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08cc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34( PIN_INPUT | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
P8_34_pwm_pin: pinmux_P8_34_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data11.ehrpwm1b */
+ P8_34( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data11.ehrpwm1b */
+ P8_34_lcd_pin: pinmux_P8_34_lcd_pin { pinctrl-single,pins = <
+ P8_34( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_data11.lcd_data11 */
/* P8_35 (ZCZ ball V2) hdmi */
P8_35_default_pin: pinmux_P8_35_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
P8_35_gpio_pin: pinmux_P8_35_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08d0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
P8_35_gpio_pu_pin: pinmux_P8_35_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
P8_35_gpio_pd_pin: pinmux_P8_35_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
P8_35_gpio_input_pin: pinmux_P8_35_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08d0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35( PIN_INPUT | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
P8_35_qep_pin: pinmux_P8_35_qep_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data12.eqep1a_in */
+ P8_35( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data12.eqep1a_in */
+ P8_35_lcd_pin: pinmux_P8_35_lcd_pin { pinctrl-single,pins = <
+ P8_35( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_data12.eqep1a_in */
/* P8_36 (ZCZ ball U3) hdmi */
P8_36_default_pin: pinmux_P8_36_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
P8_36_gpio_pin: pinmux_P8_36_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
P8_36_gpio_pu_pin: pinmux_P8_36_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
P8_36_gpio_pd_pin: pinmux_P8_36_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
P8_36_gpio_input_pin: pinmux_P8_36_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36( PIN_INPUT | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
P8_36_pwm_pin: pinmux_P8_36_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data10.ehrpwm1a */
+ P8_36( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data10.ehrpwm1a */
+ P8_36_lcd_pin: pinmux_P8_36_lcd_pin { pinctrl-single,pins = <
+ P8_36( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_data10.lcd_data10 */
/* P8_37 (ZCZ ball U1) hdmi */
P8_37_default_pin: pinmux_P8_37_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
P8_37_gpio_pin: pinmux_P8_37_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
P8_37_gpio_pu_pin: pinmux_P8_37_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
P8_37_gpio_pd_pin: pinmux_P8_37_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
P8_37_gpio_input_pin: pinmux_P8_37_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37( PIN_INPUT | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
P8_37_pwm_pin: pinmux_P8_37_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data8.ehrpwm1_tripzone_input */
+ P8_37( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data8.ehrpwm1_tripzone_input */
P8_37_uart_pin: pinmux_P8_37_uart_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data8.uart5_txd */
+ P8_37( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data8.uart5_txd */
+ P8_37_lcd_pin: pinmux_P8_37_lcd_pin { pinctrl-single,pins = <
+ P8_37( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_data8.lcd_data8 */
/* P8_38 (ZCZ ball U2) hdmi */
P8_38_default_pin: pinmux_P8_38_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
P8_38_gpio_pin: pinmux_P8_38_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
P8_38_gpio_pu_pin: pinmux_P8_38_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
P8_38_gpio_pd_pin: pinmux_P8_38_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
P8_38_gpio_input_pin: pinmux_P8_38_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38( PIN_INPUT | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
P8_38_pwm_pin: pinmux_P8_38_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data9.ehrpwm0_synco */
+ P8_38( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data9.ehrpwm0_synco */
P8_38_uart_pin: pinmux_P8_38_uart_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data9.uart5_rxd */
+ P8_38( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data9.uart5_rxd */
+ P8_38_lcd_pin: pinmux_P8_38_lcd_pin { pinctrl-single,pins = <
+ P8_38( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_data9.lcd_data9 */
/* P8_39 (ZCZ ball T3) hdmi */
P8_39_default_pin: pinmux_P8_39_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
P8_39_gpio_pin: pinmux_P8_39_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
P8_39_gpio_pu_pin: pinmux_P8_39_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
P8_39_gpio_pd_pin: pinmux_P8_39_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
P8_39_gpio_input_pin: pinmux_P8_39_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39( PIN_INPUT | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
P8_39_qep_pin: pinmux_P8_39_qep_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data6.eqep2_index */
+ P8_39( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data6.eqep2_index */
P8_39_pruout_pin: pinmux_P8_39_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data6.pru1_out6 */
+ P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data6.pru1_out6 */
P8_39_pruin_pin: pinmux_P8_39_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data6.pru1_in6 */
+ P8_39( PIN_INPUT | MUX_MODE6) >; }; /* lcd_data6.pru1_in6 */
+ P8_39_lcd_pin: pinmux_P8_39_lcd_pin { pinctrl-single,pins = <
+ P8_39( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_data6.lcd_data6 */
/* P8_40 (ZCZ ball T4) hdmi */
P8_40_default_pin: pinmux_P8_40_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
P8_40_gpio_pin: pinmux_P8_40_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08bc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
P8_40_gpio_pu_pin: pinmux_P8_40_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
P8_40_gpio_pd_pin: pinmux_P8_40_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
P8_40_gpio_input_pin: pinmux_P8_40_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08bc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40( PIN_INPUT | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
P8_40_qep_pin: pinmux_P8_40_qep_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data7.eqep2_strobe */
+ P8_40( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data7.eqep2_strobe */
P8_40_pruout_pin: pinmux_P8_40_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data7.pru1_out7 */
+ P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data7.pru1_out7 */
P8_40_pruin_pin: pinmux_P8_40_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08bc, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data7.pru1_in7 */
+ P8_40( PIN_INPUT | MUX_MODE6) >; }; /* lcd_data7.pru1_in7 */
+ P8_40_lcd_pin: pinmux_P8_40_lcd_pin { pinctrl-single,pins = <
+ P8_40( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_data7.lcd_data7 */
/* P8_41 (ZCZ ball T1) hdmi */
P8_41_default_pin: pinmux_P8_41_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
P8_41_gpio_pin: pinmux_P8_41_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
P8_41_gpio_pu_pin: pinmux_P8_41_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
P8_41_gpio_pd_pin: pinmux_P8_41_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
P8_41_gpio_input_pin: pinmux_P8_41_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41( PIN_INPUT | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
P8_41_qep_pin: pinmux_P8_41_qep_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data4.eqep2a_in */
+ P8_41( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data4.eqep2a_in */
P8_41_pruout_pin: pinmux_P8_41_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data4.pru1_out4 */
+ P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data4.pru1_out4 */
P8_41_pruin_pin: pinmux_P8_41_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data4.pru1_in4 */
+ P8_41( PIN_INPUT | MUX_MODE6) >; }; /* lcd_data4.pru1_in4 */
+ P8_41_lcd_pin: pinmux_P8_41_lcd_pin { pinctrl-single,pins = <
+ P8_41( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_data4.lcd_data4 */
/* P8_42 (ZCZ ball T2) hdmi */
P8_42_default_pin: pinmux_P8_42_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
P8_42_gpio_pin: pinmux_P8_42_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
P8_42_gpio_pu_pin: pinmux_P8_42_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
P8_42_gpio_pd_pin: pinmux_P8_42_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
P8_42_gpio_input_pin: pinmux_P8_42_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42( PIN_INPUT | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
P8_42_qep_pin: pinmux_P8_42_qep_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data5.eqep2b_in */
+ P8_42( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data5.eqep2b_in */
P8_42_pruout_pin: pinmux_P8_42_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data5.pru1_out5 */
+ P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data5.pru1_out5 */
P8_42_pruin_pin: pinmux_P8_42_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08b4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data5.pru1_in5 */
+ P8_42( PIN_INPUT | MUX_MODE6) >; }; /* lcd_data5.pru1_in5 */
+ P8_42_lcd_pin: pinmux_P8_42_lcd_pin { pinctrl-single,pins = <
+ P8_42( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_data5.lcd_data5 */
/* P8_43 (ZCZ ball R3) hdmi */
P8_43_default_pin: pinmux_P8_43_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
P8_43_gpio_pin: pinmux_P8_43_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
P8_43_gpio_pu_pin: pinmux_P8_43_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
P8_43_gpio_pd_pin: pinmux_P8_43_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
P8_43_gpio_input_pin: pinmux_P8_43_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43( PIN_INPUT | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
P8_43_pwm_pin: pinmux_P8_43_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data2.ehrpwm2_tripzone_input */
+ P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data2.ehrpwm2_tripzone_input */
P8_43_pruout_pin: pinmux_P8_43_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data2.pru1_out2 */
+ P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data2.pru1_out2 */
P8_43_pruin_pin: pinmux_P8_43_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data2.pru1_in2 */
+ P8_43( PIN_INPUT | MUX_MODE6) >; }; /* lcd_data2.pru1_in2 */
+ P8_43_lcd_pin: pinmux_P8_43_lcd_pin { pinctrl-single,pins = <
+ P8_43( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_data2.lcd_data2 */
/* P8_44 (ZCZ ball R4) hdmi */
P8_44_default_pin: pinmux_P8_44_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
P8_44_gpio_pin: pinmux_P8_44_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08ac, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
P8_44_gpio_pu_pin: pinmux_P8_44_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
P8_44_gpio_pd_pin: pinmux_P8_44_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
P8_44_gpio_input_pin: pinmux_P8_44_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08ac, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44( PIN_INPUT | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
P8_44_pwm_pin: pinmux_P8_44_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data3.ehrpwm0_synco */
+ P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data3.ehrpwm0_synco */
P8_44_pruout_pin: pinmux_P8_44_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data3.pru1_out3 */
+ P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data3.pru1_out3 */
P8_44_pruin_pin: pinmux_P8_44_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08ac, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data3.pru1_in3 */
+ P8_44( PIN_INPUT | MUX_MODE6) >; }; /* lcd_data3.pru1_in3 */
+ P8_44_lcd_pin: pinmux_P8_44_lcd_pin { pinctrl-single,pins = <
+ P8_44( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_data3.lcd_data3 */
/* P8_45 (ZCZ ball R1) hdmi */
P8_45_default_pin: pinmux_P8_45_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
P8_45_gpio_pin: pinmux_P8_45_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
P8_45_gpio_pu_pin: pinmux_P8_45_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
P8_45_gpio_pd_pin: pinmux_P8_45_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
P8_45_gpio_input_pin: pinmux_P8_45_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45( PIN_INPUT | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
P8_45_pwm_pin: pinmux_P8_45_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data0.ehrpwm2a */
+ P8_45( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data0.ehrpwm2a */
P8_45_pruout_pin: pinmux_P8_45_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data0.pru1_out0 */
+ P8_45( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data0.pru1_out0 */
P8_45_pruin_pin: pinmux_P8_45_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data0.pru1_in0 */
+ P8_45( PIN_INPUT | MUX_MODE6) >; }; /* lcd_data0.pru1_in0 */
+ P8_45_lcd_pin: pinmux_P8_45_lcd_pin { pinctrl-single,pins = <
+ P8_45( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_data0.lcd_data0 */
/* P8_46 (ZCZ ball R2) hdmi */
P8_46_default_pin: pinmux_P8_46_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
P8_46_gpio_pin: pinmux_P8_46_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
P8_46_gpio_pu_pin: pinmux_P8_46_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
P8_46_gpio_pd_pin: pinmux_P8_46_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
P8_46_gpio_input_pin: pinmux_P8_46_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46( PIN_INPUT | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
P8_46_pwm_pin: pinmux_P8_46_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data1.ehrpwm2b */
+ P8_46( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data1.ehrpwm2b */
P8_46_pruout_pin: pinmux_P8_46_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data1.pru1_out1 */
+ P8_46( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data1.pru1_out1 */
P8_46_pruin_pin: pinmux_P8_46_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x08a4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data1.pru1_in1 */
+ P8_46( PIN_INPUT | MUX_MODE6) >; }; /* lcd_data1.pru1_in1 */
+ P8_46_lcd_pin: pinmux_P8_46_lcd_pin { pinctrl-single,pins = <
+ P8_46( PIN_OUTPUT | MUX_MODE0) >; }; /* lcd_data1.lcd_data1 */
/************************/
/* P9 Header */
@@ -695,389 +737,389 @@
/* P9_11 (ZCZ ball T17) gpio0_30 */
P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
P9_11_gpio_pin: pinmux_P9_11_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0870, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
P9_11_gpio_input_pin: pinmux_P9_11_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0870, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
P9_11_uart_pin: pinmux_P9_11_uart_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wait0.uart4_rxd */
+ P9_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wait0.uart4_rxd */
/* P9_12 (ZCZ ball U18) gpio1_28 */
P9_12_default_pin: pinmux_P9_12_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
P9_12_gpio_pin: pinmux_P9_12_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0878, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
P9_12_gpio_pd_pin: pinmux_P9_12_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
P9_12_gpio_input_pin: pinmux_P9_12_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0878, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
/* P9_13 (ZCZ ball U17) gpio0_31 */
P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
P9_13_gpio_pin: pinmux_P9_13_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0874, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
P9_13_gpio_pd_pin: pinmux_P9_13_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
P9_13_gpio_input_pin: pinmux_P9_13_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0874, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
P9_13_uart_pin: pinmux_P9_13_uart_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wpn.uart4_txd */
+ P9_13( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wpn.uart4_txd */
/* P9_14 (ZCZ ball U14) gpio1_18 */
P9_14_default_pin: pinmux_P9_14_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
P9_14_gpio_pin: pinmux_P9_14_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0848, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
P9_14_gpio_pu_pin: pinmux_P9_14_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
P9_14_gpio_pd_pin: pinmux_P9_14_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
P9_14_gpio_input_pin: pinmux_P9_14_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0848, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
P9_14_pwm_pin: pinmux_P9_14_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a2.ehrpwm1a */
+ P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a2.ehrpwm1a */
/* P9_15 (ZCZ ball R13) gpio1_16 */
P9_15_default_pin: pinmux_P9_15_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
P9_15_gpio_pin: pinmux_P9_15_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0840, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
P9_15_gpio_pu_pin: pinmux_P9_15_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
P9_15_gpio_pd_pin: pinmux_P9_15_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
P9_15_gpio_input_pin: pinmux_P9_15_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0840, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
P9_15_pwm_pin: pinmux_P9_15_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a0.ehrpwm1_tripzone_input */
+ P9_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a0.ehrpwm1_tripzone_input */
/* P9_16 (ZCZ ball T14) gpio1_19 */
P9_16_default_pin: pinmux_P9_16_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
P9_16_gpio_pin: pinmux_P9_16_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x084c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
P9_16_gpio_pu_pin: pinmux_P9_16_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
P9_16_gpio_pd_pin: pinmux_P9_16_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
P9_16_gpio_input_pin: pinmux_P9_16_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x084c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
P9_16_pwm_pin: pinmux_P9_16_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a3.ehrpwm1b */
+ P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a3.ehrpwm1b */
/* P9_17 (ZCZ ball A16) gpio0_5 */
P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x095c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
P9_17_gpio_pd_pin: pinmux_P9_17_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
P9_17_gpio_input_pin: pinmux_P9_17_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x095c, PIN_INPUT | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17( PIN_INPUT | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
P9_17_spi_cs_pin: pinmux_P9_17_spi_cs_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_cs0.spi0_cs0 */
+ P9_17( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_cs0.spi0_cs0 */
P9_17_i2c_pin: pinmux_P9_17_i2c_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_cs0.i2c1_scl */
+ P9_17( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_cs0.i2c1_scl */
P9_17_pwm_pin: pinmux_P9_17_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_cs0.ehrpwm0_synci */
+ P9_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_cs0.ehrpwm0_synci */
P9_17_pru_uart_pin: pinmux_P9_17_pru_uart_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_cs0.pr1_uart0_txd */
+ P9_17( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_cs0.pr1_uart0_txd */
/* P9_18 (ZCZ ball B16) gpio0_4 */
P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
P9_18_gpio_pin: pinmux_P9_18_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0958, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
P9_18_gpio_pd_pin: pinmux_P9_18_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
P9_18_gpio_input_pin: pinmux_P9_18_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0958, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18( PIN_INPUT | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
P9_18_spi_pin: pinmux_P9_18_spi_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d1.spi0_d1 */
+ P9_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d1.spi0_d1 */
P9_18_i2c_pin: pinmux_P9_18_i2c_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d1.i2c1_sda */
+ P9_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d1.i2c1_sda */
P9_18_pwm_pin: pinmux_P9_18_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d1.ehrpwm0_tripzone_input */
+ P9_18( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d1.ehrpwm0_tripzone_input */
P9_18_pru_uart_pin: pinmux_P9_18_pru_uart_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d1.pr1_uart0_rxd */
+ P9_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d1.pr1_uart0_rxd */
/* P9_19 (ZCZ ball D17) i2c2_scl */
P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
+ P9_19( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
P9_19_gpio_pin: pinmux_P9_19_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x097c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
P9_19_gpio_input_pin: pinmux_P9_19_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x097c, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19( PIN_INPUT | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
P9_19_timer_pin: pinmux_P9_19_timer_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart1_rtsn.timer5 */
+ P9_19( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart1_rtsn.timer5 */
P9_19_can_pin: pinmux_P9_19_can_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x097c, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rtsn.dcan0_rx */
+ P9_19( PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rtsn.dcan0_rx */
P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
+ P9_19( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
P9_19_spi_cs_pin: pinmux_P9_19_spi_cs_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_rtsn.spi1_cs1 */
+ P9_19( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_rtsn.spi1_cs1 */
P9_19_pru_uart_pin: pinmux_P9_19_pru_uart_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rtsn.pr1_uart0_rts_n */
+ P9_19( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rtsn.pr1_uart0_rts_n */
/* P9_20 (ZCZ ball D18) i2c2_sda */
P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
+ P9_20( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
P9_20_gpio_pin: pinmux_P9_20_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0978, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
P9_20_gpio_input_pin: pinmux_P9_20_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0978, PIN_INPUT | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20( PIN_INPUT | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
P9_20_timer_pin: pinmux_P9_20_timer_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart1_ctsn.timer6 */
+ P9_20( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart1_ctsn.timer6 */
P9_20_can_pin: pinmux_P9_20_can_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_ctsn.dcan0_tx */
+ P9_20( PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_ctsn.dcan0_tx */
P9_20_i2c_pin: pinmux_P9_20_i2c_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
+ P9_20( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
P9_20_spi_cs_pin: pinmux_P9_20_spi_cs_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_ctsn.spi1_cs0 */
+ P9_20( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_ctsn.spi1_cs0 */
P9_20_pru_uart_pin: pinmux_P9_20_pru_uart_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_ctsn.pr1_uart0_cts_n */
+ P9_20( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_ctsn.pr1_uart0_cts_n */
/* P9_21 (ZCZ ball B17) gpio0_3 */
P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
P9_21_gpio_pin: pinmux_P9_21_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0954, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
P9_21_gpio_pd_pin: pinmux_P9_21_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
P9_21_gpio_input_pin: pinmux_P9_21_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0954, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21( PIN_INPUT | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
P9_21_spi_pin: pinmux_P9_21_spi_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d0.spi0_d0 */
+ P9_21( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d0.spi0_d0 */
P9_21_uart_pin: pinmux_P9_21_uart_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_d0.uart2_txd */
+ P9_21( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_d0.uart2_txd */
P9_21_i2c_pin: pinmux_P9_21_i2c_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d0.i2c2_scl */
+ P9_21( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d0.i2c2_scl */
P9_21_pwm_pin: pinmux_P9_21_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d0.ehrpwm0b */
+ P9_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d0.ehrpwm0b */
P9_21_pru_uart_pin: pinmux_P9_21_pru_uart_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d0.pr1_uart0_rts_n */
+ P9_21( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d0.pr1_uart0_rts_n */
/* P9_22 (ZCZ ball A17) gpio0_2 */
P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
P9_22_gpio_pin: pinmux_P9_22_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0950, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
P9_22_gpio_pd_pin: pinmux_P9_22_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
P9_22_gpio_input_pin: pinmux_P9_22_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0950, PIN_INPUT | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22( PIN_INPUT | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
P9_22_spi_sclk_pin: pinmux_P9_22_spi_sclk_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_sclk.spi0_sclk */
+ P9_22( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_sclk.spi0_sclk */
P9_22_uart_pin: pinmux_P9_22_uart_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_sclk.uart2_rxd */
+ P9_22( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_sclk.uart2_rxd */
P9_22_i2c_pin: pinmux_P9_22_i2c_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_sclk.i2c2_sda */
+ P9_22( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_sclk.i2c2_sda */
P9_22_pwm_pin: pinmux_P9_22_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_sclk.ehrpwm0a */
+ P9_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_sclk.ehrpwm0a */
P9_22_pru_uart_pin: pinmux_P9_22_pru_uart_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_sclk.pr1_uart0_cts_n */
+ P9_22( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_sclk.pr1_uart0_cts_n */
/* P9_23 (ZCZ ball V14) gpio1_17 */
P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
P9_23_gpio_pin: pinmux_P9_23_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0844, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
P9_23_gpio_input_pin: pinmux_P9_23_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0844, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23( PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
P9_23_pwm_pin: pinmux_P9_23_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a1.ehrpwm0_synco */
+ P9_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a1.ehrpwm0_synco */
/* P9_24 (ZCZ ball D15) gpio0_15 */
P9_24_default_pin: pinmux_P9_24_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
P9_24_gpio_pin: pinmux_P9_24_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0984, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
P9_24_gpio_pd_pin: pinmux_P9_24_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
P9_24_gpio_input_pin: pinmux_P9_24_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24( PIN_INPUT | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
P9_24_uart_pin: pinmux_P9_24_uart_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_txd.uart1_txd */
+ P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_txd.uart1_txd */
P9_24_can_pin: pinmux_P9_24_can_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0984, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_txd.dcan1_rx */
+ P9_24( PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_txd.dcan1_rx */
P9_24_i2c_pin: pinmux_P9_24_i2c_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_txd.i2c1_scl */
+ P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_txd.i2c1_scl */
P9_24_pru_uart_pin: pinmux_P9_24_pru_uart_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_txd.pr1_uart0_txd */
+ P9_24( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_txd.pr1_uart0_txd */
P9_24_pruin_pin: pinmux_P9_24_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE6) >; }; /* uart1_txd.pru0_in16 */
+ P9_24( PIN_INPUT | MUX_MODE6) >; }; /* uart1_txd.pru0_in16 */
/* P9_25 (ZCZ ball A14) audio */
P9_25_default_pin: pinmux_P9_25_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
P9_25_gpio_pin: pinmux_P9_25_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09ac, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
P9_25_gpio_pu_pin: pinmux_P9_25_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
P9_25_gpio_pd_pin: pinmux_P9_25_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
P9_25_gpio_input_pin: pinmux_P9_25_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25( PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
P9_25_qep_pin: pinmux_P9_25_qep_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkx.eqep0_strobe */
+ P9_25( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkx.eqep0_strobe */
P9_25_pruout_pin: pinmux_P9_25_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkx.pru0_out7 */
+ P9_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkx.pru0_out7 */
P9_25_pruin_pin: pinmux_P9_25_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkx.pru0_in7 */
+ P9_25( PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkx.pru0_in7 */
/* P9_26 (ZCZ ball D16) gpio0_14 */
P9_26_default_pin: pinmux_P9_26_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
P9_26_gpio_pin: pinmux_P9_26_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0980, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
P9_26_gpio_pd_pin: pinmux_P9_26_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
P9_26_gpio_input_pin: pinmux_P9_26_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26( PIN_INPUT | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
P9_26_uart_pin: pinmux_P9_26_uart_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_rxd.uart1_rxd */
+ P9_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_rxd.uart1_rxd */
P9_26_can_pin: pinmux_P9_26_can_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rxd.dcan1_tx */
+ P9_26( PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rxd.dcan1_tx */
P9_26_i2c_pin: pinmux_P9_26_i2c_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rxd.i2c1_sda */
+ P9_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rxd.i2c1_sda */
P9_26_pru_uart_pin: pinmux_P9_26_pru_uart_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rxd.pr1_uart0_rxd */
+ P9_26( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rxd.pr1_uart0_rxd */
P9_26_pruin_pin: pinmux_P9_26_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE6) >; }; /* uart1_rxd.pru1_in16 */
+ P9_26( PIN_INPUT | MUX_MODE6) >; }; /* uart1_rxd.pru1_in16 */
/* P9_27 (ZCZ ball C13) gpio3_19 */
P9_27_default_pin: pinmux_P9_27_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
P9_27_gpio_pin: pinmux_P9_27_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
P9_27_gpio_pu_pin: pinmux_P9_27_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
P9_27_gpio_pd_pin: pinmux_P9_27_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
P9_27_gpio_input_pin: pinmux_P9_27_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27( PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
P9_27_qep_pin: pinmux_P9_27_qep_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsr.eqep0b_in */
+ P9_27( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsr.eqep0b_in */
P9_27_pruout_pin: pinmux_P9_27_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsr.pru0_out5 */
+ P9_27( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsr.pru0_out5 */
P9_27_pruin_pin: pinmux_P9_27_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsr.pru0_in5 */
+ P9_27( PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsr.pru0_in5 */
/* P9_28 (ZCZ ball C12) audio */
P9_28_default_pin: pinmux_P9_28_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
P9_28_gpio_pin: pinmux_P9_28_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x099c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
P9_28_gpio_input_pin: pinmux_P9_28_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28( PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
P9_28_pwm_pin: pinmux_P9_28_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkr.ehrpwm0_synci */
+ P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkr.ehrpwm0_synci */
P9_28_spi_cs_pin: pinmux_P9_28_spi_cs_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_ahclkr.spi1_cs0 */
+ P9_28( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_ahclkr.spi1_cs0 */
P9_28_pwm2_pin: pinmux_P9_28_pwm2_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* mcasp0_ahclkr.ecap2_in_pwm2_out */
+ P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* mcasp0_ahclkr.ecap2_in_pwm2_out */
P9_28_pruout_pin: pinmux_P9_28_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkr.pru0_out3 */
+ P9_28( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkr.pru0_out3 */
P9_28_pruin_pin: pinmux_P9_28_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkr.pru0_in3 */
+ P9_28( PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkr.pru0_in3 */
/* P9_29 (ZCZ ball B13) audio */
P9_29_default_pin: pinmux_P9_29_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
P9_29_gpio_pin: pinmux_P9_29_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0994, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
P9_29_gpio_pu_pin: pinmux_P9_29_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
P9_29_gpio_pd_pin: pinmux_P9_29_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
P9_29_gpio_input_pin: pinmux_P9_29_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29( PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
P9_29_pwm_pin: pinmux_P9_29_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsx.ehrpwm0b */
+ P9_29( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsx.ehrpwm0b */
P9_29_spi_pin: pinmux_P9_29_spi_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_fsx.spi1_d0 */
+ P9_29( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_fsx.spi1_d0 */
P9_29_pruout_pin: pinmux_P9_29_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsx.pru0_out1 */
+ P9_29( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsx.pru0_out1 */
P9_29_pruin_pin: pinmux_P9_29_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsx.pru0_in1 */
+ P9_29( PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsx.pru0_in1 */
/* P9_30 (ZCZ ball D12) gpio3_16 */
P9_30_default_pin: pinmux_P9_30_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
P9_30_gpio_pin: pinmux_P9_30_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0998, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P9_30( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
P9_30_gpio_pu_pin: pinmux_P9_30_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P9_30( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
P9_30_gpio_pd_pin: pinmux_P9_30_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
P9_30_gpio_input_pin: pinmux_P9_30_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P9_30( PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
P9_30_pwm_pin: pinmux_P9_30_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr0.ehrpwm0_tripzone_input */
+ P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr0.ehrpwm0_tripzone_input */
P9_30_spi_pin: pinmux_P9_30_spi_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_axr0.spi1_d1 */
+ P9_30( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_axr0.spi1_d1 */
P9_30_pruout_pin: pinmux_P9_30_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr0.pru0_out2 */
+ P9_30( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr0.pru0_out2 */
P9_30_pruin_pin: pinmux_P9_30_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr0.pru0_in2 */
+ P9_30( PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr0.pru0_in2 */
/* P9_31 (ZCZ ball A13) audio */
P9_31_default_pin: pinmux_P9_31_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
P9_31_gpio_pin: pinmux_P9_31_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0990, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
P9_31_gpio_pu_pin: pinmux_P9_31_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
P9_31_gpio_pd_pin: pinmux_P9_31_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
P9_31_gpio_input_pin: pinmux_P9_31_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31( PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
P9_31_pwm_pin: pinmux_P9_31_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkx.ehrpwm0a */
+ P9_31( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkx.ehrpwm0a */
P9_31_spi_sclk_pin: pinmux_P9_31_spi_sclk_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_aclkx.spi1_sclk */
+ P9_31( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_aclkx.spi1_sclk */
P9_31_pruout_pin: pinmux_P9_31_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkx.pru0_out0 */
+ P9_31( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkx.pru0_out0 */
P9_31_pruin_pin: pinmux_P9_31_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkx.pru0_in0 */
+ P9_31( PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkx.pru0_in0 */
/* P9_32 VADC */
@@ -1099,79 +1141,79 @@
/* P9_41 (ZCZ ball D14) gpio0_20 */
P9_41_default_pin: pinmux_P9_41_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
P9_41_gpio_pin: pinmux_P9_41_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09b4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
P9_41_gpio_pu_pin: pinmux_P9_41_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
P9_41_gpio_pd_pin: pinmux_P9_41_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
P9_41_gpio_input_pin: pinmux_P9_41_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41( PIN_INPUT | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
P9_41_timer_pin: pinmux_P9_41_timer_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* xdma_event_intr1.timer7 */
+ P9_41( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* xdma_event_intr1.timer7 */
P9_41_pruin_pin: pinmux_P9_41_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE5) >; }; /* xdma_event_intr1.pru0_in16 */
+ P9_41( PIN_INPUT | MUX_MODE5) >; }; /* xdma_event_intr1.pru0_in16 */
/* P9_41.1 */
/* P9_91 (ZCZ ball D13) gpio3_20 */
P9_91_default_pin: pinmux_P9_91_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
P9_91_gpio_pin: pinmux_P9_91_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
P9_91_gpio_pu_pin: pinmux_P9_91_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
P9_91_gpio_pd_pin: pinmux_P9_91_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
P9_91_gpio_input_pin: pinmux_P9_91_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91( PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
P9_91_qep_pin: pinmux_P9_91_qep_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr1.eqep0_index */
+ P9_91( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr1.eqep0_index */
P9_91_pruout_pin: pinmux_P9_91_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr1.pru0_out6 */
+ P9_91( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr1.pru0_out6 */
P9_91_pruin_pin: pinmux_P9_91_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr1.pru0_in6 */
+ P9_91( PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr1.pru0_in6 */
/* P9_42 (ZCZ ball C18) gpio0_7 */
P9_42_default_pin: pinmux_P9_42_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
P9_42_gpio_pin: pinmux_P9_42_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0964, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
P9_42_gpio_pu_pin: pinmux_P9_42_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
P9_42_gpio_pd_pin: pinmux_P9_42_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
P9_42_gpio_input_pin: pinmux_P9_42_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0964, PIN_INPUT | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42( PIN_INPUT | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
P9_42_pwm_pin: pinmux_P9_42_pwm_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE0) >; }; /* eCAP0_in_PWM0_out.ecap0_in_pwm0_out */
+ P9_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE0) >; }; /* eCAP0_in_PWM0_out.ecap0_in_pwm0_out */
P9_42_uart_pin: pinmux_P9_42_uart_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* eCAP0_in_PWM0_out.uart3_txd */
+ P9_42( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* eCAP0_in_PWM0_out.uart3_txd */
P9_42_spi_cs_pin: pinmux_P9_42_spi_cs_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* eCAP0_in_PWM0_out.spi1_cs1 */
+ P9_42( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* eCAP0_in_PWM0_out.spi1_cs1 */
P9_42_pru_ecap_pin: pinmux_P9_42_pru_ecap_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* eCAP0_in_PWM0_out.pr1_ecap0_ecap_capin_apwm_o */
+ P9_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* eCAP0_in_PWM0_out.pr1_ecap0_ecap_capin_apwm_o */
P9_42_spi_sclk_pin: pinmux_P9_42_spi_sclk_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* eCAP0_in_PWM0_out.spi1_sclk */
+ P9_42( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* eCAP0_in_PWM0_out.spi1_sclk */
/* P9_42.1 */
/* P9_92 (ZCZ ball B12) gpio3_18 */
P9_92_default_pin: pinmux_P9_92_default_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
P9_92_gpio_pin: pinmux_P9_92_gpio_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92( PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
P9_92_gpio_pu_pin: pinmux_P9_92_gpio_pu_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
P9_92_gpio_pd_pin: pinmux_P9_92_gpio_pd_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
P9_92_gpio_input_pin: pinmux_P9_92_gpio_input_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92( PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
P9_92_qep_pin: pinmux_P9_92_qep_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkr.eqep0a_in */
+ P9_92( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkr.eqep0a_in */
P9_92_pruout_pin: pinmux_P9_92_pruout_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkr.pru0_out4 */
+ P9_92( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkr.pru0_out4 */
P9_92_pruin_pin: pinmux_P9_92_pruin_pin { pinctrl-single,pins = <
- AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkr.pru0_in4 */
+ P9_92( PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkr.pru0_in4 */
/* P9_43 GND */
--
GitLab
From 0566c2c22bf972e7653ed6ab114dede954a6a573 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Mon, 20 Jul 2020 10:56:01 +0530
Subject: [PATCH 42/86] BBAI: cleanup base dts file
---
src/arm/am5729-beagleboneai.dts | 107 --------------------------------
1 file changed, 107 deletions(-)
diff --git a/src/arm/am5729-beagleboneai.dts b/src/arm/am5729-beagleboneai.dts
index 685d1fe7..fdd1108f 100644
--- a/src/arm/am5729-beagleboneai.dts
+++ b/src/arm/am5729-beagleboneai.dts
@@ -240,12 +240,6 @@
pinctrl-0 = <&unused_pins_default>;
};
- // cape_pins: cape_pins {
- // compatible = "gpio-leds";
- // pinctrl-names = "default";
- // pinctrl-0 = <&cape_pins_default>;
- // };
-
extcon_usb1: extcon_usb1 {
compatible = "linux,extcon-usb-gpio";
ti,enable-id-detection;
@@ -479,106 +473,6 @@
DRA7XX_CORE_IOPAD(0x3824, MUX_MODE15) /* AC16: N/C */
>;
};
-
- // cape_pins_default: cape_pins_default {
- // pinctrl-single,pins = <
- // DRA7XX_CORE_IOPAD(0x379C, MUX_MODE14) /* AB8: P8.3: mmc3_dat6.off */
- // DRA7XX_CORE_IOPAD(0x37A0, MUX_MODE14) /* AB5: P8.4: mmc3_dat7.off */
- // DRA7XX_CORE_IOPAD(0x378C, MUX_MODE14) /* AC9: P8.5: mmc3_dat2.off */
- // DRA7XX_CORE_IOPAD(0x3790, MUX_MODE14) /* AC3: P8.6: mmc3_dat3.off */
- // DRA7XX_CORE_IOPAD(0x36EC, MUX_MODE14) /* G14: P8.7: mcasp1_axr14.off */
- // DRA7XX_CORE_IOPAD(0x36F0, MUX_MODE14) /* F14: P8.8: mcasp1_axr15.off */
- // DRA7XX_CORE_IOPAD(0x3698, MUX_MODE14) /* E17: P8.9: xref_clk1.off */
- // DRA7XX_CORE_IOPAD(0x36E8, MUX_MODE14) /* A13: P8.10: mcasp1_axr13.off */
- // DRA7XX_CORE_IOPAD(0x3510, MUX_MODE14) /* AH4: P8.11: vin1a_d7.off */
- // DRA7XX_CORE_IOPAD(0x350C, MUX_MODE14) /* AG6: P8.12: vin1a_d6.off */
- // DRA7XX_CORE_IOPAD(0x3590, PIN_INPUT | MUX_MODE12) /* D3: P8.13: vin2a_d10.off */
- // DRA7XX_CORE_IOPAD(0x3598, MUX_MODE14) /* D5: P8.14: vin2a_d12.off */
- // DRA7XX_CORE_IOPAD(0x3570, MUX_MODE14) /* D1: P8.15a: vin2a_d2.off */
- // DRA7XX_CORE_IOPAD(0x35B4, MUX_MODE13) /* A3: P8.15b: vin2a_d19.off */
- // DRA7XX_CORE_IOPAD(0x35BC, MUX_MODE13) /* B4: P8.16: vin2a_d21.off */
- // DRA7XX_CORE_IOPAD(0x3624, MUX_MODE14) /* A7: P8.17: vout1_d18.off */
- // DRA7XX_CORE_IOPAD(0x3588, PIN_INPUT | MUX_MODE12) /* F5: P8.18: vin2a_d8.off */
- // DRA7XX_CORE_IOPAD(0x358C, PIN_INPUT | MUX_MODE12) /* E6: P8.19: vin2a_d9.off */
- // DRA7XX_CORE_IOPAD(0x3780, MUX_MODE14) /* AC4: P8.20: mmc3_cmd.off */
- // DRA7XX_CORE_IOPAD(0x377C, MUX_MODE14) /* AD4: P8.21: mmc3_clk.off */
- // DRA7XX_CORE_IOPAD(0x3798, MUX_MODE14) /* AD6: P8.22: mmc3_dat5.off */
- // DRA7XX_CORE_IOPAD(0x3794, MUX_MODE14) /* AC8: P8.23: mmc3_dat4.off */
- // DRA7XX_CORE_IOPAD(0x3788, MUX_MODE14) /* AC6: P8.24: mmc3_dat1.off */
- // DRA7XX_CORE_IOPAD(0x3784, MUX_MODE14) /* AC7: P8.25: mmc3_dat0.off */
- // DRA7XX_CORE_IOPAD(0x35B8, MUX_MODE13) /* B3: P8.26: vin2a_d20.off */
- // DRA7XX_CORE_IOPAD(0x35D8, MUX_MODE14) /* E11: P8.27a: vout1_vsync.off */
- // DRA7XX_CORE_IOPAD(0x3628, MUX_MODE14) /* A8: P8.27b: vout1_d19.off */
- // DRA7XX_CORE_IOPAD(0x35C8, MUX_MODE14) /* D11: P8.28a: vout1_clk.off */
- // DRA7XX_CORE_IOPAD(0x362C, MUX_MODE14) /* C9: P8.28b: vout1_d20.off */
- // DRA7XX_CORE_IOPAD(0x35D4, MUX_MODE14) /* C11: P8.29a: vout1_hsync.off */
- // DRA7XX_CORE_IOPAD(0x3630, MUX_MODE14) /* A9: P8.29b: vout1_d21.off */
- // DRA7XX_CORE_IOPAD(0x35CC, MUX_MODE14) /* B10: P8.30a: vout1_de.off */
- // DRA7XX_CORE_IOPAD(0x3634, MUX_MODE14) /* B9: P8.30b: vout1_d22.off */
- // DRA7XX_CORE_IOPAD(0x3614, MUX_MODE14) /* C8: P8.31a: vout1_d14.off */
- // DRA7XX_CORE_IOPAD(0x373C, MUX_MODE14) /* G16: P8.31b: mcasp4_axr0.off */
- // DRA7XX_CORE_IOPAD(0x3618, MUX_MODE14) /* C7: P8.32a: vout1_d15.off */
- // DRA7XX_CORE_IOPAD(0x3740, MUX_MODE14) /* D17: P8.32b: mcasp4_axr1.off */
- // DRA7XX_CORE_IOPAD(0x3610, MUX_MODE14) /* C6: P8.33a: vout1_d13.off */
- // DRA7XX_CORE_IOPAD(0x34E8, MUX_MODE14) /* AF9: P8.33b: vin1a_fld0.off */
- // DRA7XX_CORE_IOPAD(0x3608, MUX_MODE14) /* D8: P8.34a: vout1_d11.off */
- // DRA7XX_CORE_IOPAD(0x3564, MUX_MODE14) /* G6: P8.34b: vin2a_vsync0.off */
- // DRA7XX_CORE_IOPAD(0x360C, MUX_MODE14) /* A5: P8.35a: vout1_d12.off */
- // DRA7XX_CORE_IOPAD(0x34E4, MUX_MODE14) /* AD9: P8.35b: vin1a_de0.off */
- // DRA7XX_CORE_IOPAD(0x3604, MUX_MODE14) /* D7: P8.36a: vout1_d10.off */
- // DRA7XX_CORE_IOPAD(0x3568, MUX_MODE14) /* F2: P8.36b: vin2a_d0.off */
- // DRA7XX_CORE_IOPAD(0x35FC, MUX_MODE14) /* E8: P8.37a: vout1_d8.off */
- // DRA7XX_CORE_IOPAD(0x3738, MUX_MODE14) /* A21: P8.37b: mcasp4_fsx.off */
- // DRA7XX_CORE_IOPAD(0x3600, MUX_MODE14) /* D9: P8.38a: vout1_d9.off */
- // DRA7XX_CORE_IOPAD(0x3734, MUX_MODE14) /* C18: P8.38b: mcasp4_aclkx.off */
- // DRA7XX_CORE_IOPAD(0x35F4, MUX_MODE14) /* F8: P8.39: vout1_d6.off */
- // DRA7XX_CORE_IOPAD(0x35F8, MUX_MODE14) /* E7: P8.40: vout1_d7.off */
- // DRA7XX_CORE_IOPAD(0x35EC, MUX_MODE14) /* E9: P8.41: vout1_d4.off */
- // DRA7XX_CORE_IOPAD(0x35F0, MUX_MODE14) /* F9: P8.42: vout1_d5.off */
- // DRA7XX_CORE_IOPAD(0x35E4, MUX_MODE14) /* F10: P8.43: vout1_d2.off */
- // DRA7XX_CORE_IOPAD(0x35E8, MUX_MODE14) /* G11: P8.44: vout1_d3.off */
- // DRA7XX_CORE_IOPAD(0x35DC, MUX_MODE14) /* F11: P8.45a: vout1_d0.off */
- // DRA7XX_CORE_IOPAD(0x361C, MUX_MODE14) /* B7: P8.45b: vout1_d16.off */
- // DRA7XX_CORE_IOPAD(0x35E0, MUX_MODE14) /* G10: P8.46a: vout1_d1.off */
- // DRA7XX_CORE_IOPAD(0x3638, MUX_MODE14) /* A10: P8.46b: vout1_d23.off */
- // DRA7XX_CORE_IOPAD(0x372C, MUX_MODE14) /* B19: P9.11a: mcasp3_axr0.off */
- // DRA7XX_CORE_IOPAD(0x3620, MUX_MODE14) /* B8: P9.11b: vout1_d17.off */
- // DRA7XX_CORE_IOPAD(0x36AC, MUX_MODE14) /* B14: P9.12: mcasp1_aclkr.off */
- // DRA7XX_CORE_IOPAD(0x3730, MUX_MODE14) /* C17: P9.13: mcasp3_axr1.off */
- // DRA7XX_CORE_IOPAD(0x35AC, MUX_MODE10) /* D6: P9.14: vin2a_d17.off */
- // DRA7XX_CORE_IOPAD(0x3514, MUX_MODE14) /* AG4: P9.15: vin1a_d8.off */
- // DRA7XX_CORE_IOPAD(0x35B0, MUX_MODE13) /* C5: P9.16: vin2a_d18.off */
- // DRA7XX_CORE_IOPAD(0x37CC, MUX_MODE14) /* B24: P9.17a: spi2_cs0.off */
- // DRA7XX_CORE_IOPAD(0x36B8, MUX_MODE14) /* F12: P9.17b: mcasp1_axr1.off */
- // DRA7XX_CORE_IOPAD(0x37C8, MUX_MODE14) /* G17: P9.18a: spi2_d0.off */
- // DRA7XX_CORE_IOPAD(0x36B4, MUX_MODE14) /* G12: P9.18b: mcasp1_axr0.off */
- // DRA7XX_CORE_IOPAD(0x3440, PIN_INPUT_PULLUP | MUX_MODE7) /* R6: P9.19a: gpmc_a0.i2c4_scl */
- // DRA7XX_CORE_IOPAD(0x357C, PIN_INPUT_PULLUP | MUX_MODE12 ) /* F4: P9.19b: vin2a_d5.pr1_pru1_gpi2 */
- // DRA7XX_CORE_IOPAD(0x3444, PIN_INPUT_PULLUP | MUX_MODE7) /* T9: P9.20a: gpmc_a1.i2c4_sda */
- // DRA7XX_CORE_IOPAD(0x3578, PIN_INPUT_PULLUP | MUX_MODE12) /* D2: P9.20b: vin2a_d4.pr1_pru1_gpi1 */
- // DRA7XX_CORE_IOPAD(0x34F0, MUX_MODE14) /* AF8: P9.21a: vin1a_vsync0.off */
- // DRA7XX_CORE_IOPAD(0x37C4, MUX_MODE14) /* B22: P9.21b: spi2_d1.off */
- // DRA7XX_CORE_IOPAD(0x369C, MUX_MODE14) /* B26: P9.22a: xref_clk2.off */
- // DRA7XX_CORE_IOPAD(0x37C0, MUX_MODE14) /* A26: P9.22b: spi2_sclk.off */
- // DRA7XX_CORE_IOPAD(0x37B4, MUX_MODE14) /* A22: P9.23: spi1_cs1.off */
- // DRA7XX_CORE_IOPAD(0x368C, MUX_MODE14) /* F20: P9.24: gpio6_15.off */
- // DRA7XX_CORE_IOPAD(0x3694, MUX_MODE14) /* D18: P9.25: xref_clk0.off */
- // DRA7XX_CORE_IOPAD(0x3688, MUX_MODE14) /* E21: P9.26a: gpio6_14.off */
- // DRA7XX_CORE_IOPAD(0x3544, MUX_MODE14) /* AE2: P9.26b: vin1a_d20.off */
- // DRA7XX_CORE_IOPAD(0x35A0, MUX_MODE14) /* C3: P9.27a: vin2a_d14.off */
- // DRA7XX_CORE_IOPAD(0x36B0, MUX_MODE14) /* J14: P9.27b: mcasp1_fsr.off */
- // DRA7XX_CORE_IOPAD(0x36E0, MUX_MODE14) /* A12: P9.28: mcasp1_axr11.off */
- // DRA7XX_CORE_IOPAD(0x36D8, MUX_MODE14) /* A11: P9.29a: mcasp1_axr9.off */
- // DRA7XX_CORE_IOPAD(0x36A8, MUX_MODE14) /* D14: P9.29b: mcasp1_fsx.off */
- // DRA7XX_CORE_IOPAD(0x36DC, MUX_MODE14) /* B13: P9.30: mcasp1_axr10.off */
- // DRA7XX_CORE_IOPAD(0x36D4, MUX_MODE14) /* B12: P9.31a: mcasp1_axr8.off */
- // DRA7XX_CORE_IOPAD(0x36A4, MUX_MODE14) /* C14: P9.31b: mcasp1_aclkx.off */
- // DRA7XX_CORE_IOPAD(0x36A0, MUX_MODE14) /* C23: P9.41a: xref_clk3.off */
- // DRA7XX_CORE_IOPAD(0x3580, MUX_MODE14) /* C1: P9.41b: vin2a_d6.off */
- // DRA7XX_CORE_IOPAD(0x36E4, MUX_MODE14) /* E14: P9.42a: mcasp1_axr12.off */
- // DRA7XX_CORE_IOPAD(0x359C, MUX_MODE14) /* C2: P9.42b: vin2a_d13.off */
- // >;
- // };
};
&vip2 {
@@ -1177,7 +1071,6 @@
&i2c4 {
status = "okay";
clock-frequency = <100000>;
- symlink = "bone/i2c/2";
};
/* thermal hacks */
--
GitLab
From 21068c22ebfa2574fabf10e0b462c38f0cf283a6 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Tue, 21 Jul 2020 14:29:03 +0530
Subject: [PATCH 43/86] BBAI: updated with dummy nodes
Created dummy nodes for unavailable bone buses to avoid FDT error!
---
src/arm/am572x-bone-common-univ.dtsi | 99 ++++++++++++++++++++++++++--
1 file changed, 94 insertions(+), 5 deletions(-)
diff --git a/src/arm/am572x-bone-common-univ.dtsi b/src/arm/am572x-bone-common-univ.dtsi
index a043c27b..a98d218e 100644
--- a/src/arm/am572x-bone-common-univ.dtsi
+++ b/src/arm/am572x-bone-common-univ.dtsi
@@ -6,7 +6,7 @@
* published by the Free Software Foundation.
*/
-#include <dt-bindings/board/am572x-bbai-pins.h>
+#include <dt-bindings/board/am5729-bone-pins.h>
&dra7_pmx_core {
/************************/
@@ -369,6 +369,9 @@
P8_27_gpio_input_pin: pinmux_P8_27_gpio_input_pin { pinctrl-single,pins = <
P8_27A( PIN_INPUT | MUX_MODE14)
P8_27B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_vsync.gpio4_23, vout1_d19.off */
+ P8_27_lcd_pin: pinmux_P8_27_lcd_pin { pinctrl-single,pins = <
+ P8_27A( PIN_OUTPUT | MUX_MODE0)
+ P8_27B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_vsync.vout1_vsync, vout1_d19.off */
/* P8_27b (ball A8) gpio8_19 */
P8_27_pruout_pin: pinmux_P8_27_pruout_pin { pinctrl-single,pins = <
@@ -394,6 +397,9 @@
P8_28_gpio_input_pin: pinmux_P8_28_gpio_input_pin { pinctrl-single,pins = <
P8_28A( PIN_INPUT | MUX_MODE14)
P8_28B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_clk.gpio4_19, vout1_d20.off */
+ P8_28_lcd_pin: pinmux_P8_28_lcd_pin { pinctrl-single,pins = <
+ P8_28A( PIN_OUTPUT | MUX_MODE0)
+ P8_28B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_clk.vout1_clk, vout1_d20.off */
/* P8_28b (ball C9) gpio8_20 */
P8_28_pruout_pin: pinmux_P8_28_pruout_pin { pinctrl-single,pins = <
@@ -419,6 +425,9 @@
P8_29_gpio_input_pin: pinmux_P8_29_gpio_input_pin { pinctrl-single,pins = <
P8_29A( PIN_INPUT | MUX_MODE14)
P8_29B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_hsync.gpio4_22, vout1_d21.off */
+ P8_29_lcd_pin: pinmux_P8_29_lcd_pin { pinctrl-single,pins = <
+ P8_29A( PIN_OUTPUT | MUX_MODE0)
+ P8_29B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_hsync.vout1_hsync, vout1_d21.off */
/* P8_29b (ball A9) gpio8_21 */
P8_29_pruout_pin: pinmux_P8_29_pruout_pin { pinctrl-single,pins = <
@@ -444,6 +453,9 @@
P8_30_gpio_input_pin: pinmux_P8_30_gpio_input_pin { pinctrl-single,pins = <
P8_30A( PIN_INPUT | MUX_MODE14)
P8_30B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_de.gpio4_20, vout1_d22.off */
+ P8_30_lcd_pin: pinmux_P8_30_lcd_pin { pinctrl-single,pins = <
+ P8_30A( PIN_OUTPUT | MUX_MODE0)
+ P8_30B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_de.vout1_de, vout1_d22.off */
/* P8_30b (ball B9) gpio8_22 */
P8_30_pruout_pin: pinmux_P8_30_pruout_pin { pinctrl-single,pins = <
@@ -470,6 +482,9 @@
P8_31_gpio_input_pin: pinmux_P8_31_gpio_input_pin { pinctrl-single,pins = <
P8_31A( PIN_INPUT | MUX_MODE14)
P8_31B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d14.gpio8_14, mcasp4_axr0.off */
+ P8_31_lcd_pin: pinmux_P8_31_lcd_pin { pinctrl-single,pins = <
+ P8_31A( PIN_OUTPUT | MUX_MODE0)
+ P8_31B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d14.vout1_d14, mcasp4_axr0.off */
/* P8_31b (ball G16) */
P8_31_uart_pin: pinmux_P8_31_uart_pin { pinctrl-single,pins = <
@@ -492,6 +507,9 @@
P8_32_gpio_input_pin: pinmux_P8_32_gpio_input_pin { pinctrl-single,pins = <
P8_32A( PIN_INPUT | MUX_MODE14)
P8_32B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d15.gpio8_15, mcasp4_axr1.off */
+ P8_32_lcd_pin: pinmux_P8_32_lcd_pin { pinctrl-single,pins = <
+ P8_32A( PIN_OUTPUT | MUX_MODE0)
+ P8_32B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d15.vout1_d15, mcasp4_axr1.off */
/* P8_32b (ball D17) */
P8_32_uart_pin: pinmux_P8_32_uart_pin { pinctrl-single,pins = <
@@ -514,6 +532,9 @@
P8_33_gpio_input_pin: pinmux_P8_33_gpio_input_pin { pinctrl-single,pins = <
P8_33A( PIN_INPUT | MUX_MODE14)
P8_33B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d13.gpio8_13, vin1a_fld0.off */
+ P8_33_lcd_pin: pinmux_P8_33_lcd_pin { pinctrl-single,pins = <
+ P8_33A( PIN_OUTPUT | MUX_MODE0)
+ P8_33B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d13.vout1_d13, vin1a_fld0.off */
/* P8_33b (ball AF9) gpio3_1 */
P8_33_qep_pin: pinmux_P8_33_qep_pin { pinctrl-single,pins = <
@@ -537,6 +558,9 @@
P8_34_gpio_input_pin: pinmux_P8_34_gpio_input_pin { pinctrl-single,pins = <
P8_34A( PIN_INPUT | MUX_MODE14)
P8_34B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d11.gpio8_11, vin2a_vsync0.off */
+ P8_34_lcd_pin: pinmux_P8_34_lcd_pin { pinctrl-single,pins = <
+ P8_34A( PIN_OUTPUT | MUX_MODE0)
+ P8_34B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d11.vout1_d11, vin2a_vsync0.off */
/* P8_34b (ball G6) gpio4_0 */
P8_34_pwm_pin: pinmux_P8_34_pwm_pin { pinctrl-single,pins = <
@@ -559,7 +583,10 @@
P8_35_gpio_input_pin: pinmux_P8_35_gpio_input_pin { pinctrl-single,pins = <
P8_35A( PIN_INPUT | MUX_MODE14)
P8_35B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d12.gpio8_12, vin1a_de0.off */
-
+ P8_35_lcd_pin: pinmux_P8_35_lcd_pin { pinctrl-single,pins = <
+ P8_35A( PIN_OUTPUT | MUX_MODE0)
+ P8_35B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d12.vout1_d12, vin1a_de0.off */
+
/* P8_35b (ball AD9) gpio3_0 */
P8_35_qep_pin: pinmux_P8_35_qep_pin { pinctrl-single,pins = <
P8_35B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10)
@@ -581,7 +608,10 @@
P8_36_gpio_input_pin: pinmux_P8_36_gpio_input_pin { pinctrl-single,pins = <
P8_36A( PIN_INPUT | MUX_MODE14)
P8_36B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d10.gpio8_10, vin2a_d0.off */
-
+ P8_36_lcd_pin: pinmux_P8_36_lcd_pin { pinctrl-single,pins = <
+ P8_36A( PIN_OUTPUT | MUX_MODE0)
+ P8_36B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d10.vout1_d10, vin2a_d0.off */
+
/* P8_36b (ball F2) gpio4_1 */
P8_36_pwm_pin: pinmux_P8_36_pwm_pin { pinctrl-single,pins = <
P8_36B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10)
@@ -603,7 +633,10 @@
P8_37_gpio_input_pin: pinmux_P8_37_gpio_input_pin { pinctrl-single,pins = <
P8_37A( PIN_INPUT | MUX_MODE14)
P8_37B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d8.gpio8_8, mcasp4_fsx.off */
-
+ P8_37_lcd_pin: pinmux_P8_37_lcd_pin { pinctrl-single,pins = <
+ P8_37A( PIN_OUTPUT | MUX_MODE0)
+ P8_37B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d8.vout1_d8, mcasp4_fsx.off */
+
/* P8_37b (ball A21) */
P8_37_uart_pin: pinmux_P8_37_uart_pin { pinctrl-single,pins = <
P8_37B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3)
@@ -625,7 +658,10 @@
P8_38_gpio_input_pin: pinmux_P8_38_gpio_input_pin { pinctrl-single,pins = <
P8_38A( PIN_INPUT | MUX_MODE14)
P8_38B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d9.gpio8_9, mcasp4_aclkx.off */
-
+ P8_38_lcd_pin: pinmux_P8_38_lcd_pin { pinctrl-single,pins = <
+ P8_38A( PIN_OUTPUT | MUX_MODE0)
+ P8_38B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d9.vout1_d9, mcasp4_aclkx.off */
+
/* P8_38b (ball C18) */
P8_38_uart_pin: pinmux_P8_38_uart_pin { pinctrl-single,pins = <
P8_38B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3)
@@ -646,6 +682,8 @@
P8_39( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d6.pr2_pru0_gpo3 */
P8_39_pruin_pin: pinmux_P8_39_pruin_pin { pinctrl-single,pins = <
P8_39( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d6.pr2_pru0_gpi3 */
+ P8_39_lcd_pin: pinmux_P8_39_lcd_pin { pinctrl-single,pins = <
+ P8_39( PIN_OUTPUT | MUX_MODE0) >; }; /* vout1_d6.vout1_d6 */
/* P8_40 (ball E7) gpio8_7 */
P8_40_default_pin: pinmux_P8_40_default_pin { pinctrl-single,pins = <
@@ -662,6 +700,8 @@
P8_40( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d7.pr2_pru0_gpo4 */
P8_40_pruin_pin: pinmux_P8_40_pruin_pin { pinctrl-single,pins = <
P8_40( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d7.pr2_pru0_gpi4 */
+ P8_40_lcd_pin: pinmux_P8_40_lcd_pin { pinctrl-single,pins = <
+ P8_40( PIN_OUTPUT | MUX_MODE0) >; }; /* vout1_d7.vout1_d7 */
/* P8_41 (ball E9) gpio8_4 */
P8_41_default_pin: pinmux_P8_41_default_pin { pinctrl-single,pins = <
@@ -678,6 +718,8 @@
P8_41( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d4.pr2_pru0_gpo1 */
P8_41_pruin_pin: pinmux_P8_41_pruin_pin { pinctrl-single,pins = <
P8_41( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d4.pr2_pru0_gpi1 */
+ P8_41_lcd_pin: pinmux_P8_41_lcd_pin { pinctrl-single,pins = <
+ P8_41( PIN_OUTPUT | MUX_MODE0) >; }; /* vout1_d4.vout1_d4 */
/* P8_42 (ball F9) gpio8_5 */
P8_42_default_pin: pinmux_P8_42_default_pin { pinctrl-single,pins = <
@@ -694,6 +736,8 @@
P8_42( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d5.pr2_pru0_gpo2 */
P8_42_pruin_pin: pinmux_P8_42_pruin_pin { pinctrl-single,pins = <
P8_42( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d5.pr2_pru0_gpi2 */
+ P8_42_lcd_pin: pinmux_P8_42_lcd_pin { pinctrl-single,pins = <
+ P8_42( PIN_OUTPUT | MUX_MODE0) >; }; /* vout1_d5.vout1_d5 */
/* P8_43 (ball F10) gpio8_2 */
P8_43_default_pin: pinmux_P8_43_default_pin { pinctrl-single,pins = <
@@ -710,6 +754,8 @@
P8_43( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d2.pr2_pru1_gpo20 */
P8_43_pruin_pin: pinmux_P8_43_pruin_pin { pinctrl-single,pins = <
P8_43( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d2.pr2_pru1_gpi20 */
+ P8_43_lcd_pin: pinmux_P8_43_lcd_pin { pinctrl-single,pins = <
+ P8_43( PIN_OUTPUT | MUX_MODE0) >; }; /* vout1_d2.vout1_d2 */
/* P8_44 (ball G11) gpio8_3 */
P8_44_default_pin: pinmux_P8_44_default_pin { pinctrl-single,pins = <
@@ -726,6 +772,8 @@
P8_44( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d3.pr2_pru0_gpo0 */
P8_44_pruin_pin: pinmux_P8_44_pruin_pin { pinctrl-single,pins = <
P8_44( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d3.pr2_pru0_gpi0 */
+ P8_44_lcd_pin: pinmux_P8_44_lcd_pin { pinctrl-single,pins = <
+ P8_44( PIN_OUTPUT | MUX_MODE0) >; }; /* vout1_d3.vout1_d3 */
/* P8_45a (ball F11) gpio8_0 */
P8_45_default_pin: pinmux_P8_45_default_pin { pinctrl-single,pins = <
@@ -743,6 +791,9 @@
P8_45_gpio_input_pin: pinmux_P8_45_gpio_input_pin { pinctrl-single,pins = <
P8_45A( PIN_INPUT | MUX_MODE14)
P8_45B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d0.gpio8_0, vout1_d16.off */
+ P8_45_lcd_pin: pinmux_P8_45_lcd_pin { pinctrl-single,pins = <
+ P8_45A( PIN_OUTPUT | MUX_MODE0)
+ P8_45B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d0.vout1_d0, vout1_d16.off */
/* P8_45b (ball B7) gpio8_16 */
P8_45_pruout_pin: pinmux_P8_45_pruout_pin { pinctrl-single,pins = <
@@ -768,6 +819,9 @@
P8_46_gpio_input_pin: pinmux_P8_46_gpio_input_pin { pinctrl-single,pins = <
P8_46A( PIN_INPUT | MUX_MODE14)
P8_46B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d1.gpio8_1, vout1_d23.off */
+ P8_46_lcd_pin: pinmux_P8_46_lcd_pin { pinctrl-single,pins = <
+ P8_46A( PIN_OUTPUT | MUX_MODE0)
+ P8_46B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d1.vout1_d1, vout1_d23.off */
/* P8_46b (ball A10) gpio8_23 */
P8_46_pruout_pin: pinmux_P8_46_pruout_pin { pinctrl-single,pins = <
@@ -979,6 +1033,13 @@
P9_19B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10)
P9_19A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d5.eQEP2A_in, gpmc_a0.off */
+ /* P9_19 dummy nodes for unavailable bone bus */
+ P9_19_can_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = <
+ /* To avoid FDT_ERROR on BBAI when using BONE-CAN0-00A0.dtbo */
+ /* Default pinmux configuration of P9_19 (P9_19_default_pin) */
+ P9_19A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7)
+ P9_19B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpmc_a0.i2c4_scl, gpmc_a0.off */
+
/* P9_20a (ball T9) gpio7_4 */
P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = <
P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7)
@@ -1007,6 +1068,13 @@
P9_20B( PIN_INPUT | MUX_MODE12)
P9_20A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d4.pr1_pru1_gpi1, gpmc_a1.off */
+ /* P9_20 dummy nodes for unavailable bone bus */
+ P9_20_can_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = <
+ /* To avoid FDT_ERROR on BBAI when using BONE-CAN0-00A0.dtbo */
+ /* Default pinmux configuration of P9_20 (P9_20_default_pin) */
+ P9_20A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7)
+ P9_20B( PIN_OUTPUT | MUX_MODE15) >; }; /* gpmc_a1.i2c4_sda, vin2a_d4.off */
+
/* P9_21a (ball AF8) gpio3_3 */
P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = <
P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
@@ -1034,6 +1102,13 @@
P9_21_uart_pin: pinmux_P9_21_uart_pin { pinctrl-single,pins = <
P9_21B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1)
P9_21A( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_d1.uart3_txd, vin1a_vsync0.off */
+
+ /* P9_21 dummy nodes for unavailable bone bus */
+ P9_21_i2c_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = <
+ /* To avoid FDT_ERROR on BBAI when using BONE-I2C2A-00A0.dtbo */
+ /* Default pinmux configuration of P9_21 (P9_21_default_pin) */
+ P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_21B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin1a_vsync0.gpio3_3,spi2_d1.off */
/* P9_22a (ball B26) gpio6_19 */
P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
@@ -1060,6 +1135,13 @@
P9_22B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1)
P9_22A( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_sclk.uart3_rxd, xref_clk2.off */
+ /* P9_22 dummy nodes for unavailable bone bus */
+ P9_22_i2c_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
+ /* To avoid FDT_ERROR on BBAI when using BONE-I2C2A-00A0.dtbo */
+ /* Default pinmux configuration of P9_22 (P9_22_default_pin) */
+ P9_22A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_22B( PIN_OUTPUT | MUX_MODE15) >; }; /* xref_clk2.gpio6_19, spi2_sclk.off */
+
/* P9_23 (ball A22) gpio7_11 */
P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = <
P9_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* spi1_cs1.gpio7_11 */
@@ -1332,6 +1414,13 @@
P9_42_pruin_pin: pinmux_P9_42_pruin_pin { pinctrl-single,pins = <
P9_42B( PIN_INPUT | MUX_MODE12)
P9_42A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d13.pr1_pru1_gpi10, mcasp1_axr12.off */
+
+ /* P9_42 dummy nodes for unavailable bone bus */
+ P9_42_uart_pin: pinmux_P9_42_default_pin { pinctrl-single,pins = <
+ /* To avoid FDT_ERROR on BBAI when using BONE-UART3-00A0.dtbo */
+ /* Default pinmux configuration of P9_42 (P9_42_default_pin) */
+ P9_42A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_42B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr12.gpio4_18, vin2a_d13.off */
/* P9_43 GND */
--
GitLab
From 861db41b839ce56bb8947cedec514dddd0a60bad Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Tue, 21 Jul 2020 14:29:51 +0530
Subject: [PATCH 44/86] BBAI: fix led, spi nodes & add CAN bus
---
src/arm/bbai-bone-buses.dtsi | 336 ++++++++++++++++++-----------------
1 file changed, 171 insertions(+), 165 deletions(-)
diff --git a/src/arm/bbai-bone-buses.dtsi b/src/arm/bbai-bone-buses.dtsi
index c0b05438..3f554b97 100644
--- a/src/arm/bbai-bone-buses.dtsi
+++ b/src/arm/bbai-bone-buses.dtsi
@@ -6,7 +6,8 @@
* published by the Free Software Foundation.
*/
-#include <dt-bindings/board/am572x-bbai-pins.h>
+#include <dt-bindings/board/am5729-bone-pins.h>
+#include <dt-bindings/gpio/gpio.h>
/********/
/* LEDs */
@@ -17,342 +18,351 @@
compatible = "gpio-leds";
led_P8_03 {
- gpios = <&gpio1 24 0>;
- status = "reserved";
+ gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_04 {
- gpios = <&gpio1 25 0>;
- status = "reserved";
+ gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_05 {
- gpios = <&gpio7 1 0>;
- status = "reserved";
+ gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_06 {
- gpios = <&gpio7 2 0>;
- status = "reserved";
+ gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_07 {
- gpios = <&gpio6 5 0>;
- status = "reserved";
+ gpios = <&gpio6 5 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_08 {
- gpios = <&gpio6 6 0>;
- status = "reserved";
+ gpios = <&gpio6 6 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_09 {
- gpios = <&gpio6 18 0>;
- status = "reserved";
+ gpios = <&gpio6 18 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_10 {
- gpios = <&gpio6 4 0>;
- status = "reserved";
+ gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_11 {
- gpios = <&gpio3 11 0>;
- status = "reserved";
+ gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_12 {
- gpios = <&gpio3 10 0>;
- status = "reserved";
+ gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_13 {
- gpios = <&gpio4 11 0>;
- status = "reserved";
+ gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_14 {
- gpios = <&gpio4 13 0>;
- status = "reserved";
+ gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_15 {
- gpios = <&gpio4 3 0>;
- status = "reserved";
+ gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_16 {
- gpios = <&gpio4 29 0>;
- status = "reserved";
+ gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_17 {
- gpios = <&gpio8 18 0>;
- status = "reserved";
+ gpios = <&gpio8 18 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_18 {
- gpios = <&gpio4 9 0>;
- status = "reserved";
+ gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_19 {
- gpios = <&gpio4 10 0>;
- status = "reserved";
+ gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_20 {
- gpios = <&gpio6 30 0>;
- status = "reserved";
+ gpios = <&gpio6 30 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_21 {
- gpios = <&gpio6 29 0>;
- status = "reserved";
+ gpios = <&gpio6 29 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_22 {
- gpios = <&gpio1 23 0>;
- status = "reserved";
+ gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_23 {
- gpios = <&gpio1 22 0>;
- status = "reserved";
+ gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_24 {
- gpios = <&gpio7 0 0>;
- status = "reserved";
+ gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_25 {
- gpios = <&gpio6 31 0>;
- status = "reserved";
+ gpios = <&gpio6 31 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_26 {
- gpios = <&gpio4 28 0>;
- status = "reserved";
+ gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_27 {
- gpios = <&gpio4 23 0>;
- status = "reserved";
+ gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_28 {
- gpios = <&gpio4 19 0>;
- status = "reserved";
+ gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_29 {
- gpios = <&gpio4 22 0>;
- status = "reserved";
+ gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_30 {
- gpios = <&gpio4 20 0>;
- status = "reserved";
+ gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_31 {
- gpios = <&gpio8 14 0>;
- status = "reserved";
+ gpios = <&gpio8 14 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_32 {
- gpios = <&gpio8 15 0>;
- status = "reserved";
+ gpios = <&gpio8 15 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_33 {
- gpios = <&gpio8 13 0>;
- status = "reserved";
+ gpios = <&gpio8 13 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_34 {
- gpios = <&gpio8 11 0>;
- status = "reserved";
+ gpios = <&gpio8 11 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_35 {
- gpios = <&gpio8 12 0>;
- status = "reserved";
+ gpios = <&gpio8 12 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_36 {
- gpios = <&gpio8 10 0>;
- status = "reserved";
+ gpios = <&gpio8 10 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_37 {
- gpios = <&gpio8 8 0>;
- status = "reserved";
+ gpios = <&gpio8 8 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_38 {
- gpios = <&gpio8 9 0>;
- status = "reserved";
+ gpios = <&gpio8 9 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_39 {
- gpios = <&gpio8 6 0>;
- status = "reserved";
+ gpios = <&gpio8 6 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_40 {
- gpios = <&gpio8 7 0>;
- status = "reserved";
+ gpios = <&gpio8 7 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_41 {
- gpios = <&gpio8 4 0>;
- status = "reserved";
+ gpios = <&gpio8 4 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_42 {
- gpios = <&gpio8 5 0>;
- status = "reserved";
+ gpios = <&gpio8 5 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_43 {
- gpios = <&gpio8 2 0>;
- status = "reserved";
+ gpios = <&gpio8 2 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_44 {
- gpios = <&gpio8 3 0>;
- status = "reserved";
+ gpios = <&gpio8 3 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_45 {
- gpios = <&gpio8 0 0>;
- status = "reserved";
+ gpios = <&gpio8 0 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P8_46 {
- gpios = <&gpio8 1 0>;
- status = "reserved";
+ gpios = <&gpio8 1 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_11 {
- gpios = <&gpio8 17 0>;
- status = "reserved";
+ gpios = <&gpio8 17 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_12 {
- gpios = <&gpio5 0 0>;
- status = "reserved";
+ gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_13 {
- gpios = <&gpio6 12 0>;
- status = "reserved";
+ gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_14 {
- gpios = <&gpio4 25 0>;
- status = "reserved";
+ gpios = <&gpio4 25 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_15 {
- gpios = <&gpio3 12 0>;
- status = "reserved";
+ gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_16 {
- gpios = <&gpio4 26 0>;
- status = "reserved";
+ gpios = <&gpio4 26 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_17 {
- gpios = <&gpio7 17 0>;
- status = "reserved";
+ gpios = <&gpio7 17 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_18 {
- gpios = <&gpio7 16 0>;
- status = "reserved";
+ gpios = <&gpio7 16 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_19 {
- gpios = <&gpio7 3 0>;
- status = "reserved";
+ gpios = <&gpio7 3 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_20 {
- gpios = <&gpio7 4 0>;
- status = "reserved";
+ gpios = <&gpio7 4 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_21 {
- gpios = <&gpio3 3 0>;
- status = "reserved";
+ gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_22 {
- gpios = <&gpio6 19 0>;
- status = "reserved";
+ gpios = <&gpio6 19 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_23 {
- gpios = <&gpio7 11 0>;
- status = "reserved";
+ gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_24 {
- gpios = <&gpio6 15 0>;
- status = "reserved";
+ gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_25 {
- gpios = <&gpio6 17 0>;
- status = "reserved";
+ gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_26 {
- gpios = <&gpio6 14 0>;
- status = "reserved";
+ gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_27 {
- gpios = <&gpio4 15 0>;
- status = "reserved";
+ gpios = <&gpio4 15 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_28 {
- gpios = <&gpio4 17 0>;
- status = "reserved";
+ gpios = <&gpio4 17 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_29 {
- gpios = <&gpio5 11 0>;
- status = "reserved";
+ gpios = <&gpio5 11 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_30 {
- gpios = <&gpio5 12 0>;
- status = "reserved";
+ gpios = <&gpio5 12 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_31 {
- gpios = <&gpio5 10 0>;
- status = "reserved";
+ gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_41 {
- gpios = <&gpio6 20 0>;
- status = "reserved";
+ gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
led_P9_42 {
- gpios = <&gpio4 18 0>;
- status = "reserved";
+ gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
};
};
};
+// For dummy refrence when peripheral is not available.
+&{/} {
+ not_available: not_available {
+ // Use ¬_available phandle when bus not available!
+ // This node is responsible to create these entries,
+ // /sys/firmware/devicetree/base/__symbols__/not_available
+ // /sys/firmware/devicetree/base/not_available
+ };
+};
// UARTs
bone_uart_1: &uart10 {
@@ -363,8 +373,8 @@ bone_uart_2: &uart3 {
symlink = "bone/uart/2";
};
-bone_uart_3: &ocp{
- // not available
+bone_uart_3: ¬_available {
+ // not available on BBAI
};
bone_uart_4: &uart5 {
@@ -381,11 +391,12 @@ bone_i2c_1: &i2c5 {
};
bone_i2c_2: &i2c4 {
- // symlink = "bone/i2c/2";
+ // Already in use for cape EEPROM reading.
+ symlink = "bone/i2c/2";
};
-bone_i2c_2a: &ocp {
- // Not available
+bone_i2c_2a: ¬_available {
+ // Not available on BBAI
};
bone_i2c_3: &i2c3 {
@@ -393,65 +404,60 @@ bone_i2c_3: &i2c3 {
};
// SPIs
-bone_spi_0: &mcspi2 {
+&mcspi2 {
#address-cells = <1>;
#size-cells = <0>;
-
- channel@0 {
+ bone_spi_0: channel@0 {
#address-cells = <1>;
#size-cells = <0>;
-
compatible = "spidev";
- symlink = "/bone/spi/0.0";
-
+ symlink = "bone/spi/0.0";
reg = <0>;
- spi-max-frequency = <16000000>;
- spi-cpha;
};
};
-bone_spi_1: &mcspi3 {
+&mcspi3 {
#address-cells = <1>;
#size-cells = <0>;
- ti,pio-mode; /* disable dma when used as an overlay, dma gets stuck at 160 bits... */
-
- channel@0 {
+ bone_spi_1_0: channel@0 {
#address-cells = <1>;
#size-cells = <0>;
-
compatible = "spidev";
- symlink = "/bone/spi/1.0";
-
+ symlink = "bone/spi/1.0";
reg = <0>;
- spi-max-frequency = <16000000>;
- spi-cpha;
};
- channel@1 {
+ bone_spi_1_1: channel@1 {
#address-cells = <1>;
#size-cells = <0>;
-
compatible = "spidev";
- symlink = "/bone/spi/1.1";
-
+ symlink = "bone/spi/1.1";
reg = <1>;
- spi-max-frequency = <16000000>;
};
};
// PWMs & TIMERs
bone_pwm_1: &ehrpwm2 {
-
+ symlink = "bone/pwm/1";
};
bone_pwmss_1: &epwmss2 {
};
bone_pwm_2: &ehrpwm1 {
-
+ symlink = "bone/pwm/2";
};
bone_pwmss_2: &epwmss1 {
-};
\ No newline at end of file
+};
+
+// CAN
+bone_can_0: ¬_available {
+ // Not available on BBAI
+};
+
+bone_can_1: &dcan2 {
+ symlink = "bone/can/1";
+};
--
GitLab
From 5a8715f704e7606588a2c805dc61037f2c5b5605 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Tue, 21 Jul 2020 14:31:44 +0530
Subject: [PATCH 45/86] BBB: fix spi nodes & add CAN bus
---
src/arm/bbb-bone-buses.dtsi | 200 +++++++++++++++++++-----------------
1 file changed, 104 insertions(+), 96 deletions(-)
diff --git a/src/arm/bbb-bone-buses.dtsi b/src/arm/bbb-bone-buses.dtsi
index 3598e88c..43bb3d04 100644
--- a/src/arm/bbb-bone-buses.dtsi
+++ b/src/arm/bbb-bone-buses.dtsi
@@ -6,7 +6,8 @@
* published by the Free Software Foundation.
*/
-#include <dt-bindings/board/am335x-bbb-pins.h>
+#include <dt-bindings/board/am335x-bone-pins.h>
+#include <dt-bindings/gpio/gpio.h>
/********/
/* LEDs */
@@ -17,357 +18,367 @@
compatible = "gpio-leds";
led_P8_03 {
- gpios = <&gpio1 6 0>;
+ gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_04 {
- gpios = <&gpio1 7 0>;
+ gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_05 {
- gpios = <&gpio1 2 0>;
+ gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_06 {
- gpios = <&gpio1 3 0>;
+ gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_07 {
- gpios = <&gpio2 2 0>;
+ gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_08 {
- gpios = <&gpio2 3 0>;
+ gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_09 {
- gpios = <&gpio2 5 0>;
+ gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_10 {
- gpios = <&gpio2 4 0>;
+ gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_11 {
- gpios = <&gpio1 13 0>;
+ gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_12 {
- gpios = <&gpio1 12 0>;
+ gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_13 {
- gpios = <&gpio0 23 0>;
+ gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_14 {
- gpios = <&gpio0 26 0>;
+ gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_15 {
- gpios = <&gpio1 15 0>;
+ gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_16 {
- gpios = <&gpio1 14 0>;
+ gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_17 {
- gpios = <&gpio0 27 0>;
+ gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_18 {
- gpios = <&gpio2 1 0>;
+ gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_19 {
- gpios = <&gpio0 22 0>;
+ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_20 {
- gpios = <&gpio1 31 0>;
+ gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_21 {
- gpios = <&gpio1 30 0>;
+ gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_22 {
- gpios = <&gpio1 5 0>;
+ gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_23 {
- gpios = <&gpio1 4 0>;
+ gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_24 {
- gpios = <&gpio1 1 0>;
+ gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_25 {
- gpios = <&gpio1 0 0>;
+ gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_26 {
- gpios = <&gpio1 29 0>;
+ gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_27 {
- gpios = <&gpio2 22 0>;
+ gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_28 {
- gpios = <&gpio2 24 0>;
+ gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_29 {
- gpios = <&gpio2 23 0>;
+ gpios = <&gpio2 23 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_30 {
- gpios = <&gpio2 25 0>;
+ gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_31 {
- gpios = <&gpio0 10 0>;
+ gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_32 {
- gpios = <&gpio0 11 0>;
+ gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_33 {
- gpios = <&gpio0 9 0>;
+ gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_34 {
- gpios = <&gpio2 17 0>;
+ gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_35 {
- gpios = <&gpio0 8 0>;
+ gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_36 {
- gpios = <&gpio2 16 0>;
+ gpios = <&gpio2 16 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_37 {
- gpios = <&gpio2 14 0>;
+ gpios = <&gpio2 14 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_38 {
- gpios = <&gpio2 15 0>;
+ gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_39 {
- gpios = <&gpio2 12 0>;
+ gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_40 {
- gpios = <&gpio2 13 0>;
+ gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_41 {
- gpios = <&gpio2 10 0>;
+ gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_42 {
- gpios = <&gpio2 11 0>;
+ gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_43 {
- gpios = <&gpio2 8 0>;
+ gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_44 {
- gpios = <&gpio2 9 0>;
+ gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_45 {
- gpios = <&gpio2 6 0>;
+ gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P8_46 {
- gpios = <&gpio2 7 0>;
+ gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_11 {
- gpios = <&gpio0 30 0>;
+ gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_12 {
- gpios = <&gpio1 28 0>;
+ gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_13 {
- gpios = <&gpio0 31 0>;
+ gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_14 {
- gpios = <&gpio1 18 0>;
+ gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_15 {
- gpios = <&gpio1 16 0>;
+ gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_16 {
- gpios = <&gpio1 19 0>;
+ gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_17 {
- gpios = <&gpio0 5 0>;
+ gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_18 {
- gpios = <&gpio0 4 0>;
+ gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_19 {
- gpios = <&gpio0 13 0>;
+ gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_20 {
- gpios = <&gpio0 12 0>;
+ gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_21 {
- gpios = <&gpio0 3 0>;
+ gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_22 {
- gpios = <&gpio0 2 0>;
+ gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_23 {
- gpios = <&gpio1 17 0>;
+ gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_24 {
- gpios = <&gpio0 15 0>;
+ gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_25 {
- gpios = <&gpio3 21 0>;
+ gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_26 {
- gpios = <&gpio0 14 0>;
+ gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_27 {
- gpios = <&gpio3 19 0>;
+ gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_28 {
- gpios = <&gpio3 17 0>;
+ gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_29 {
- gpios = <&gpio3 15 0>;
+ gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_30 {
- gpios = <&gpio3 16 0>;
+ gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_31 {
- gpios = <&gpio3 14 0>;
+ gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_41 {
- gpios = <&gpio0 20 0>;
+ gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_91 {
- gpios = <&gpio3 20 0>;
+ gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_42 {
- gpios = <&gpio0 7 0>;
+ gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_P9_92 {
- gpios = <&gpio3 18 0>;
+ gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
led_A15 {
- gpios = <&gpio0 19 0>;
+ gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
};
};
+// For dummy refrence when peripheral is not available.
+&{/} {
+ not_available: not_available {
+ // Use ¬_available when required.
+ // This node is responsible to create these entries,
+ // /sys/firmware/devicetree/base/__symbols__/not_available
+ // /sys/firmware/devicetree/base/not_available
+ };
+};
+
// UARTs
bone_uart_1: &uart1 {
symlink = "bone/uart/1";
@@ -395,70 +406,58 @@ bone_i2c_1: &i2c1 {
};
bone_i2c_2: &i2c2 {
+ // Already in use for cape EEPROM reading.
symlink = "bone/i2c/2";
};
// use only when bone_i2c_2 is not in use
bone_i2c_2a: &i2c2 {
- // symlink = "bone/i2c/2a";
+ symlink = "bone/i2c/2a";
};
// use only when bone_i2c_1 is not in use
bone_i2c_3: &i2c1 {
- // symlink = "bone/i2c/3";
+ symlink = "bone/i2c/3";
};
// SPIs
-bone_spi_0: &spi0 {
+&spi0 {
#address-cells = <1>;
#size-cells = <0>;
- channel@0 {
+ bone_spi_0_0: channel@0 {
#address-cells = <1>;
#size-cells = <0>;
-
compatible = "spidev";
- symlink = "/bone/spi/0.0";
-
+ symlink = "bone/spi/0.0";
reg = <0>;
- spi-max-frequency = <16000000>;
- spi-cpha;
};
};
-bone_spi_1: &spi1 {
+&spi1 {
#address-cells = <1>;
#size-cells = <0>;
- ti,pio-mode; /* disable dma when used as an overlay, dma gets stuck at 160 bits... */
-
- channel@0 {
+ bone_spi_1_0: channel@0 {
#address-cells = <1>;
#size-cells = <0>;
-
compatible = "spidev";
- symlink = "/bone/spi/1.0";
-
+ symlink = "bone/spi/1.0";
reg = <0>;
- spi-max-frequency = <16000000>;
- spi-cpha;
};
- channel@1 {
+ bone_spi_1_1: channel@1 {
#address-cells = <1>;
#size-cells = <0>;
-
compatible = "spidev";
- symlink = "/bone/spi/1.1";
-
+ symlink = "bone/spi/1.1";
reg = <1>;
- spi-max-frequency = <16000000>;
};
};
// PWMs & TIMERs
bone_pwm_1: &ehrpwm1 {
-
+ symlink = "bone/pwm/1";
};
bone_pwmss_1: &epwmss1 {
@@ -466,9 +465,18 @@ bone_pwmss_1: &epwmss1 {
};
bone_pwm_2: &ehrpwm2 {
-
+ symlink = "bone/pwm/2";
};
bone_pwmss_2: &epwmss2 {
};
+
+// CAN
+bone_can_0: &dcan0 {
+ symlink = "bone/can/0";
+};
+
+bone_can_1: &dcan1 {
+ symlink = "bone/can/1";
+};
--
GitLab
From 96385ac7cf3a190d5564ae9b8997bb153bff1fb1 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Tue, 21 Jul 2020 14:41:42 +0530
Subject: [PATCH 46/86] add bone bus PWM0
---
src/arm/bbai-bone-buses.dtsi | 12 +++++++++++-
src/arm/bbb-bone-buses.dtsi | 10 +++++++++-
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/src/arm/bbai-bone-buses.dtsi b/src/arm/bbai-bone-buses.dtsi
index 3f554b97..95cf2c63 100644
--- a/src/arm/bbai-bone-buses.dtsi
+++ b/src/arm/bbai-bone-buses.dtsi
@@ -438,12 +438,21 @@ bone_i2c_3: &i2c3 {
};
};
-// PWMs & TIMERs
+// PWMs
+bone_pwm_0: ¬_available {
+ // Not available on BBAI
+};
+
+bone_pwmss_0: ¬_available {
+ // Not available on BBAI
+};
+
bone_pwm_1: &ehrpwm2 {
symlink = "bone/pwm/1";
};
bone_pwmss_1: &epwmss2 {
+
};
bone_pwm_2: &ehrpwm1 {
@@ -451,6 +460,7 @@ bone_pwm_2: &ehrpwm1 {
};
bone_pwmss_2: &epwmss1 {
+
};
// CAN
diff --git a/src/arm/bbb-bone-buses.dtsi b/src/arm/bbb-bone-buses.dtsi
index 43bb3d04..1538bb70 100644
--- a/src/arm/bbb-bone-buses.dtsi
+++ b/src/arm/bbb-bone-buses.dtsi
@@ -455,7 +455,15 @@ bone_i2c_3: &i2c1 {
};
};
-// PWMs & TIMERs
+// PWMs
+bone_pwm_0: &ehrpwm0 {
+ symlink = "bone/pwm/0";
+};
+
+bone_pwmss_0: &epwmss0 {
+
+};
+
bone_pwm_1: &ehrpwm1 {
symlink = "bone/pwm/1";
};
--
GitLab
From 00917839630a3b7120b702cabae86e8a83009242 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Tue, 21 Jul 2020 21:43:48 +0530
Subject: [PATCH 47/86] BBAI: dummy nodes for bone bus pwm0
These nodes are just to avoid FDT error while using src/arm/BONE-PWM0-00A0.dts
---
src/arm/am572x-bone-common-univ.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/src/arm/am572x-bone-common-univ.dtsi b/src/arm/am572x-bone-common-univ.dtsi
index a98d218e..d88c1116 100644
--- a/src/arm/am572x-bone-common-univ.dtsi
+++ b/src/arm/am572x-bone-common-univ.dtsi
@@ -1109,6 +1109,11 @@
/* Default pinmux configuration of P9_21 (P9_21_default_pin) */
P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
P9_21B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin1a_vsync0.gpio3_3,spi2_d1.off */
+ P9_21_pwm_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = <
+ /* To avoid FDT_ERROR on BBAI when using BONE-PWM0-00A0.dtbo */
+ /* Default pinmux configuration of P9_21 (P9_21_default_pin) */
+ P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_21B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin1a_vsync0.gpio3_3,spi2_d1.off */
/* P9_22a (ball B26) gpio6_19 */
P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
@@ -1141,6 +1146,11 @@
/* Default pinmux configuration of P9_22 (P9_22_default_pin) */
P9_22A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
P9_22B( PIN_OUTPUT | MUX_MODE15) >; }; /* xref_clk2.gpio6_19, spi2_sclk.off */
+ P9_22_pwm_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
+ /* To avoid FDT_ERROR on BBAI when using BONE-PWM0-00A0.dtbo */
+ /* Default pinmux configuration of P9_22 (P9_22_default_pin) */
+ P9_22A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_22B( PIN_OUTPUT | MUX_MODE15) >; }; /* xref_clk2.gpio6_19, spi2_sclk.off */
/* P9_23 (ball A22) gpio7_11 */
P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = <
--
GitLab
From ab632f38d7ce0388f41076132ac715ddb3a0a506 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 22 Jul 2020 02:29:01 +0530
Subject: [PATCH 48/86] remove symlinks for CAN & PWM
---
src/arm/bbai-bone-buses.dtsi | 6 +++---
src/arm/bbb-bone-buses.dtsi | 10 +++++-----
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/src/arm/bbai-bone-buses.dtsi b/src/arm/bbai-bone-buses.dtsi
index 95cf2c63..461a4e30 100644
--- a/src/arm/bbai-bone-buses.dtsi
+++ b/src/arm/bbai-bone-buses.dtsi
@@ -448,7 +448,7 @@ bone_pwmss_0: ¬_available {
};
bone_pwm_1: &ehrpwm2 {
- symlink = "bone/pwm/1";
+
};
bone_pwmss_1: &epwmss2 {
@@ -456,7 +456,7 @@ bone_pwmss_1: &epwmss2 {
};
bone_pwm_2: &ehrpwm1 {
- symlink = "bone/pwm/2";
+
};
bone_pwmss_2: &epwmss1 {
@@ -469,5 +469,5 @@ bone_can_0: ¬_available {
};
bone_can_1: &dcan2 {
- symlink = "bone/can/1";
+
};
diff --git a/src/arm/bbb-bone-buses.dtsi b/src/arm/bbb-bone-buses.dtsi
index 1538bb70..c6c4527e 100644
--- a/src/arm/bbb-bone-buses.dtsi
+++ b/src/arm/bbb-bone-buses.dtsi
@@ -457,7 +457,7 @@ bone_i2c_3: &i2c1 {
// PWMs
bone_pwm_0: &ehrpwm0 {
- symlink = "bone/pwm/0";
+
};
bone_pwmss_0: &epwmss0 {
@@ -465,7 +465,7 @@ bone_pwmss_0: &epwmss0 {
};
bone_pwm_1: &ehrpwm1 {
- symlink = "bone/pwm/1";
+
};
bone_pwmss_1: &epwmss1 {
@@ -473,7 +473,7 @@ bone_pwmss_1: &epwmss1 {
};
bone_pwm_2: &ehrpwm2 {
- symlink = "bone/pwm/2";
+
};
bone_pwmss_2: &epwmss2 {
@@ -482,9 +482,9 @@ bone_pwmss_2: &epwmss2 {
// CAN
bone_can_0: &dcan0 {
- symlink = "bone/can/0";
+
};
bone_can_1: &dcan1 {
- symlink = "bone/can/1";
+
};
--
GitLab
From 785fe6feeccb74423478ccd743580834d5951d4d Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 29 Jul 2020 17:18:20 +0530
Subject: [PATCH 49/86] BBAI: Enabling timer PWM functionality
---
src/arm/dra7.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/src/arm/dra7.dtsi b/src/arm/dra7.dtsi
index 83c1706f..fe0f996a 100644
--- a/src/arm/dra7.dtsi
+++ b/src/arm/dra7.dtsi
@@ -900,6 +900,7 @@
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer1";
ti,timer-alwon;
+ ti,timer-pwm;
clock-names = "fck";
clocks = <&wkupaon_clkctrl DRA7_TIMER1_CLKCTRL 24>;
};
@@ -910,6 +911,7 @@
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer2";
clocks = <&l4per_clkctrl DRA7_TIMER2_CLKCTRL 24>;
+ ti,timer-pwm;
clock-names = "fck";
};
@@ -919,6 +921,7 @@
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer3";
clocks = <&l4per_clkctrl DRA7_TIMER3_CLKCTRL 24>;
+ ti,timer-pwm;
clock-names = "fck";
};
@@ -928,6 +931,7 @@
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer4";
clocks = <&l4per_clkctrl DRA7_TIMER4_CLKCTRL 24>;
+ ti,timer-pwm;
clock-names = "fck";
};
@@ -937,6 +941,7 @@
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer5";
clocks = <&ipu_clkctrl DRA7_TIMER5_CLKCTRL 24>;
+ ti,timer-pwm;
clock-names = "fck";
};
@@ -946,6 +951,7 @@
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer6";
clocks = <&ipu_clkctrl DRA7_TIMER6_CLKCTRL 24>;
+ ti,timer-pwm;
clock-names = "fck";
};
@@ -955,6 +961,7 @@
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer7";
clocks = <&ipu_clkctrl DRA7_TIMER7_CLKCTRL 24>;
+ ti,timer-pwm;
clock-names = "fck";
};
@@ -964,6 +971,7 @@
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer8";
clocks = <&ipu_clkctrl DRA7_TIMER8_CLKCTRL 24>;
+ ti,timer-pwm;
clock-names = "fck";
};
@@ -973,6 +981,7 @@
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer9";
clocks = <&l4per_clkctrl DRA7_TIMER9_CLKCTRL 24>;
+ ti,timer-pwm;
clock-names = "fck";
};
@@ -982,6 +991,7 @@
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer10";
clocks = <&l4per_clkctrl DRA7_TIMER10_CLKCTRL 24>;
+ ti,timer-pwm;
clock-names = "fck";
};
@@ -991,6 +1001,7 @@
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer11";
clocks = <&l4per_clkctrl DRA7_TIMER11_CLKCTRL 24>;
+ ti,timer-pwm;
clock-names = "fck";
};
@@ -1000,6 +1011,7 @@
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer12";
ti,timer-alwon;
+ ti,timer-pwm;
ti,timer-secure;
clocks = <&wkupaon_clkctrl DRA7_TIMER12_CLKCTRL 24>;
clock-names = "fck";
@@ -1011,6 +1023,7 @@
interrupts = <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer13";
clocks = <&l4per_clkctrl DRA7_TIMER13_CLKCTRL 24>;
+ ti,timer-pwm;
clock-names = "fck";
};
@@ -1020,6 +1033,7 @@
interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer14";
clocks = <&l4per_clkctrl DRA7_TIMER14_CLKCTRL 24>;
+ ti,timer-pwm;
clock-names = "fck";
};
@@ -1029,6 +1043,7 @@
interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer15";
clocks = <&l4per_clkctrl DRA7_TIMER15_CLKCTRL 24>;
+ ti,timer-pwm;
clock-names = "fck";
};
@@ -1038,6 +1053,7 @@
interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer16";
clocks = <&l4per_clkctrl DRA7_TIMER16_CLKCTRL 24>;
+ ti,timer-pwm;
clock-names = "fck";
};
--
GitLab
From 56c68f5378895355f291b81830b2ede8fa020492 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 29 Jul 2020 17:19:08 +0530
Subject: [PATCH 50/86] BBB: dummy timer nodes
These nodes prevents FDT_ERROR to occur.
---
src/arm/am335x-bone-common-univ.dtsi | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/src/arm/am335x-bone-common-univ.dtsi b/src/arm/am335x-bone-common-univ.dtsi
index cd6ddc48..d86ceca9 100644
--- a/src/arm/am335x-bone-common-univ.dtsi
+++ b/src/arm/am335x-bone-common-univ.dtsi
@@ -922,6 +922,12 @@
P9_21( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d0.ehrpwm0b */
P9_21_pru_uart_pin: pinmux_P9_21_pru_uart_pin { pinctrl-single,pins = <
P9_21( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d0.pr1_uart0_rts_n */
+
+ /* P9_21 dummy nodes for unavailable bone bus */
+ P9_21_timer_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = <
+ /* To avoid FDT_ERROR on BBBWL/BBB when using BONE-TIMER_PWM_3.dtbo */
+ /* Default pinmux configuration of P9_21 (P9_21_default_pin) */
+ P9_21( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
/* P9_22 (ZCZ ball A17) gpio0_2 */
P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
@@ -944,7 +950,13 @@
P9_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_sclk.ehrpwm0a */
P9_22_pru_uart_pin: pinmux_P9_22_pru_uart_pin { pinctrl-single,pins = <
P9_22( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_sclk.pr1_uart0_cts_n */
-
+
+ /* P9_22 dummy nodes for unavailable bone bus */
+ P9_22_timer_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
+ /* To avoid FDT_ERROR on BBBWL/BBB when using BONE-TIMER_PWM_5.dtbo */
+ /* Default pinmux configuration of P9_21 (P9_21_default_pin) */
+ P9_22( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+
/* P9_23 (ZCZ ball V14) gpio1_17 */
P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = <
P9_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
--
GitLab
From e40c15c6d4118e856c6504058c14d0f7d1bc0792 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 29 Jul 2020 17:19:25 +0530
Subject: [PATCH 51/86] BBAI: add Timer nodes
---
src/arm/am572x-bone-common-univ.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/src/arm/am572x-bone-common-univ.dtsi b/src/arm/am572x-bone-common-univ.dtsi
index d88c1116..a6052016 100644
--- a/src/arm/am572x-bone-common-univ.dtsi
+++ b/src/arm/am572x-bone-common-univ.dtsi
@@ -1094,6 +1094,9 @@
P9_21_qep_pin: pinmux_P9_21_qep_pin { pinctrl-single,pins = <
P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10)
P9_21B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin1a_vsync0.eQEP1_strobe,spi2_d1.off */
+ P9_21_timer_pin: pinmux_P9_21_timer_pin { pinctrl-single,pins = <
+ P9_21A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7)
+ P9_21B( PIN_OUTPUT | MUX_MODE15) >; }; /* vin1a_vsync0.timer13,spi2_d1.off */
/* P9_21b (ball B22) gpio7_15 */
P9_21_spi_pin: pinmux_P9_21_spi_pin { pinctrl-single,pins = <
@@ -1131,6 +1134,9 @@
P9_22_gpio_input_pin: pinmux_P9_22_gpio_input_pin { pinctrl-single,pins = <
P9_22A( PIN_INPUT | MUX_MODE14)
P9_22B( PIN_OUTPUT | MUX_MODE15) >; }; /* xref_clk2.gpio6_19, spi2_sclk.off */
+ P9_22_timer_pin: pinmux_P9_22_timer_pin { pinctrl-single,pins = <
+ P9_22A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10)
+ P9_22B( PIN_OUTPUT | MUX_MODE15) >; }; /* xref_clk2.timer15, spi2_sclk.off */
/* P9_22b (ball A26) gpio7_14 */
P9_22_spi_sclk_pin: pinmux_P9_22_spi_sclk_pin { pinctrl-single,pins = <
--
GitLab
From 61a7b0e95387ea74e514fd142e26681dcdd26946 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 29 Jul 2020 17:22:34 +0530
Subject: [PATCH 52/86] BBAI: add timer nodes and update spi nodes
---
src/arm/bbai-bone-buses.dtsi | 57 ++++++++++++++++++------------------
1 file changed, 28 insertions(+), 29 deletions(-)
diff --git a/src/arm/bbai-bone-buses.dtsi b/src/arm/bbai-bone-buses.dtsi
index 461a4e30..eef70343 100644
--- a/src/arm/bbai-bone-buses.dtsi
+++ b/src/arm/bbai-bone-buses.dtsi
@@ -404,38 +404,12 @@ bone_i2c_3: &i2c3 {
};
// SPIs
-&mcspi2 {
- #address-cells = <1>;
- #size-cells = <0>;
-
- bone_spi_0: channel@0 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "spidev";
- symlink = "bone/spi/0.0";
- reg = <0>;
- };
-};
+bone_spi_0: &mcspi2 {
-&mcspi3 {
- #address-cells = <1>;
- #size-cells = <0>;
+};
- bone_spi_1_0: channel@0 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "spidev";
- symlink = "bone/spi/1.0";
- reg = <0>;
- };
+bone_spi_1: &mcspi3 {
- bone_spi_1_1: channel@1 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "spidev";
- symlink = "bone/spi/1.1";
- reg = <1>;
- };
};
// PWMs
@@ -471,3 +445,28 @@ bone_can_0: ¬_available {
bone_can_1: &dcan2 {
};
+
+// PWM_TIMERs
+bone_timer_0: &timer10 {
+
+};
+
+bone_timer_1: &timer11 {
+
+};
+
+bone_timer_2: &timer12 {
+
+};
+
+bone_timer_3: &timer13 {
+
+};
+
+bone_timer_4: &timer14 {
+
+};
+
+bone_timer_5: &timer15 {
+
+};
--
GitLab
From 0411005d76555255dc68c84552e83df586908a53 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 29 Jul 2020 17:22:46 +0530
Subject: [PATCH 53/86] BBB: add timer nodes and update spi nodes
---
src/arm/bbb-bone-buses.dtsi | 57 ++++++++++++++++++-------------------
1 file changed, 28 insertions(+), 29 deletions(-)
diff --git a/src/arm/bbb-bone-buses.dtsi b/src/arm/bbb-bone-buses.dtsi
index c6c4527e..ed6258a0 100644
--- a/src/arm/bbb-bone-buses.dtsi
+++ b/src/arm/bbb-bone-buses.dtsi
@@ -421,38 +421,12 @@ bone_i2c_3: &i2c1 {
};
// SPIs
-&spi0 {
- #address-cells = <1>;
- #size-cells = <0>;
-
- bone_spi_0_0: channel@0 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "spidev";
- symlink = "bone/spi/0.0";
- reg = <0>;
- };
+bone_spi_0: &spi0 {
+
};
-&spi1 {
- #address-cells = <1>;
- #size-cells = <0>;
+bone_spi_1: &spi1 {
- bone_spi_1_0: channel@0 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "spidev";
- symlink = "bone/spi/1.0";
- reg = <0>;
- };
-
- bone_spi_1_1: channel@1 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "spidev";
- symlink = "bone/spi/1.1";
- reg = <1>;
- };
};
// PWMs
@@ -488,3 +462,28 @@ bone_can_0: &dcan0 {
bone_can_1: &dcan1 {
};
+
+// PWM_TIMERs
+bone_timer_0: &timer6 {
+
+};
+
+bone_timer_1: &timer4 {
+
+};
+
+bone_timer_2: &timer7 {
+
+};
+
+bone_timer_3: ¬_available {
+ // Not available on BBBWl/BBB
+};
+
+bone_timer_4: &timer5 {
+
+};
+
+bone_timer_5: ¬_available {
+ // Not available on BBBWL/BBB
+};
--
GitLab
From 97a6f0daa9eab09633a2064f68a53b107d6e3968 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Tue, 4 Aug 2020 23:23:53 +0530
Subject: [PATCH 54/86] BBAI: add & update PRU nodes
---
src/arm/am572x-bone-common-univ.dtsi | 239 +++++++++++++++++++++++----
1 file changed, 205 insertions(+), 34 deletions(-)
diff --git a/src/arm/am572x-bone-common-univ.dtsi b/src/arm/am572x-bone-common-univ.dtsi
index a6052016..5f1ce406 100644
--- a/src/arm/am572x-bone-common-univ.dtsi
+++ b/src/arm/am572x-bone-common-univ.dtsi
@@ -29,6 +29,10 @@
P8_03( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
P8_03_gpio_input_pin: pinmux_P8_03_gpio_input_pin { pinctrl-single,pins = <
P8_03( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat6.gpio1_24 */
+ P8_03_pruin_pin: pinmux_P8_03_pruin_pin { pinctrl-single,pins = <
+ P8_03( PIN_INPUT | MUX_MODE12) >; }; /* mmc3_dat6.pr2_pru0_gpi10 */
+ P8_03_pruout_pin: pinmux_P8_03_pruout_pin { pinctrl-single,pins = <
+ P8_03( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_dat6.pr2_pru0_gpo10 */
/* P8_04 (ball AB5) gpio1_25 */
P8_04_default_pin: pinmux_P8_04_default_pin { pinctrl-single,pins = <
@@ -41,6 +45,10 @@
P8_04( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
P8_04_gpio_input_pin: pinmux_P8_04_gpio_input_pin { pinctrl-single,pins = <
P8_04( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat7.gpio1_25 */
+ P8_04_pruin_pin: pinmux_P8_04_pruin_pin { pinctrl-single,pins = <
+ P8_04( PIN_INPUT | MUX_MODE12) >; }; /* mmc3_dat7.pr2_pru0_gpi11 */
+ P8_04_pruout_pin: pinmux_P8_04_pruout_pin { pinctrl-single,pins = <
+ P8_04( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_dat7.pr2_pru0_gpo11 */
/* P8_05 (ball AC9) gpio7_1 */
P8_05_default_pin: pinmux_P8_05_default_pin { pinctrl-single,pins = <
@@ -53,6 +61,10 @@
P8_05( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
P8_05_gpio_input_pin: pinmux_P8_05_gpio_input_pin { pinctrl-single,pins = <
P8_05( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat2.gpio7_1 */
+ P8_05_pruin_pin: pinmux_P8_05_pruin_pin { pinctrl-single,pins = <
+ P8_05( PIN_INPUT | MUX_MODE12) >; }; /* mmc3_dat2.pr2_pru0_gpi06 */
+ P8_05_pruout_pin: pinmux_P8_05_pruout_pin { pinctrl-single,pins = <
+ P8_05( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_dat2.pr2_pru0_gpo06 */
/* P8_06 (ball AC3) gpio7_2 */
P8_06_default_pin: pinmux_P8_06_default_pin { pinctrl-single,pins = <
@@ -65,6 +77,10 @@
P8_06( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
P8_06_gpio_input_pin: pinmux_P8_06_gpio_input_pin { pinctrl-single,pins = <
P8_06( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat3.gpio7_2 */
+ P8_06_pruin_pin: pinmux_P8_06_pruin_pin { pinctrl-single,pins = <
+ P8_06( PIN_INPUT | MUX_MODE12) >; }; /* mmc3_dat3.pr2_pru0_gpi07 */
+ P8_06_pruout_pin: pinmux_P8_06_pruout_pin { pinctrl-single,pins = <
+ P8_06( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_dat3.pr2_pru0_gpo07 */
/* P8_07 (ball G14) gpio6_5*/
P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = <
@@ -79,6 +95,10 @@
P8_07( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr14.gpio6_5 */
P8_07_timer_pin: pinmux_P8_07_timer_pin { pinctrl-single,pins = <
P8_07( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr14.timer11 */
+ P8_07_pruin_pin: pinmux_P8_07_pruin_pin { pinctrl-single,pins = <
+ P8_07( PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr14.pr2_pru1_gpi16 */
+ P8_07_pruout_pin: pinmux_P8_07_pruout_pin { pinctrl-single,pins = <
+ P8_07( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr14.pr2_pru1_gpo16 */
/* P8_08 (ball F14) gpio6_6 */
P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = <
@@ -93,6 +113,10 @@
P8_08( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr15.gpio6_6 */
P8_08_timer_pin: pinmux_P8_08_timer_pin { pinctrl-single,pins = <
P8_08( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr15.timer12 */
+ P8_08_pruin_pin: pinmux_P8_08_pruin_pin { pinctrl-single,pins = <
+ P8_08( PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr15.pr2_pru0_gpi20 */
+ P8_08_pruout_pin: pinmux_P8_08_pruout_pin { pinctrl-single,pins = <
+ P8_08( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr15.pr2_pru0_gpo20 */
/* P8_09 (ball E17) gpio6_18 */
P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = <
@@ -107,6 +131,10 @@
P8_09( PIN_INPUT | MUX_MODE14) >; }; /* xref_clk1.gpio6_18 */
P8_09_timer_pin: pinmux_P8_09_timer_pin { pinctrl-single,pins = <
P8_09( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* xref_clk1.timer14 */
+ P8_09_pruin_pin: pinmux_P8_09_pruin_pin { pinctrl-single,pins = <
+ P8_09( PIN_INPUT | MUX_MODE12) >; }; /* xref_clk1.pr2_pru1_gpi06 */
+ P8_09_pruout_pin: pinmux_P8_09_pruout_pin { pinctrl-single,pins = <
+ P8_09( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* xref_clk1.pr2_pru1_gpo06 */
/* P8_10 (ball A13) gpio6_4 */
P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = <
@@ -121,6 +149,10 @@
P8_10( PIN_INPUT | MUX_MODE14) >; }; /* mcasp1_axr13.gpio6_4 */
P8_10_timer_pin: pinmux_P8_10_timer_pin { pinctrl-single,pins = <
P8_10( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* mcasp1_axr13.timer10 */
+ P8_10_pruin_pin: pinmux_P8_10_pruin_pin { pinctrl-single,pins = <
+ P8_10( PIN_INPUT | MUX_MODE12) >; }; /* mcasp1_axr13.pr2_pru1_gpi15 */
+ P8_10_pruout_pin: pinmux_P8_10_pruout_pin { pinctrl-single,pins = <
+ P8_10( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mcasp1_axr13.pr2_pru1_gpo15 */
/* P8_11 (ball AH4) gpio3_11 */
P8_11_default_pin: pinmux_P8_11_default_pin { pinctrl-single,pins = <
@@ -135,6 +167,8 @@
P8_11( PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d7.gpio3_11 */
P8_11_qep_pin: pinmux_P8_11_qep_pin { pinctrl-single,pins = <
P8_11( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_d7.eQEP2B_in */
+ P8_11_pruin_pin: pinmux_P8_11_pruin_pin { pinctrl-single,pins = <
+ P8_11( PIN_INPUT | MUX_MODE12) >; }; /* vin1a_d7.pr1_pru0_gpi4 */
P8_11_pruout_pin: pinmux_P8_11_pruout_pin { pinctrl-single,pins = <
P8_11( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d7.pr1_pru0_gpo4 */
@@ -151,6 +185,8 @@
P8_12( PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d6.gpio3_10 */
P8_12_qep_pin: pinmux_P8_12_qep_pin { pinctrl-single,pins = <
P8_12( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin1a_d6.eQEP2A_in */
+ P8_12_pruin_pin: pinmux_P8_12_pruin_pin { pinctrl-single,pins = <
+ P8_12( PIN_INPUT | MUX_MODE12) >; }; /* vin1a_d6.pr1_pru0_gpi3 */
P8_12_pruout_pin: pinmux_P8_12_pruout_pin { pinctrl-single,pins = <
P8_12( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d6.pr1_pru0_gpo3 */
@@ -167,6 +203,10 @@
P8_13( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d10.gpio4_11 */
P8_13_pwm_pin: pinmux_P8_13_pwm_pin { pinctrl-single,pins = <
P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d10.ehrpwm2B */
+ P8_13_pruin_pin: pinmux_P8_13_pruin_pin { pinctrl-single,pins = <
+ P8_13( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d10.pr1_pru1_gpi7 */
+ P8_13_pruout_pin: pinmux_P8_13_pruout_pin { pinctrl-single,pins = <
+ P8_13( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d10.pr1_pru1_gpo7 */
/* P8_14 (ball D5) gpio4_13*/
P8_14_default_pin: pinmux_P8_14_default_pin { pinctrl-single,pins = <
@@ -181,6 +221,10 @@
P8_14( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d12.gpio4_13 */
P8_14_pwm_pin: pinmux_P8_14_pwm_pin { pinctrl-single,pins = <
P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d12.eCAP2_in_PWM2_out */
+ P8_14_pruin_pin: pinmux_P8_14_pruin_pin { pinctrl-single,pins = <
+ P8_14( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d12.pr1_pru1_gpi9 */
+ P8_14_pruout_pin: pinmux_P8_14_pruout_pin { pinctrl-single,pins = <
+ P8_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d12.pr1_pru1_gpo9 */
/* P8_15a (ball D1) gpio4_3*/
P8_15_default_pin: pinmux_P8_15_default_pin { pinctrl-single,pins = <
@@ -206,6 +250,9 @@
P8_15_pruin_pin: pinmux_P8_15_pruin_pin { pinctrl-single,pins = <
P8_15B( PIN_INPUT | MUX_MODE12)
P8_15A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d19.pr1_pru1_gpi16, vin2a_d2.off */
+ P8_15_pruout_pin: pinmux_P8_15_pruout_pin { pinctrl-single,pins = <
+ P8_15B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P8_15A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d19.pr1_pru1_gp016, vin2a_d2.off */
/* P8_16 (ball B4) gpio4_29 */
P8_16_default_pin: pinmux_P8_16_default_pin { pinctrl-single,pins = <
@@ -220,6 +267,8 @@
P8_16( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d21.gpio4_29 */
P8_16_pruin_pin: pinmux_P8_16_pruin_pin { pinctrl-single,pins = <
P8_16( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d21.pr1_pru1_gpi18 */
+ P8_16_pruout_pin: pinmux_P8_16_pruout_pin { pinctrl-single,pins = <
+ P8_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d21.pr1_pru1_gpo18 */
/* P8_17 (ball A7) gpio8_18 */
P8_17_default_pin: pinmux_P8_17_default_pin { pinctrl-single,pins = <
@@ -232,6 +281,10 @@
P8_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
P8_17_gpio_input_pin: pinmux_P8_17_gpio_input_pin { pinctrl-single,pins = <
P8_17( PIN_INPUT | MUX_MODE14) >; }; /* vout1_d18.gpio8_18 */
+ P8_17_pruin_pin: pinmux_P8_17_pruin_pin { pinctrl-single,pins = <
+ P8_17( PIN_INPUT | MUX_MODE12) >; }; /* vout1_d18.pr2_pru0_gpi15 */
+ P8_17_pruout_pin: pinmux_P8_17_pruout_pin { pinctrl-single,pins = <
+ P8_17( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vout1_d18.pr2_pru0_gpo15 */
/* P8_18 (ball F5) gpio4_9 */
P8_18_default_pin: pinmux_P8_18_default_pin { pinctrl-single,pins = <
@@ -246,6 +299,10 @@
P8_18( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d8.gpio4_9 */
P8_18_qep_pin: pinmux_P8_18_qep_pin { pinctrl-single,pins = <
P8_18( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d8.eQEP2_strobe */
+ P8_18_pruin_pin: pinmux_P8_18_pruin_pin { pinctrl-single,pins = <
+ P8_18( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d8.pr1_pru1_gpi5 */
+ P8_18_pruout_pin: pinmux_P8_18_pruout_pin { pinctrl-single,pins = <
+ P8_18( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d8.pr1_pru1_gpo5 */
/* P8_19 (ball E6) gpio4_10 */
P8_19_default_pin: pinmux_P8_19_default_pin { pinctrl-single,pins = <
@@ -260,6 +317,10 @@
P8_19( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d9.gpio4_10 */
P8_19_pwm_pin: pinmux_P8_19_pwm_pin { pinctrl-single,pins = <
P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d9.ehrpwm2A */
+ P8_19_pruin_pin: pinmux_P8_19_pruin_pin { pinctrl-single,pins = <
+ P8_19( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d9.pr1_pru1_gpi6 */
+ P8_19_pruout_pin: pinmux_P8_19_pruout_pin { pinctrl-single,pins = <
+ P8_19( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d9.pr1_pru1_gpo6 */
/* P8_20 (ball AC4) gpio6_30 */
P8_20_default_pin: pinmux_P8_20_default_pin { pinctrl-single,pins = <
@@ -304,6 +365,10 @@
P8_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
P8_22_gpio_input_pin: pinmux_P8_22_gpio_input_pin { pinctrl-single,pins = <
P8_22( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat5.gpio1_23 */
+ P8_22_pruout_pin: pinmux_P8_22_pruout_pin { pinctrl-single,pins = <
+ P8_22( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_dat5.pr2_pru0_gpo9 */
+ P8_22_pruin_pin: pinmux_P8_22_pruin_pin { pinctrl-single,pins = <
+ P8_22( PIN_INPUT | MUX_MODE12) >; }; /* mmc3_dat5.pr2_pru0_gpi9 */
/* P8_23 (ball AC8) gpio1_22 */
P8_23_default_pin: pinmux_P8_23_default_pin { pinctrl-single,pins = <
@@ -316,6 +381,10 @@
P8_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
P8_23_gpio_input_pin: pinmux_P8_23_gpio_input_pin { pinctrl-single,pins = <
P8_23( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat4.gpio1_22 */
+ P8_23_pruout_pin: pinmux_P8_23_pruout_pin { pinctrl-single,pins = <
+ P8_23( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_dat4.pr2_pru0_gpo8 */
+ P8_23_pruin_pin: pinmux_P8_23_pruin_pin { pinctrl-single,pins = <
+ P8_23( PIN_INPUT | MUX_MODE12) >; }; /* mmc3_dat4.pr2_pru0_gpi8 */
/* P8_24 (ball AC6) gpio7_0 */
P8_24_default_pin: pinmux_P8_24_default_pin { pinctrl-single,pins = <
@@ -328,6 +397,10 @@
P8_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
P8_24_gpio_input_pin: pinmux_P8_24_gpio_input_pin { pinctrl-single,pins = <
P8_24( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat1.gpio7_0 */
+ P8_24_pruout_pin: pinmux_P8_24_pruout_pin { pinctrl-single,pins = <
+ P8_24( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_dat1.pr2_pru0_gpo5 */
+ P8_24_pruin_pin: pinmux_P8_24_pruin_pin { pinctrl-single,pins = <
+ P8_24( PIN_INPUT | MUX_MODE12) >; }; /* mmc3_dat1.pr2_pru0_gpi5 */
/* P8_25 (ball AC7) gpio6_31 */
P8_25_default_pin: pinmux_P8_25_default_pin { pinctrl-single,pins = <
@@ -340,6 +413,10 @@
P8_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
P8_25_gpio_input_pin: pinmux_P8_25_gpio_input_pin { pinctrl-single,pins = <
P8_25( PIN_INPUT | MUX_MODE14) >; }; /* mmc3_dat0.gpio6_31 */
+ P8_25_pruout_pin: pinmux_P8_25_pruout_pin { pinctrl-single,pins = <
+ P8_25( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* mmc3_dat0.pr2_pru0_gpo4 */
+ P8_25_pruin_pin: pinmux_P8_25_pruin_pin { pinctrl-single,pins = <
+ P8_25( PIN_INPUT | MUX_MODE12) >; }; /* mmc3_dat0.pr2_pru0_gpi4 */
/* P8_26 (ball B3) gpio4_28 */
P8_26_default_pin: pinmux_P8_26_default_pin { pinctrl-single,pins = <
@@ -352,6 +429,10 @@
P8_26( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
P8_26_gpio_input_pin: pinmux_P8_26_gpio_input_pin { pinctrl-single,pins = <
P8_26( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d20.gpio4_28 */
+ P8_26_pruin_pin: pinmux_P8_26_pruin_pin { pinctrl-single,pins = <
+ P8_26( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d20.pr1_pru1_gpi17 */
+ P8_26_pruout_pin: pinmux_P8_26_pruout_pin { pinctrl-single,pins = <
+ P8_26( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d20.pr1_pru1_gpo17 */
/* P8_27a (ball E11) gpio4_23 */
P8_27_default_pin: pinmux_P8_27_default_pin { pinctrl-single,pins = <
@@ -372,14 +453,14 @@
P8_27_lcd_pin: pinmux_P8_27_lcd_pin { pinctrl-single,pins = <
P8_27A( PIN_OUTPUT | MUX_MODE0)
P8_27B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_vsync.vout1_vsync, vout1_d19.off */
-
- /* P8_27b (ball A8) gpio8_19 */
P8_27_pruout_pin: pinmux_P8_27_pruout_pin { pinctrl-single,pins = <
- P8_27B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
- P8_27A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d19.pr2_pru0_gpo16, vout1_vsync.off */
+ P8_27A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P8_27B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_vsync.pr2_pru1_gpo17, vout1_d19.off */
P8_27_pruin_pin: pinmux_P8_27_pruin_pin { pinctrl-single,pins = <
- P8_27B( PIN_INPUT | MUX_MODE12)
- P8_27A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d19.pr2_pru0_gpi16, vout1_vsync.off */
+ P8_27A( PIN_INPUT | MUX_MODE12)
+ P8_27B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_vsync.pr2_pru1_gpi17, vout1_d19.off */
+
+ /* P8_27b (ball A8) gpio8_19 */
/* P8_28a (ball D11) gpio4_19 */
P8_28_default_pin: pinmux_P8_28_default_pin { pinctrl-single,pins = <
@@ -485,6 +566,12 @@
P8_31_lcd_pin: pinmux_P8_31_lcd_pin { pinctrl-single,pins = <
P8_31A( PIN_OUTPUT | MUX_MODE0)
P8_31B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d14.vout1_d14, mcasp4_axr0.off */
+ P8_31_pruout_pin: pinmux_P8_31_pruout_pin { pinctrl-single,pins = <
+ P8_31A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P8_31B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d14.pr2_pru0_gpo11, mcasp4_axr0.off */
+ P8_31_pruin_pin: pinmux_P8_31_pruin_pin { pinctrl-single,pins = <
+ P8_31A( PIN_INPUT | MUX_MODE12)
+ P8_31B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d14.pr2_pru0_gpi11, mcasp4_axr0.off */
/* P8_31b (ball G16) */
P8_31_uart_pin: pinmux_P8_31_uart_pin { pinctrl-single,pins = <
@@ -515,6 +602,12 @@
P8_32_uart_pin: pinmux_P8_32_uart_pin { pinctrl-single,pins = <
P8_32B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4)
P8_32A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp4_axr1.uart4_txd, vout1_d15.off */
+ P8_32_pruout_pin: pinmux_P8_32_pruout_pin { pinctrl-single,pins = <
+ P8_32B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P8_32A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp4_axr1.pr2_pru1_gpo0, vout1_d15.off */
+ P8_32_pruin_pin: pinmux_P8_32_pruin_pin { pinctrl-single,pins = <
+ P8_32B( PIN_INPUT | MUX_MODE12)
+ P8_32A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp4_axr1.pr2_pru1_gpi0, vout1_d15.off */
/* P8_33a (ball C6) gpio8_13 */
P8_33_default_pin: pinmux_P8_33_default_pin { pinctrl-single,pins = <
@@ -535,6 +628,12 @@
P8_33_lcd_pin: pinmux_P8_33_lcd_pin { pinctrl-single,pins = <
P8_33A( PIN_OUTPUT | MUX_MODE0)
P8_33B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d13.vout1_d13, vin1a_fld0.off */
+ P8_33_pruout_pin: pinmux_P8_33_pruout_pin { pinctrl-single,pins = <
+ P8_33A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P8_33B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d13.pr2_pru0_gpo10, vin1a_fld0.off */
+ P8_33_pruin_pin: pinmux_P8_33_pruin_pin { pinctrl-single,pins = <
+ P8_33A( PIN_INPUT | MUX_MODE12)
+ P8_33B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d13.pr2_pru0_gpi10, vin1a_fld0.off */
/* P8_33b (ball AF9) gpio3_1 */
P8_33_qep_pin: pinmux_P8_33_qep_pin { pinctrl-single,pins = <
@@ -561,6 +660,12 @@
P8_34_lcd_pin: pinmux_P8_34_lcd_pin { pinctrl-single,pins = <
P8_34A( PIN_OUTPUT | MUX_MODE0)
P8_34B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d11.vout1_d11, vin2a_vsync0.off */
+ P8_34_pruout_pin: pinmux_P8_34_pruout_pin { pinctrl-single,pins = <
+ P8_34A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P8_34B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d11.pr2_pru0_gpo8, vin2a_vsync0.off */
+ P8_34_pruin_pin: pinmux_P8_34_pruin_pin { pinctrl-single,pins = <
+ P8_34A( PIN_INPUT | MUX_MODE12)
+ P8_34B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d11.pr2_pru0_gpi8, vin2a_vsync0.off */
/* P8_34b (ball G6) gpio4_0 */
P8_34_pwm_pin: pinmux_P8_34_pwm_pin { pinctrl-single,pins = <
@@ -586,6 +691,12 @@
P8_35_lcd_pin: pinmux_P8_35_lcd_pin { pinctrl-single,pins = <
P8_35A( PIN_OUTPUT | MUX_MODE0)
P8_35B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d12.vout1_d12, vin1a_de0.off */
+ P8_35_pruout_pin: pinmux_P8_35_pruout_pin { pinctrl-single,pins = <
+ P8_35A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P8_35B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d12.pr2_pru0_gpo9, vin1a_de0.off */
+ P8_35_pruin_pin: pinmux_P8_35_pruin_pin { pinctrl-single,pins = <
+ P8_35A( PIN_INPUT | MUX_MODE12)
+ P8_35B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d12.pr2_pru0_gpi9, vin1a_de0.off */
/* P8_35b (ball AD9) gpio3_0 */
P8_35_qep_pin: pinmux_P8_35_qep_pin { pinctrl-single,pins = <
@@ -611,6 +722,12 @@
P8_36_lcd_pin: pinmux_P8_36_lcd_pin { pinctrl-single,pins = <
P8_36A( PIN_OUTPUT | MUX_MODE0)
P8_36B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d10.vout1_d10, vin2a_d0.off */
+ P8_36_pruout_pin: pinmux_P8_36_pruout_pin { pinctrl-single,pins = <
+ P8_36A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P8_36B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d10.pr2_pru0_gpo7, vin2a_d0.off */
+ P8_36_pruin_pin: pinmux_P8_36_pruin_pin { pinctrl-single,pins = <
+ P8_36A( PIN_INPUT | MUX_MODE12)
+ P8_36B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d10.pr2_pru0_gpi7, vin2a_d0.off */
/* P8_36b (ball F2) gpio4_1 */
P8_36_pwm_pin: pinmux_P8_36_pwm_pin { pinctrl-single,pins = <
@@ -636,6 +753,12 @@
P8_37_lcd_pin: pinmux_P8_37_lcd_pin { pinctrl-single,pins = <
P8_37A( PIN_OUTPUT | MUX_MODE0)
P8_37B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d8.vout1_d8, mcasp4_fsx.off */
+ P8_37_pruout_pin: pinmux_P8_37_pruout_pin { pinctrl-single,pins = <
+ P8_37A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P8_37B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d8.pr2_pru0_gpo5, mcasp4_fsx.off */
+ P8_37_pruin_pin: pinmux_P8_37_pruin_pin { pinctrl-single,pins = <
+ P8_37A( PIN_INPUT | MUX_MODE12)
+ P8_37B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d8.pr2_pru0_gpi5, mcasp4_fsx.off */
/* P8_37b (ball A21) */
P8_37_uart_pin: pinmux_P8_37_uart_pin { pinctrl-single,pins = <
@@ -661,6 +784,12 @@
P8_38_lcd_pin: pinmux_P8_38_lcd_pin { pinctrl-single,pins = <
P8_38A( PIN_OUTPUT | MUX_MODE0)
P8_38B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d9.vout1_d9, mcasp4_aclkx.off */
+ P8_38_pruout_pin: pinmux_P8_38_pruout_pin { pinctrl-single,pins = <
+ P8_38A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P8_38B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d9.pr2_pru0_gpo6, mcasp4_aclkx.off */
+ P8_38_pruin_pin: pinmux_P8_38_pruin_pin { pinctrl-single,pins = <
+ P8_38A( PIN_INPUT | MUX_MODE12)
+ P8_38B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d9.pr2_pru0_gpi6, mcasp4_aclkx.off */
/* P8_38b (ball C18) */
P8_38_uart_pin: pinmux_P8_38_uart_pin { pinctrl-single,pins = <
@@ -794,14 +923,14 @@
P8_45_lcd_pin: pinmux_P8_45_lcd_pin { pinctrl-single,pins = <
P8_45A( PIN_OUTPUT | MUX_MODE0)
P8_45B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d0.vout1_d0, vout1_d16.off */
-
- /* P8_45b (ball B7) gpio8_16 */
P8_45_pruout_pin: pinmux_P8_45_pruout_pin { pinctrl-single,pins = <
- P8_45B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
- P8_45A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d16.pr2_pru0_gpo13, vout1_d0.off */
+ P8_45A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P8_45B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d0.pr2_pru1_gpo18, vout1_d16.off */
P8_45_pruin_pin: pinmux_P8_45_pruin_pin { pinctrl-single,pins = <
- P8_45B( PIN_INPUT | MUX_MODE12)
- P8_45A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d16.pr2_pru0_gpi13, vout1_d0.off */
+ P8_45A( PIN_INPUT | MUX_MODE12)
+ P8_45B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d0.pr2_pru1_gpi18, vout1_d16.off */
+
+ /* P8_45b (ball B7) gpio8_16 */
/* P8_46a (ball G10) gpio8_1 */
P8_46_default_pin: pinmux_P8_46_default_pin { pinctrl-single,pins = <
@@ -822,14 +951,14 @@
P8_46_lcd_pin: pinmux_P8_46_lcd_pin { pinctrl-single,pins = <
P8_46A( PIN_OUTPUT | MUX_MODE0)
P8_46B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d1.vout1_d1, vout1_d23.off */
-
- /* P8_46b (ball A10) gpio8_23 */
P8_46_pruout_pin: pinmux_P8_46_pruout_pin { pinctrl-single,pins = <
- P8_46B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
- P8_46A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d23.pr2_pru0_gpo20, vout1_d1.off */
+ P8_46A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P8_46B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d1.pr2_pru1_gpo19, vout1_d23.off */
P8_46_pruin_pin: pinmux_P8_46_pruin_pin { pinctrl-single,pins = <
- P8_46B( PIN_INPUT | MUX_MODE12)
- P8_46A( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d23.pr2_pru0_gpi20, vout1_d1.off */
+ P8_46A( PIN_INPUT | MUX_MODE12)
+ P8_46B( PIN_OUTPUT | MUX_MODE15) >; }; /* vout1_d1.pr2_pru1_gpi19, vout1_d23.off */
+
+ /* P8_46b (ball A10) gpio8_23 */
/************************/
/* P9 Header */
@@ -859,6 +988,12 @@
P9_11_uart_pin: pinmux_P9_11_uart_pin { pinctrl-single,pins = <
P9_11A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4)
P9_11B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp3_axr0.uart5_rxd, vout1_d17.off */
+ P9_11_pruout_pin: pinmux_P9_11_pruout_pin { pinctrl-single,pins = <
+ P9_11A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P9_11B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp3_axr0.pr2_pru0_gpo14, vout1_d17.off */
+ P9_11_pruin_pin: pinmux_P9_11_pruin_pin { pinctrl-single,pins = <
+ P9_11A( PIN_INPUT | MUX_MODE12)
+ P9_11B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp3_axr0.pr2_pru0_gpi14, vout1_d17.off */
/* P9_11b (ball B8) gpio8_17 */
P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = <
@@ -893,6 +1028,12 @@
P9_13_uart_pin: pinmux_P9_13_uart_pin { pinctrl-single,pins = <
P9_13A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4)
P9_13B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp3_axr1.uart5_txd, usb1_drvvbus.off */
+ P9_13_pruout_pin: pinmux_P9_13_pruout_pin { pinctrl-single,pins = <
+ P9_13A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P9_13B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp3_axr1.pr2_pru0_gpo15, usb1_drvvbus.off */
+ P9_13_pruin_pin: pinmux_P9_13_pruin_pin { pinctrl-single,pins = <
+ P9_13A( PIN_INPUT | MUX_MODE12)
+ P9_13B( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp3_axr1.pr2_pru0_gpi15, usb1_drvvbus.off */
/* P9_13b (ball AB10) gpio6_12 */
P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = <
@@ -925,6 +1066,10 @@
P9_14( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d17.gpio4_25 */
P9_14_pwm_pin: pinmux_P9_14_pwm_pin { pinctrl-single,pins = <
P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d17.ehrpwm3A */
+ P9_14_pruin_pin: pinmux_P9_14_pruin_pin { pinctrl-single,pins = <
+ P9_14( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d17.pr1_pru1_gpi14 */
+ P9_14_pruout_pin: pinmux_P9_14_pruout_pin { pinctrl-single,pins = <
+ P9_14( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d17.pr1_pru1_gpo14 */
/* P9_15 (ball AG4) gpio3_12 */
P9_15_default_pin: pinmux_P9_15_default_pin { pinctrl-single,pins = <
@@ -937,6 +1082,10 @@
P9_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
P9_15_gpio_input_pin: pinmux_P9_15_gpio_input_pin { pinctrl-single,pins = <
P9_15( PIN_INPUT | MUX_MODE14) >; }; /* vin1a_d8.gpio3_12 */
+ P9_15_pruin_pin: pinmux_P9_15_pruin_pin { pinctrl-single,pins = <
+ P9_15( PIN_INPUT | MUX_MODE12) >; }; /* vin1a_d8.pr1_pru0_gpi5 */
+ P9_15_pruout_pin: pinmux_P9_15_pruout_pin { pinctrl-single,pins = <
+ P9_15( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin1a_d8.pr1_pru0_gpo5 */
/* P9_16 (ball C5) gpio4_26 */
P9_16_default_pin: pinmux_P9_16_default_pin { pinctrl-single,pins = <
@@ -951,34 +1100,44 @@
P9_16( PIN_INPUT | MUX_MODE14) >; }; /* vin2a_d18.gpio4_26 */
P9_16_pwm_pin: pinmux_P9_16_pwm_pin { pinctrl-single,pins = <
P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE10) >; }; /* vin2a_d18.ehrpwm3B */
+ P9_16_pruin_pin: pinmux_P9_16_pruin_pin { pinctrl-single,pins = <
+ P9_16( PIN_INPUT | MUX_MODE12) >; }; /* vin2a_d18.pr1_pru1_gpi15 */
+ P9_16_pruout_pin: pinmux_P9_16_pruout_pin { pinctrl-single,pins = <
+ P9_16( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13) >; }; /* vin2a_d18.pr1_pru1_gpo15 */
/* P9_17a (ball B24) gpio7_17 */
P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = <
- P9_17A( PIN_OUTPUT_PULLUP |
- INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_17B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_cs0.gpio7_17, mcasp1_axr1.off */
P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = <
- P9_17A( PIN_OUTPUT |
- INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17A( PIN_OUTPUT | INPUT_EN | MUX_MODE14)
+ P9_17B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_cs0.gpio7_17, mcasp1_axr1.off */
P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = <
- P9_17A( PIN_OUTPUT_PULLUP |
- INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE14)
+ P9_17B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_cs0.gpio7_17, mcasp1_axr1.off */
P9_17_gpio_pd_pin: pinmux_P9_17_gpio_pd_pin { pinctrl-single,pins = <
- P9_17A( PIN_OUTPUT_PULLDOWN |
- INPUT_EN | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17A( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE14)
+ P9_17B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_cs0.gpio7_17, mcasp1_axr1.off */
P9_17_gpio_input_pin: pinmux_P9_17_gpio_input_pin { pinctrl-single,pins = <
- P9_17A(
- PIN_INPUT | MUX_MODE14) P9_17B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_cs0.gpio7_17 */
+ P9_17A( PIN_INPUT | MUX_MODE14)
+ P9_17B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_cs0.gpio7_17, mcasp1_axr1.off */
P9_17_spi_cs_pin: pinmux_P9_17_spi_cs_pin { pinctrl-single,pins = <
- P9_17A( PIN_OUTPUT_PULLUP |
- INPUT_EN | MUX_MODE0) P9_17B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_cs0.spi2_cs0 */
+ P9_17A( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0)
+ P9_17B( PIN_OUTPUT | MUX_MODE15) >; }; /* spi2_cs0.spi2_cs0, mcasp1_axr1.off */
/* P9_17b (ball F12) gpio5_3 */
P9_17_i2c_pin: pinmux_P9_17_i2c_pin { pinctrl-single,pins = <
- P9_17B( PIN_OUTPUT_PULLUP |
- INPUT_EN | MUX_MODE10) P9_17A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr1.i2c5_scl */
+ P9_17B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10)
+ P9_17A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr1.i2c5_scl, spi2_cs0.off */
P9_17_uart_pin: pinmux_P9_17_pru_uart_pin { pinctrl-single,pins = <
- P9_17B( PIN_OUTPUT_PULLUP |
- INPUT_EN | MUX_MODE3) P9_17A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr1.uart6_txd */
+ P9_17B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3)
+ P9_17A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr1.uart6_txd, spi2_cs0.off */
+ P9_17_pruout_pin: pinmux_P9_17_pruout_pin { pinctrl-single,pins = <
+ P9_17B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P9_17A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr1.pr2_pru1_gpo9, spi2_cs0.off */
+ P9_17_pruin_pin: pinmux_P9_17_pruin_pin { pinctrl-single,pins = <
+ P9_17B( PIN_INPUT | MUX_MODE12)
+ P9_17A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr1.pr2_pru1_gpi9, spi2_cs0.off */
/* P9_18a (ball G17) gpio7_16 */
P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = <
@@ -1007,6 +1166,12 @@
P9_18_uart_pin: pinmux_P9_18_pru_uart_pin { pinctrl-single,pins = <
P9_18B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3)
P9_18A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr0.uart6_rxd, spi2_d0.off */
+ P9_18_pruout_pin: pinmux_P9_18_pruout_pin { pinctrl-single,pins = <
+ P9_18B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P9_18A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr0.pr2_pru1_gpo8, spi2_d0.off */
+ P9_18_pruin_pin: pinmux_P9_18_pruin_pin { pinctrl-single,pins = <
+ P9_18B( PIN_INPUT | MUX_MODE12)
+ P9_18A( PIN_OUTPUT | MUX_MODE15) >; }; /* mcasp1_axr0.pr2_pru1_gpi8, spi2_d0.off */
/* P9_19a (ball R6) gpio7_3 */
P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = <
@@ -1032,6 +1197,12 @@
P9_19_qep_pin: pinmux_P9_19_qep_pin { pinctrl-single,pins = <
P9_19B( PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE10)
P9_19A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d5.eQEP2A_in, gpmc_a0.off */
+ P9_19_pruin_pin: pinmux_P9_19_pruin_pin { pinctrl-single,pins = <
+ P9_19B( PIN_INPUT | MUX_MODE12)
+ P9_19A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d5.pr1_pru1_gpi2, gpmc_a0.off */
+ P9_19_pruout_pin: pinmux_P9_19_pruout_pin { pinctrl-single,pins = <
+ P9_19B( PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE13)
+ P9_19A( PIN_OUTPUT | MUX_MODE15) >; }; /* vin2a_d5.pr1_pru1_gpo2, gpmc_a0.off */
/* P9_19 dummy nodes for unavailable bone bus */
P9_19_can_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = <
--
GitLab
From 858d97dd10d54c269ee20007eb985d65061282c7 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 15:09:26 +0530
Subject: [PATCH 55/86] Bone UART 1 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-UART1.dts | 41 +++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
create mode 100644 src/arm/overlays/BONE-UART1.dts
diff --git a/src/arm/overlays/BONE-UART1.dts b/src/arm/overlays/BONE-UART1.dts
new file mode 100644
index 00000000..daf284ca
--- /dev/null
+++ b/src/arm/overlays/BONE-UART1.dts
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /dev/bone/uart/1
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-UART1 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P9_24_pinmux { pinctrl-0 = <&P9_24_uart_pin>; }; /* UART TX*/
+ P9_26_pinmux { pinctrl-0 = <&P9_26_uart_pin>; }; /* UART RX*/
+};
+
+/*
+ * See these files for the phandles (&bone_*) and other bone bus nodes
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+ */
+&bone_uart_1 {
+ status = "okay";
+};
\ No newline at end of file
--
GitLab
From dbd8a210dc5eb10e71b3bec39a48080fe473e886 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 15:11:22 +0530
Subject: [PATCH 56/86] Bone UART 2 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-UART2.dts | 41 +++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
create mode 100644 src/arm/overlays/BONE-UART2.dts
diff --git a/src/arm/overlays/BONE-UART2.dts b/src/arm/overlays/BONE-UART2.dts
new file mode 100644
index 00000000..fe0fffeb
--- /dev/null
+++ b/src/arm/overlays/BONE-UART2.dts
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /dev/bone/uart/2
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-UART2 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P9_21_pinmux { pinctrl-0 = <&P9_21_uart_pin>; }; /* UART TX*/
+ P9_22_pinmux { pinctrl-0 = <&P9_22_uart_pin>; }; /* UART RX*/
+};
+
+/*
+ * See these files for the phandles (&bone_*) and other bone bus nodes
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+ */
+&bone_uart_2 {
+ status = "okay";
+};
\ No newline at end of file
--
GitLab
From ec39ade39cf419a2a88181362f613a32c240c133 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 15:11:36 +0530
Subject: [PATCH 57/86] Bone UART 3 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-UART3.dts | 40 +++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
create mode 100644 src/arm/overlays/BONE-UART3.dts
diff --git a/src/arm/overlays/BONE-UART3.dts b/src/arm/overlays/BONE-UART3.dts
new file mode 100644
index 00000000..c0e20c10
--- /dev/null
+++ b/src/arm/overlays/BONE-UART3.dts
@@ -0,0 +1,40 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /dev/bone/uart/3 (only on BBBWL/BBB)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-UART3 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P9_42_pinmux { pinctrl-0 = <&P9_42_uart_pin>; }; /*UART TX*/
+};
+
+/*
+ * See these files for the phandles (&bone_*) and other bone bus nodes
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+ */
+&bone_uart_3 {
+ status = "okay";
+};
\ No newline at end of file
--
GitLab
From 99dffdbf0b9197cf8895c617bfe95c71c7a050b1 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 15:12:15 +0530
Subject: [PATCH 58/86] Bone UART 4 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-UART4.dts | 41 +++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
create mode 100644 src/arm/overlays/BONE-UART4.dts
diff --git a/src/arm/overlays/BONE-UART4.dts b/src/arm/overlays/BONE-UART4.dts
new file mode 100644
index 00000000..91f52d16
--- /dev/null
+++ b/src/arm/overlays/BONE-UART4.dts
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /dev/bone/uart/4
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-UART4 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P9_13_pinmux { pinctrl-0 = <&P9_13_uart_pin>; }; /* UART TX*/
+ P9_11_pinmux { pinctrl-0 = <&P9_11_uart_pin>; }; /* UART RX*/
+};
+
+/*
+ * See these files for the phandles (&bone_*) and other bone bus nodes
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+ */
+&bone_uart_4 {
+ status = "okay";
+};
\ No newline at end of file
--
GitLab
From 698c62776e3c4047ed8e49b627d2ab64a0833904 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 15:12:33 +0530
Subject: [PATCH 59/86] Bone UART 5 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-UART5.dts | 41 +++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
create mode 100644 src/arm/overlays/BONE-UART5.dts
diff --git a/src/arm/overlays/BONE-UART5.dts b/src/arm/overlays/BONE-UART5.dts
new file mode 100644
index 00000000..a9ce2fb7
--- /dev/null
+++ b/src/arm/overlays/BONE-UART5.dts
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /dev/bone/uart/5
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-UART5 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P8_37_pinmux { pinctrl-0 = <&P8_37_uart_pin>; }; /* UART TX*/
+ P8_38_pinmux { pinctrl-0 = <&P8_38_uart_pin>; }; /* UART RX*/
+};
+
+/*
+ * See these files for the phandles (&bone_*) and other bone bus nodes
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+ */
+&bone_uart_5 {
+ status = "okay";
+};
\ No newline at end of file
--
GitLab
From fc94770fbd194c7f083fc7f43e4f7696831b5075 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 15:52:50 +0530
Subject: [PATCH 60/86] Bone SPI0_0 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-SPI0_0.dts | 51 ++++++++++++++++++++++++++++++++
1 file changed, 51 insertions(+)
create mode 100644 src/arm/overlays/BONE-SPI0_0.dts
diff --git a/src/arm/overlays/BONE-SPI0_0.dts b/src/arm/overlays/BONE-SPI0_0.dts
new file mode 100644
index 00000000..9e8c0f74
--- /dev/null
+++ b/src/arm/overlays/BONE-SPI0_0.dts
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /dev/bone/spi/0.0
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-SPI0_0 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P9_17_pinmux { pinctrl-0 = <&P9_17_spi_cs_pin>; }; /* CS*/
+ P9_18_pinmux { pinctrl-0 = <&P9_18_spi_pin>; }; /* MOSI */
+ P9_21_pinmux { pinctrl-0 = <&P9_21_spi_pin>; }; /* MISO */
+ P9_22_pinmux { pinctrl-0 = <&P9_22_spi_sclk_pin>; }; /* CLK */
+};
+
+/*
+ * See these files for the phandles (&bone_*) and other bone bus nodes
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+ */
+&bone_spi_0 {
+ status = "okay";
+
+ channel@0 {
+ reg = <0>;
+ compatible = "spidev";
+ symlink = "bone/spi/0.0";
+ spi-max-frequency = <16000000>;
+ spi-cpha;
+ };
+};
\ No newline at end of file
--
GitLab
From 49d60a2a233cf33e7466af769bcecf965551beed Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 15:53:23 +0530
Subject: [PATCH 61/86] Bone SPI1_0 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-SPI1_0.dts | 51 ++++++++++++++++++++++++++++++++
1 file changed, 51 insertions(+)
create mode 100644 src/arm/overlays/BONE-SPI1_0.dts
diff --git a/src/arm/overlays/BONE-SPI1_0.dts b/src/arm/overlays/BONE-SPI1_0.dts
new file mode 100644
index 00000000..a208deb3
--- /dev/null
+++ b/src/arm/overlays/BONE-SPI1_0.dts
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /dev/bone/spi/1.0
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-SPI1_0 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P9_28_pinmux { pinctrl-0 = <&P9_28_spi_cs_pin>; }; /* CS */
+ P9_30_pinmux { pinctrl-0 = <&P9_30_spi_pin>; }; /* MOSI */
+ P9_29_pinmux { pinctrl-0 = <&P9_29_spi_pin>; }; /* MISO */
+ P9_31_pinmux { pinctrl-0 = <&P9_31_spi_sclk_pin>; }; /* CLK */
+};
+
+/*
+ * See these files for the phandles (&bone_*) and other bone bus nodes
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+ */
+&bone_spi_1 {
+ status = "okay";
+
+ channel@0 {
+ reg = <0>;
+ compatible = "spidev";
+ symlink = "bone/spi/1.0";
+ spi-max-frequency = <16000000>;
+ spi-cpha;
+ };
+};
\ No newline at end of file
--
GitLab
From d8514000f768984c1d5c59fdafc4eb0061fbe7d2 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 15:53:43 +0530
Subject: [PATCH 62/86] Bone SPI1_1 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-SPI1_1.dts | 51 ++++++++++++++++++++++++++++++++
1 file changed, 51 insertions(+)
create mode 100644 src/arm/overlays/BONE-SPI1_1.dts
diff --git a/src/arm/overlays/BONE-SPI1_1.dts b/src/arm/overlays/BONE-SPI1_1.dts
new file mode 100644
index 00000000..ca6f537a
--- /dev/null
+++ b/src/arm/overlays/BONE-SPI1_1.dts
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /dev/bone/spi/1.1
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-SPI1_1 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P9_42_pinmux { pinctrl-0 = <&P9_42_spi_cs_pin>; }; /* CS */
+ P9_30_pinmux { pinctrl-0 = <&P9_30_spi_pin>; }; /* MOSI */
+ P9_29_pinmux { pinctrl-0 = <&P9_29_spi_pin>; }; /* MISO */
+ P9_31_pinmux { pinctrl-0 = <&P9_31_spi_sclk_pin>; }; /* CLK */
+};
+
+/*
+ * See these files for the phandles (&bone_*) and other bone bus nodes
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+ */
+&bone_spi_1 {
+ status = "okay";
+
+ channel@1 {
+ reg = <1>;
+ compatible = "spidev";
+ symlink = "bone/spi/1.1";
+ spi-max-frequency = <16000000>;
+ spi-cpha;
+ };
+};
\ No newline at end of file
--
GitLab
From bc8717e6bc1e167e0e194944d333eb45b85f858b Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 16:24:10 +0530
Subject: [PATCH 63/86] Bone PWM0 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-PWM0.dts | 45 ++++++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
create mode 100644 src/arm/overlays/BONE-PWM0.dts
diff --git a/src/arm/overlays/BONE-PWM0.dts b/src/arm/overlays/BONE-PWM0.dts
new file mode 100644
index 00000000..28d45b5e
--- /dev/null
+++ b/src/arm/overlays/BONE-PWM0.dts
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /dev/pwm/ehrpwm0a & /dev/pwm/ehrpwm0a (only on BBBWL/BBB)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-PWM0 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P9_22_pinmux { pinctrl-0 = <&P9_22_pwm_pin>; }; /* PWM A */
+ P9_21_pinmux { pinctrl-0 = <&P9_21_pwm_pin>; }; /* PWM B */
+};
+
+/*
+ * See these files for the phandles (&bone_*) and other bone bus nodes
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+ */
+&bone_pwmss_0 {
+ status = "okay";
+};
+
+&bone_pwm_0 {
+ status = "okay";
+};
\ No newline at end of file
--
GitLab
From bbd9892a038911eb39fa0b1c675db7531168445a Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 16:24:59 +0530
Subject: [PATCH 64/86] Bone PWM1 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-PWM1.dts | 47 ++++++++++++++++++++++++++++++++++
1 file changed, 47 insertions(+)
create mode 100644 src/arm/overlays/BONE-PWM1.dts
diff --git a/src/arm/overlays/BONE-PWM1.dts b/src/arm/overlays/BONE-PWM1.dts
new file mode 100644
index 00000000..8cb4ca17
--- /dev/null
+++ b/src/arm/overlays/BONE-PWM1.dts
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for
+ * BBBWL/BBB: /dev/bone/ehrpwm1a & /dev/bone/ehrpwm1b
+ * BBAI: /dev/bone/ehrpwm2a & /dev/bone/ehrpwm2b
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-PWM1 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P9_14_pinmux { pinctrl-0 = <&P9_14_pwm_pin>; }; /* PWM A */
+ P9_16_pinmux { pinctrl-0 = <&P9_16_pwm_pin>; }; /* PWM B */
+};
+
+/*
+ * See these files for the phandles (&bone_*) and other bone bus nodes
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+ */
+&bone_pwmss_1 {
+ status = "okay";
+};
+
+&bone_pwm_1 {
+ status = "okay";
+};
\ No newline at end of file
--
GitLab
From 7687ddc8f5595dbbd031bab6ecc9077b37f8b678 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 16:25:17 +0530
Subject: [PATCH 65/86] Bone PWM2 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-PWM2.dts | 47 ++++++++++++++++++++++++++++++++++
1 file changed, 47 insertions(+)
create mode 100644 src/arm/overlays/BONE-PWM2.dts
diff --git a/src/arm/overlays/BONE-PWM2.dts b/src/arm/overlays/BONE-PWM2.dts
new file mode 100644
index 00000000..4499e7bb
--- /dev/null
+++ b/src/arm/overlays/BONE-PWM2.dts
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for
+ * BBBWL/BBB: /dev/bone/ehrpwm2a & /dev/bone/ehrpwm2b
+ * BBAI: /dev/bone/ehrpwm1a & /dev/bone/ehrpwm1b
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-PWM2 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P8_19_pinmux { pinctrl-0 = <&P8_19_pwm_pin>; }; /* PWM A */
+ P8_13_pinmux { pinctrl-0 = <&P8_13_pwm_pin>; }; /* PWM B */
+};
+
+/*
+ * See these files for the phandles (&bone_*) and other bone bus nodes
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+ */
+&bone_pwmss_2 {
+ status = "okay";
+};
+
+&bone_pwm_2 {
+ status = "okay";
+};
\ No newline at end of file
--
GitLab
From c3f384e394165964ac21cd5400363400a7e0e6d9 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 16:28:28 +0530
Subject: [PATCH 66/86] Bone I2C1 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-I2C1.dts | 44 ++++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
create mode 100644 src/arm/overlays/BONE-I2C1.dts
diff --git a/src/arm/overlays/BONE-I2C1.dts b/src/arm/overlays/BONE-I2C1.dts
new file mode 100644
index 00000000..095d8fb9
--- /dev/null
+++ b/src/arm/overlays/BONE-I2C1.dts
@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /bone/i2c/1
+ *
+ * Note: This can not be used along with BONE-I2C3-00A0 on BBB as
+ * both uses i2c1 internally and only one can be used at a time.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-I2C1 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P9_18_pinmux { pinctrl-0 = <&P9_18_i2c_pin>; }; /* i2c sda */
+ P9_17_pinmux { pinctrl-0 = <&P9_17_i2c_pin>; }; /* i2c scl */
+};
+
+/*
+ * See these files for the phandles (&bone_*) and other bone bus nodes
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+ */
+&bone_i2c_1 {
+ status = "okay";
+};
\ No newline at end of file
--
GitLab
From 325f2384a08fdfa84b11e507089f2aa4c5105aaf Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 16:28:50 +0530
Subject: [PATCH 67/86] Bone I2C2 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-I2C2.dts | 44 ++++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
create mode 100644 src/arm/overlays/BONE-I2C2.dts
diff --git a/src/arm/overlays/BONE-I2C2.dts b/src/arm/overlays/BONE-I2C2.dts
new file mode 100644
index 00000000..d3e65e3f
--- /dev/null
+++ b/src/arm/overlays/BONE-I2C2.dts
@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /bone/i2c/2
+ *
+ * Note: This can not be used along with BONE-I2C2A-00A0 on BBB as
+ * both uses i2c2 internally and only one can be used at a time.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-I2C2 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P9_20_pinmux { pinctrl-0 = <&P9_20_i2c_pin>; }; /* i2c sda */
+ P9_19_pinmux { pinctrl-0 = <&P9_19_i2c_pin>; }; /* i2c scl */
+};
+
+/*
+ * See these files for the phandles (&bone_*) and other bone bus nodes
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+ */
+&bone_i2c_2 {
+ status = "okay";
+};
\ No newline at end of file
--
GitLab
From 4a93e93feb4eb328001142b4447e4687987483bd Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 16:29:12 +0530
Subject: [PATCH 68/86] Bone I2C2A DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-I2C2A.dts | 44 +++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
create mode 100644 src/arm/overlays/BONE-I2C2A.dts
diff --git a/src/arm/overlays/BONE-I2C2A.dts b/src/arm/overlays/BONE-I2C2A.dts
new file mode 100644
index 00000000..f2b7c46c
--- /dev/null
+++ b/src/arm/overlays/BONE-I2C2A.dts
@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /bone/i2c/2a (only on BBB)
+ *
+ * Note: This can not be used along with BONE-I2C2-00A0 on BBB as
+ * both uses i2c2 internally and only one can be used at a time.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-I2C2A = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P9_22_pinmux { pinctrl-0 = <&P9_22_i2c_pin>; }; /* i2c sda */
+ P9_21_pinmux { pinctrl-0 = <&P9_21_i2c_pin>; }; /* i2c scl */
+};
+
+/*
+ * See these files for the phandles (&bone_*) and other bone bus nodes
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+ */
+&bone_i2c_2a {
+ status = "okay";
+};
\ No newline at end of file
--
GitLab
From 538f6cd6ee10fe22879d11d70aeacf9637b4d086 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 16:29:33 +0530
Subject: [PATCH 69/86] Bone I2C3 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-I2C3.dts | 44 ++++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
create mode 100644 src/arm/overlays/BONE-I2C3.dts
diff --git a/src/arm/overlays/BONE-I2C3.dts b/src/arm/overlays/BONE-I2C3.dts
new file mode 100644
index 00000000..3694f19e
--- /dev/null
+++ b/src/arm/overlays/BONE-I2C3.dts
@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /bone/i2c/3
+ *
+ * Note: This can not be used along with BONE-I2C1-00A0 on BBB as
+ * both uses i2c1 internally and only one can be used at a time.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-I2C3 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P9_26_pinmux { pinctrl-0 = <&P9_26_i2c_pin>;}; /* i2c sda */
+ P9_24_pinmux { pinctrl-0 = <&P9_24_i2c_pin>;}; /* i2c scl */
+};
+
+/*
+ * See these files for the phandles (&bone_*) and other bone bus nodes
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+ */
+&bone_i2c_3 {
+ status = "okay";
+};
\ No newline at end of file
--
GitLab
From eb16532c469490b1e2c76849943f929663c41a40 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 16:36:26 +0530
Subject: [PATCH 70/86] Bone TIMER_PWM0 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-TIMER_PWM_0.dts | 47 +++++++++++++++++++++++++++
1 file changed, 47 insertions(+)
create mode 100644 src/arm/overlays/BONE-TIMER_PWM_0.dts
diff --git a/src/arm/overlays/BONE-TIMER_PWM_0.dts b/src/arm/overlays/BONE-TIMER_PWM_0.dts
new file mode 100644
index 00000000..a693adb1
--- /dev/null
+++ b/src/arm/overlays/BONE-TIMER_PWM_0.dts
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /sys/devices/platform/bone_timer_pwm_0/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-TIMER_PWM_0 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P8_10_pinmux { pinctrl-0 = <&P8_10_timer_pin>; }; /* PWM A */
+};
+
+/*
+ * See these files for the phandles (&bone_*) and other bone bus nodes
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+ */
+&{/} {
+ bone_timer_pwm_0 {
+ compatible = "ti,omap-dmtimer-pwm";
+ #pwm-cells = <3>;
+ ti,timers = <&bone_timer_0>;
+ //ti,prescaler = <0>; /* 0 thru 7 */
+ ti,clock-source = <0x00>; /* timer_sys_ck */
+ //ti,clock-source = <0x01>; /* timer_32k_ck */
+ };
+};
\ No newline at end of file
--
GitLab
From 174f74a43213c57d7ba4901ae916d6c272602f22 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 16:36:47 +0530
Subject: [PATCH 71/86] Bone TIMER_PWM1 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-TIMER_PWM_1.dts | 45 +++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
create mode 100644 src/arm/overlays/BONE-TIMER_PWM_1.dts
diff --git a/src/arm/overlays/BONE-TIMER_PWM_1.dts b/src/arm/overlays/BONE-TIMER_PWM_1.dts
new file mode 100644
index 00000000..961564e6
--- /dev/null
+++ b/src/arm/overlays/BONE-TIMER_PWM_1.dts
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /sys/devices/platform/bone_timer_pwm_1/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-TIMER_PWM_1 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P8_07_pinmux { pinctrl-0 = <&P8_07_timer_pin>; }; /* PWM A */
+};
+
+// See these files for the definition
+// https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+// https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+&{/} {
+ bone_timer_pwm_1 {
+ compatible = "ti,omap-dmtimer-pwm";
+ #pwm-cells = <3>;
+ ti,timers = <&bone_timer_1>;
+ //ti,prescaler = <0>; /* 0 thru 7 */
+ ti,clock-source = <0x00>; /* timer_sys_ck */
+ //ti,clock-source = <0x01>; /* timer_32k_ck */
+ };
+};
\ No newline at end of file
--
GitLab
From 39e60116f52e368835b02636e432115918a02572 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 16:37:11 +0530
Subject: [PATCH 72/86] Bone TIMER_PWM2 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-TIMER_PWM_2.dts | 45 +++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
create mode 100644 src/arm/overlays/BONE-TIMER_PWM_2.dts
diff --git a/src/arm/overlays/BONE-TIMER_PWM_2.dts b/src/arm/overlays/BONE-TIMER_PWM_2.dts
new file mode 100644
index 00000000..af1fd9fa
--- /dev/null
+++ b/src/arm/overlays/BONE-TIMER_PWM_2.dts
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /sys/devices/platform/bone_timer_pwm_2/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-TIMER_PWM_2 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P8_08_pinmux { pinctrl-0 = <&P8_08_timer_pin>; }; /* PWM A */
+};
+
+// See these files for the definition
+// https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+// https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+&{/} {
+ bone_timer_pwm_2 {
+ compatible = "ti,omap-dmtimer-pwm";
+ #pwm-cells = <3>;
+ ti,timers = <&bone_timer_2>;
+ //ti,prescaler = <0>; /* 0 thru 7 */
+ ti,clock-source = <0x00>; /* timer_sys_ck */
+ //ti,clock-source = <0x01>; /* timer_32k_ck */
+ };
+};
\ No newline at end of file
--
GitLab
From be437771b65403fc00f0946dfdf3430c69dee89b Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 16:37:32 +0530
Subject: [PATCH 73/86] Bone TIMER_PWM3 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-TIMER_PWM_3.dts | 45 +++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
create mode 100644 src/arm/overlays/BONE-TIMER_PWM_3.dts
diff --git a/src/arm/overlays/BONE-TIMER_PWM_3.dts b/src/arm/overlays/BONE-TIMER_PWM_3.dts
new file mode 100644
index 00000000..c0670168
--- /dev/null
+++ b/src/arm/overlays/BONE-TIMER_PWM_3.dts
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /sys/devices/platform/bone_timer_pwm_3/ (only on BBAI)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-TIMER_PWM_3 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P9_21_pinmux { pinctrl-0 = <&P9_21_timer_pin>; }; /* PWM A */
+};
+
+// See these files for the definition
+// https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+// https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+&{/} {
+ bone_timer_pwm_3 {
+ compatible = "ti,omap-dmtimer-pwm";
+ #pwm-cells = <3>;
+ ti,timers = <&bone_timer_3>;
+ //ti,prescaler = <0>; /* 0 thru 7 */
+ ti,clock-source = <0x00>; /* timer_sys_ck */
+ //ti,clock-source = <0x01>; /* timer_32k_ck */
+ };
+};
\ No newline at end of file
--
GitLab
From ec370094651e02657b781b845b29dd20d8aa4342 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 16:37:50 +0530
Subject: [PATCH 74/86] Bone TIMER_PWM4 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-TIMER_PWM_4.dts | 45 +++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
create mode 100644 src/arm/overlays/BONE-TIMER_PWM_4.dts
diff --git a/src/arm/overlays/BONE-TIMER_PWM_4.dts b/src/arm/overlays/BONE-TIMER_PWM_4.dts
new file mode 100644
index 00000000..0ebf4aa0
--- /dev/null
+++ b/src/arm/overlays/BONE-TIMER_PWM_4.dts
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /sys/devices/platform/bone_timer_pwm_4/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-TIMER_PWM_4 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P8_09_pinmux { pinctrl-0 = <&P8_09_timer_pin>; }; /* PWM A */
+};
+
+// See these files for the definition
+// https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+// https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+&{/} {
+ bone_timer_pwm_4 {
+ compatible = "ti,omap-dmtimer-pwm";
+ #pwm-cells = <3>;
+ ti,timers = <&bone_timer_4>;
+ //ti,prescaler = <0>; /* 0 thru 7 */
+ ti,clock-source = <0x00>; /* timer_sys_ck */
+ //ti,clock-source = <0x01>; /* timer_32k_ck */
+ };
+};
\ No newline at end of file
--
GitLab
From 484ac6460c1a0d41e16313944faed1b19027ce7e Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 16:38:06 +0530
Subject: [PATCH 75/86] Bone TIMER_PWM5 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-TIMER_PWM_5.dts | 45 +++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
create mode 100644 src/arm/overlays/BONE-TIMER_PWM_5.dts
diff --git a/src/arm/overlays/BONE-TIMER_PWM_5.dts b/src/arm/overlays/BONE-TIMER_PWM_5.dts
new file mode 100644
index 00000000..5199fcc1
--- /dev/null
+++ b/src/arm/overlays/BONE-TIMER_PWM_5.dts
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /sys/devices/platform/bone_timer_pwm_5/ (only on BBAI)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&{/chosen} {
+ overlays {
+ BONE-TIMER_PWM_5 = __TIMESTAMP__;
+ };
+};
+
+/*
+* Update the default pinmux of the pins.
+*/
+&ocp {
+ P9_22_pinmux { pinctrl-0 = <&P9_22_timer_pin>; }; /* PWM A */
+};
+
+// See these files for the definition
+// https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+// https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+&{/} {
+ bone_timer_pwm_5 {
+ compatible = "ti,omap-dmtimer-pwm";
+ #pwm-cells = <3>;
+ ti,timers = <&bone_timer_5>;
+ //ti,prescaler = <0>; /* 0 thru 7 */
+ ti,clock-source = <0x00>; /* timer_sys_ck */
+ //ti,clock-source = <0x01>; /* timer_32k_ck */
+ };
+};
\ No newline at end of file
--
GitLab
From c9294afba49120ac3d301b48945e8c0c300674e1 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 16:49:50 +0530
Subject: [PATCH 76/86] Bone CAN0 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-CAN0.dts | 41 ++++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
create mode 100644 src/arm/overlays/BONE-CAN0.dts
diff --git a/src/arm/overlays/BONE-CAN0.dts b/src/arm/overlays/BONE-CAN0.dts
new file mode 100644
index 00000000..20f372da
--- /dev/null
+++ b/src/arm/overlays/BONE-CAN0.dts
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /dev/bone/can/0 (only on BBB)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-CAN0 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P9_19_pinmux { pinctrl-0 = <&P9_19_can_pin>;}; /* can rx */
+ P9_20_pinmux { pinctrl-0 = <&P9_20_can_pin>;}; /* can tx */
+};
+
+/*
+ * See these files for the phandles (&bone_*) and other bone bus nodes
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+ */
+&bone_can_0 {
+ status = "okay";
+};
\ No newline at end of file
--
GitLab
From 3eef876a1d8e80bbdc5940bbec4527f57d561ff2 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 16:50:06 +0530
Subject: [PATCH 77/86] Bone CAN1 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BONE-CAN1.dts | 41 ++++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
create mode 100644 src/arm/overlays/BONE-CAN1.dts
diff --git a/src/arm/overlays/BONE-CAN1.dts b/src/arm/overlays/BONE-CAN1.dts
new file mode 100644
index 00000000..c2dee4db
--- /dev/null
+++ b/src/arm/overlays/BONE-CAN1.dts
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for /dev/bone/can/1
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BONE-CAN1 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P9_24_pinmux { pinctrl-0 = <&P9_24_can_pin>;}; /* can rx */
+ P9_26_pinmux { pinctrl-0 = <&P9_26_can_pin>;}; /* can tx */
+};
+
+/*
+ * See these files for the phandles (&bone_*) and other bone bus nodes
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/bbb-bone-buses.dtsi
+ */
+&bone_can_1 {
+ status = "okay";
+};
\ No newline at end of file
--
GitLab
From bddd35b7a90dec6478504c77a646dc0e5a3e9076 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 16:53:39 +0530
Subject: [PATCH 78/86] Bone PRU1_0 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BBAI-PRUOUT_PRU1_0.dts | 34 +++++++++++++++++++++++++
1 file changed, 34 insertions(+)
create mode 100644 src/arm/overlays/BBAI-PRUOUT_PRU1_0.dts
diff --git a/src/arm/overlays/BBAI-PRUOUT_PRU1_0.dts b/src/arm/overlays/BBAI-PRUOUT_PRU1_0.dts
new file mode 100644
index 00000000..214bface
--- /dev/null
+++ b/src/arm/overlays/BBAI-PRUOUT_PRU1_0.dts
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for pr1_pru0_gpo* pins
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BBAI-PRUOUT_PRU1_0 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P8_11_pinmux { pinctrl-0 = <&P8_11_pruout_pin>; }; /* pr1_pru0_gpo4 */
+ P8_12_pinmux { pinctrl-0 = <&P8_12_pruout_pin>; }; /* pr1_pru0_gpo3 */
+
+ P9_15_pinmux { pinctrl-0 = <&P9_15_pruout_pin>; }; /* pr1_pru0_gpo5 */
+ P9_26_pinmux { pinctrl-0 = <&P9_26_pruout_pin>; }; /* pr1_pru0_gpo17 */
+};
\ No newline at end of file
--
GitLab
From 2c2ed84cc2131f88b953818f901b179b1a75a89a Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 16:53:56 +0530
Subject: [PATCH 79/86] Bone PRU1_1 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BBAI-PRUOUT_PRU1_1.dts | 44 +++++++++++++++++++++++++
1 file changed, 44 insertions(+)
create mode 100644 src/arm/overlays/BBAI-PRUOUT_PRU1_1.dts
diff --git a/src/arm/overlays/BBAI-PRUOUT_PRU1_1.dts b/src/arm/overlays/BBAI-PRUOUT_PRU1_1.dts
new file mode 100644
index 00000000..c5ce80c0
--- /dev/null
+++ b/src/arm/overlays/BBAI-PRUOUT_PRU1_1.dts
@@ -0,0 +1,44 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for pr1_pru1_gpo* pins
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BBAI-PRUOUT_PRU1_1 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P8_13_pinmux { pinctrl-0 = <&P8_13_pruout_pin>; }; /* pr1_pru1_gpo7 */
+ P8_14_pinmux { pinctrl-0 = <&P8_14_pruout_pin>; }; /* pr1_pru1_gpo9 */
+ P8_15_pinmux { pinctrl-0 = <&P8_15_pruout_pin>; }; /* pr1_pru1_gpo16 */
+ P8_16_pinmux { pinctrl-0 = <&P8_16_pruout_pin>; }; /* pr1_pru1_gpo18 */
+ P8_18_pinmux { pinctrl-0 = <&P8_18_pruout_pin>; }; /* pr1_pru1_gpo5 */
+ P8_19_pinmux { pinctrl-0 = <&P8_19_pruout_pin>; }; /* pr1_pru1_gpo6 */
+ P8_26_pinmux { pinctrl-0 = <&P8_26_pruout_pin>; }; /* pr1_pru1_gpo17 */
+
+ P9_14_pinmux { pinctrl-0 = <&P9_14_pruout_pin>; }; /* pr1_pru1_gpo14 */
+ P9_16_pinmux { pinctrl-0 = <&P9_16_pruout_pin>; }; /* pr1_pru1_gpo15 */
+ P9_19_pinmux { pinctrl-0 = <&P9_19_pruout_pin>; }; /* pr1_pru1_gpo2 */
+ P9_20_pinmux { pinctrl-0 = <&P9_20_pruout_pin>; }; /* pr1_pru1_gpo1 */
+ P9_27_pinmux { pinctrl-0 = <&P9_27_pruout_pin>; }; /* pr1_pru1_gpo11 */
+ P9_41_pinmux { pinctrl-0 = <&P9_41_pruout_pin>; }; /* pr1_pru1_gpo3 */
+ P9_42_pinmux { pinctrl-0 = <&P9_42_pruout_pin>; }; /* pr1_pru1_gpo10 */
+};
\ No newline at end of file
--
GitLab
From 84b5ce793076d3809156d6919fb8551bae1043ea Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 16:54:38 +0530
Subject: [PATCH 80/86] Bone PRU2_0 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BBAI-PRUOUT_PRU2_0.dts | 72 +++++++++++++++++++++++++
1 file changed, 72 insertions(+)
create mode 100644 src/arm/overlays/BBAI-PRUOUT_PRU2_0.dts
diff --git a/src/arm/overlays/BBAI-PRUOUT_PRU2_0.dts b/src/arm/overlays/BBAI-PRUOUT_PRU2_0.dts
new file mode 100644
index 00000000..436836d8
--- /dev/null
+++ b/src/arm/overlays/BBAI-PRUOUT_PRU2_0.dts
@@ -0,0 +1,72 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for pr2_pru0_gpo* pins
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BBAI-PRUOUT_PRU2_0 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P8_44_pinmux { pinctrl-0 = <&P8_44_pruout_pin>; }; /* pr2_pru0_gpo0 */
+ P8_41_pinmux { pinctrl-0 = <&P8_41_pruout_pin>; }; /* pr2_pru0_gpo1 */
+
+ P8_42_pinmux { pinctrl-0 = <&P8_42_pruout_pin>; }; /* pr2_pru0_gpo2 */
+ P8_21_pinmux { pinctrl-0 = <&P8_21_pruout_pin>; }; /* pr2_pru0_gpo2 */
+
+ P8_39_pinmux { pinctrl-0 = <&P8_39_pruout_pin>; }; /* pr2_pru0_gpo3 */
+ P8_20_pinmux { pinctrl-0 = <&P8_20_pruout_pin>; }; /* pr2_pru0_gpo3 */
+
+ P8_40_pinmux { pinctrl-0 = <&P8_40_pruout_pin>; }; /* pr2_pru0_gpo4 */
+ P8_25_pinmux { pinctrl-0 = <&P8_25_pruout_pin>; }; /* pr2_pru0_gpo4 */
+
+ P8_37_pinmux { pinctrl-0 = <&P8_37_pruout_pin>; }; /* pr2_pru0_gpo5 */
+ P8_24_pinmux { pinctrl-0 = <&P8_24_pruout_pin>; }; /* pr2_pru0_gpo5 */
+
+ P8_38_pinmux { pinctrl-0 = <&P8_38_pruout_pin>; }; /* pr2_pru0_gpo6 */
+ P8_05_pinmux { pinctrl-0 = <&P8_05_pruout_pin>; }; /* pr2_pru0_gpo6 */
+
+ P8_36_pinmux { pinctrl-0 = <&P8_36_pruout_pin>; }; /* pr2_pru0_gpo7 */
+ P8_06_pinmux { pinctrl-0 = <&P8_06_pruout_pin>; }; /* pr2_pru0_gpo7 */
+
+ P8_34_pinmux { pinctrl-0 = <&P8_34_pruout_pin>; }; /* pr2_pru0_gpo8 */
+ P8_23_pinmux { pinctrl-0 = <&P8_23_pruout_pin>; }; /* pr2_pru0_gpo8 */
+
+ P8_35_pinmux { pinctrl-0 = <&P8_35_pruout_pin>; }; /* pr2_pru0_gpo9 */
+ P8_22_pinmux { pinctrl-0 = <&P8_22_pruout_pin>; }; /* pr2_pru0_gpo9 */
+
+ P8_33_pinmux { pinctrl-0 = <&P8_33_pruout_pin>; }; /* pr2_pru0_gpo10 */
+ P8_03_pinmux { pinctrl-0 = <&P8_03_pruout_pin>; }; /* pr2_pru0_gpo10 */
+
+ P8_31_pinmux { pinctrl-0 = <&P8_31_pruout_pin>; }; /* pr2_pru0_gpo11 */
+ P8_04_pinmux { pinctrl-0 = <&P8_04_pruout_pin>; }; /* pr2_pru0_gpo11 */
+
+
+ P9_11_pinmux { pinctrl-0 = <&P9_11_pruout_pin>; }; /* pr2_pru0_gpo */
+
+ P9_13_pinmux { pinctrl-0 = <&P9_13_pruout_pin>; }; /* pr2_pru0_gpo */
+ P8_17_pinmux { pinctrl-0 = <&P8_17_pruout_pin>; }; /* pr2_pru0_gpo */
+
+ P8_28_pinmux { pinctrl-0 = <&P8_28_pruout_pin>; }; /* pr2_pru0_gpo */
+ P8_29_pinmux { pinctrl-0 = <&P8_29_pruout_pin>; }; /* pr2_pru0_gpo */
+ P8_30_pinmux { pinctrl-0 = <&P8_30_pruout_pin>; }; /* pr2_pru0_gpo */
+ P8_08_pinmux { pinctrl-0 = <&P8_08_pruout_pin>; }; /* pr2_pru0_gpo */
+};
\ No newline at end of file
--
GitLab
From d7b4757af8310b395412e7478139eb40bc38af36 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 16:55:01 +0530
Subject: [PATCH 81/86] Bone PRU2_1 DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BBAI-PRUOUT_PRU2_1.dts | 48 +++++++++++++++++++++++++
1 file changed, 48 insertions(+)
create mode 100644 src/arm/overlays/BBAI-PRUOUT_PRU2_1.dts
diff --git a/src/arm/overlays/BBAI-PRUOUT_PRU2_1.dts b/src/arm/overlays/BBAI-PRUOUT_PRU2_1.dts
new file mode 100644
index 00000000..946065c1
--- /dev/null
+++ b/src/arm/overlays/BBAI-PRUOUT_PRU2_1.dts
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Virtual cape for pr2_pru1_gpo* pins
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+/plugin/;
+
+/*
+* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+*/
+&{/chosen} {
+ overlays {
+ BBAI-PRUOUT_PRU2_1 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/lorforlinux/BeagleBoard-DeviceTrees/blob/compatibility/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P8_07_pinmux { pinctrl-0 = <&P8_07_pruout_pin>; }; /* pr2_pru1_gpo16 */
+ P8_09_pinmux { pinctrl-0 = <&P8_09_pruout_pin>; }; /* pr2_pru1_gpo6 */
+ P8_10_pinmux { pinctrl-0 = <&P8_10_pruout_pin>; }; /* pr2_pru1_gpo15 */
+ P8_27_pinmux { pinctrl-0 = <&P8_27_pruout_pin>; }; /* pr2_pru1_gpo17 */
+ P8_32_pinmux { pinctrl-0 = <&P8_32_pruout_pin>; }; /* pr2_pru1_gpo0 */
+ P8_43_pinmux { pinctrl-0 = <&P8_43_pruout_pin>; }; /* pr2_pru1_gpo20 */
+ P8_45_pinmux { pinctrl-0 = <&P8_45_pruout_pin>; }; /* pr2_pru1_gpo18 */
+ P8_46_pinmux { pinctrl-0 = <&P8_46_pruout_pin>; }; /* pr2_pru1_gpo19 */
+
+ P9_17_pinmux { pinctrl-0 = <&P9_17_pruout_pin>; }; /* pr2_pru1_gpo9 */
+ P9_18_pinmux { pinctrl-0 = <&P9_18_pruout_pin>; }; /* pr2_pru1_gpo8 */
+ P9_25_pinmux { pinctrl-0 = <&P9_25_pruout_pin>; }; /* pr2_pru1_gpo5 */
+ P9_28_pinmux { pinctrl-0 = <&P9_28_pruout_pin>; }; /* pr2_pru1_gpo13 */
+ P9_29_pinmux { pinctrl-0 = <&P9_29_pruout_pin>; }; /* pr2_pru1_gpo11 */
+ P9_30_pinmux { pinctrl-0 = <&P9_30_pruout_pin>; }; /* pr2_pru1_gpo12 */
+ P9_31_pinmux { pinctrl-0 = <&P9_31_pruout_pin>; }; /* pr2_pru1_gpo10 */
+};
+
+
+
--
GitLab
From ab8731d919220247cbd641dc4d91a412bd8ac4d7 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 17:02:13 +0530
Subject: [PATCH 82/86] Motor Cape DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BBORG_MOTOR-00A2.dts | 110 ++++++++++++++++++++++++++
1 file changed, 110 insertions(+)
create mode 100644 src/arm/overlays/BBORG_MOTOR-00A2.dts
diff --git a/src/arm/overlays/BBORG_MOTOR-00A2.dts b/src/arm/overlays/BBORG_MOTOR-00A2.dts
new file mode 100644
index 00000000..8dda82f6
--- /dev/null
+++ b/src/arm/overlays/BBORG_MOTOR-00A2.dts
@@ -0,0 +1,110 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Based on BBORG_MOTOR-00A2.dts from Robert Nelson for kernel <4.14
+ * Copyright (C) 2018 Robert Nelson <robertcnelson@gmail.com>
+ *
+ * Note: Requires Compaibility code from BeagleBoard-DeviceTrees/pull/17
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+ */
+&{/chosen} {
+ overlays {
+ BBORG_MOTOR-00A2 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Free up the pins used by the cape from the pinmux helpers.
+ */
+&ocp {
+ P8_13_pinmux { status = "disabled"; }; /* motor3 speed */
+ P8_14_pinmux { status = "disabled"; }; /* motor3 direction */
+ P8_16_pinmux { status = "disabled"; }; /* motor2 direction */
+ P8_18_pinmux { status = "disabled"; }; /* motor1 direction */
+ P8_19_pinmux { status = "disabled"; }; /* motor4 speed */
+ P8_26_pinmux { status = "disabled"; }; /* motor4 direction */
+ P9_14_pinmux { status = "disabled"; }; /* motor2 speed */
+ P9_16_pinmux { status = "disabled"; }; /* motor1 speed */
+};
+
+/*
+ * Enable and Update the default state of the pins
+ */
+&ocp {
+ P8_13_pinmux { status = "okay"; pinctrl-0 = <&P8_13_pwm_pin>; }; /* motor3 speed */
+ P8_14_pinmux { status = "okay"; pinctrl-0 = <&P8_14_gpio_pin>; }; /* motor3 direction */
+ P8_16_pinmux { status = "okay"; pinctrl-0 = <&P8_16_gpio_pin>; }; /* motor2 direction */
+ P8_18_pinmux { status = "okay"; pinctrl-0 = <&P8_18_gpio_pin>; }; /* motor1 direction */
+ P8_19_pinmux { status = "okay"; pinctrl-0 = <&P8_19_pwm_pin>; }; /* motor4 speed */
+ P8_26_pinmux { status = "okay"; pinctrl-0 = <&P8_26_gpio_pin>; }; /* motor4 direction */
+ P9_14_pinmux { status = "okay"; pinctrl-0 = <&P9_14_pwm_pin>; }; /* motor2 speed */
+ P9_16_pinmux { status = "okay"; pinctrl-0 = <&P9_16_pwm_pin>; }; /* motor1 speed */
+};
+
+// Motor 1, 2
+&bone_pwmss_1 {
+ status = "okay";
+};
+
+&bone_pwm_1 {
+ status = "okay";
+};
+
+// Motor 3, 4
+&bone_pwmss_2 {
+ status = "okay";
+};
+
+&bone_pwm_2 {
+ status = "okay";
+};
+
+
+/*
+ * Easy Motor direction control through sysfs (/sys/class/leds/motor*) using gpio-leds driver
+ * See these files for the led_P8_#/led_P9_# definition
+ * https://github.com/beagleboard/BeagleBoard-DeviceTrees/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/beagleboard/BeagleBoard-DeviceTrees/src/arm/bbb-bone-buses.dtsi
+ *
+ */
+&{/} {
+ leds {
+ // Motor 1
+ led_P8_18 {
+ status = "okay";
+ label = "motor1";
+ default-state = "off";
+ };
+
+ // Motor 2
+ led_P8_16 {
+ status = "okay";
+ label = "motor2";
+ default-state = "off";
+ };
+
+ // Motor 3
+ led_P8_14 {
+ status = "okay";
+ label = "motor3";
+ default-state = "off";
+ };
+
+ // Motor 4
+ led_P8_26 {
+ status = "okay";
+ label = "motor4";
+ default-state = "off";
+ };
+ };
+};
--
GitLab
From b59097ccb856c67d2d4e50b01d85a4d044e54551 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 17:02:42 +0530
Subject: [PATCH 83/86] Servo Cape DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BBORG_SERVO-00A2.dts | 83 +++++++++++++++++++++++++++
1 file changed, 83 insertions(+)
create mode 100644 src/arm/overlays/BBORG_SERVO-00A2.dts
diff --git a/src/arm/overlays/BBORG_SERVO-00A2.dts b/src/arm/overlays/BBORG_SERVO-00A2.dts
new file mode 100644
index 00000000..cca2c657
--- /dev/null
+++ b/src/arm/overlays/BBORG_SERVO-00A2.dts
@@ -0,0 +1,83 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+ */
+&{/chosen} {
+ overlays {
+ BBORG_SERVO-00A2 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Free up the pins used by the cape from the pinmux helpers.
+ */
+&ocp {
+ P8_12_pinmux { status = "disabled"; }; /* IN1 */
+ P8_11_pinmux { status = "disabled"; }; /* IN2 */
+ P9_30_pinmux { status = "disabled"; }; /* IN3 */
+ P9_27_pinmux { status = "disabled"; }; /* IN4 */
+ P9_41_pinmux { status = "disabled"; }; /* IN5 */
+ P9_42_pinmux { status = "disabled"; }; /* IN6 */
+
+ P9_19_pinmux { status = "disabled"; }; /* i2c2.scl */
+ P9_20_pinmux { status = "disabled"; }; /* i2c2.sda */
+ P8_10_pinmux { status = "disabled"; }; /* pca9685.enable */
+};
+
+/*
+ * Enable and Update the default state of the pins
+ * For pinctrl-0 values see these file
+ * BeagleBoard-DeviceTrees/src/arm/am572x-bone-common-univ.dtsi
+ * BeagleBoard-DeviceTrees/src/arm/am335x-bone-common-univ.dtsi
+ */
+&ocp {
+ P8_12_pinmux { status = "okay"; pinctrl-0 = <&P8_12_gpio_input_pin>; }; /* IN1 */
+ P8_11_pinmux { status = "okay"; pinctrl-0 = <&P8_11_gpio_input_pin>; }; /* IN2 */
+ P9_30_pinmux { status = "okay"; pinctrl-0 = <&P9_30_gpio_input_pin>; }; /* IN3 */
+ P9_27_pinmux { status = "okay"; pinctrl-0 = <&P9_27_gpio_input_pin>; }; /* IN4 */
+ P9_41_pinmux { status = "okay"; pinctrl-0 = <&P9_41_gpio_input_pin>; }; /* IN5 */
+ P9_42_pinmux { status = "okay"; pinctrl-0 = <&P9_42_gpio_input_pin>; }; /* IN6 */
+
+ P9_19_pinmux { status = "okay"; pinctrl-0 = <&P9_19_i2c_pin>; }; /* i2c_scl */
+ P9_20_pinmux { status = "okay"; pinctrl-0 = <&P9_20_i2c_pin>; }; /* i2c_sda */
+ P8_10_pinmux { status = "okay"; pinctrl-0 = <&P8_10_gpio_pin>; }; /* pca9685.enable */
+};
+
+&bone_i2c_2 {
+ // bone_i2c_2 is enabled by default on BBB and BBAI for cape EEPROM
+ // status = "okay";
+ // clock-frequency = <100000>;
+ // #address-cells = <1>;
+ // #size-cells = <0>;
+
+ pca: pca@70 {
+ compatible = "nxp,pca9685-pwm";
+ #pwm-cells = <2>;
+ reg = <0x70>;
+ label = "pca9685_servo";
+ /* invert; */
+ /* open-drain; */
+ };
+};
+
+&{/} {
+ leds {
+ led_P8_10 {
+ status = "okay";
+ label = "pca9685-enable";
+ // pca9685 Chip enable is ACTIVE-LOW but LEDs are set to ACTIVE-HIGH
+ // Set default-state to "off" to enable the pca9685 chip by default.
+ default-state = "off";
+ };
+ };
+};
\ No newline at end of file
--
GitLab
From 96a9f501b697863ed8450d63e75823373d8f5df7 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 17:03:28 +0530
Subject: [PATCH 84/86] Load Cape DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BBORG_LOAD-00A2.dts | 106 +++++++++++++++++++++++++++
1 file changed, 106 insertions(+)
create mode 100644 src/arm/overlays/BBORG_LOAD-00A2.dts
diff --git a/src/arm/overlays/BBORG_LOAD-00A2.dts b/src/arm/overlays/BBORG_LOAD-00A2.dts
new file mode 100644
index 00000000..39c52352
--- /dev/null
+++ b/src/arm/overlays/BBORG_LOAD-00A2.dts
@@ -0,0 +1,106 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+ */
+&{/chosen} {
+ overlays {
+ BBORG_RELAY-00A2 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Free up the pins used by the cape from the pinmux helpers.
+ */
+&ocp {
+ P9_42_pinmux { status = "disabled"; }; /* Sink1 */
+ P9_41_pinmux { status = "disabled"; }; /* Sink2 */
+ P9_30_pinmux { status = "disabled"; }; /* Sink3 */
+ P9_27_pinmux { status = "disabled"; }; /* Sink4 */
+ P8_12_pinmux { status = "disabled"; }; /* Sink5 */
+ P8_11_pinmux { status = "disabled"; }; /* Sink6 */
+ P8_15_pinmux { status = "disabled"; }; /* Sink7 */
+ P8_17_pinmux { status = "disabled"; }; /* Sink8 */
+};
+
+/*
+ * Enable and Update the default state of the pins
+ */
+&ocp {
+ P9_42_pinmux { status = "okay"; pinctrl-0 = <&P9_42_gpio_pin>; }; /* Sink1 */
+ P9_41_pinmux { status = "okay"; pinctrl-0 = <&P9_41_gpio_pin>; }; /* Sink2 */
+ P9_30_pinmux { status = "okay"; pinctrl-0 = <&P9_30_gpio_pin>; }; /* Sink3 */
+ P9_27_pinmux { status = "okay"; pinctrl-0 = <&P9_27_gpio_pin>; }; /* Sink4 */
+ P8_12_pinmux { status = "okay"; pinctrl-0 = <&P8_12_gpio_pin>; }; /* Sink5 */
+ P8_11_pinmux { status = "okay"; pinctrl-0 = <&P8_11_gpio_pin>; }; /* Sink6 */
+ P8_15_pinmux { status = "okay"; pinctrl-0 = <&P8_15_gpio_pin>; }; /* Sink7 */
+ P8_17_pinmux { status = "okay"; pinctrl-0 = <&P8_17_gpio_pin>; }; /* Sink8 */
+};
+
+/*
+ * Easy load control through sysfs (/sys/class/leds/) using gpio-leds driver
+ * See these files for the led_P8_#/led_P9_# definition
+ * https://github.com/beagleboard/BeagleBoard-DeviceTrees/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/beagleboard/BeagleBoard-DeviceTrees/src/arm/bbb-bone-buses.dtsi
+ *
+ */
+&{/} {
+ leds {
+ led_P9_42 {
+ status = "okay";
+ label = "load-sink1";
+ default-state = "keep";
+ };
+
+ led_P9_41 {
+ status = "okay";
+ label = "load-sink2";
+ default-state = "keep";
+ };
+
+ led_P9_30 {
+ status = "okay";
+ label = "load-sink3";
+ default-state = "keep";
+ };
+
+ led_P9_27 {
+ status = "okay";
+ label = "load-sink4";
+ default-state = "keep";
+ };
+
+ led_P8_12 {
+ status = "okay";
+ label = "load-sink5";
+ default-state = "keep";
+ };
+
+ led_P8_11 {
+ status = "okay";
+ label = "load-sink6";
+ default-state = "keep";
+ };
+
+ led_P8_15 {
+ status = "okay";
+ label = "load-sink7";
+ default-state = "keep";
+ };
+
+ led_P8_17 {
+ status = "okay";
+ label = "load-sink8";
+ default-state = "keep";
+ };
+ };
+};
\ No newline at end of file
--
GitLab
From 1281a303ad754f2bff9f7907139048cc9158a321 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 17:03:48 +0530
Subject: [PATCH 85/86] Relay Cape DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BBORG_RELAY-00A2.dts | 84 +++++++++++++++++++++++++++
1 file changed, 84 insertions(+)
create mode 100644 src/arm/overlays/BBORG_RELAY-00A2.dts
diff --git a/src/arm/overlays/BBORG_RELAY-00A2.dts b/src/arm/overlays/BBORG_RELAY-00A2.dts
new file mode 100644
index 00000000..1ae54a21
--- /dev/null
+++ b/src/arm/overlays/BBORG_RELAY-00A2.dts
@@ -0,0 +1,84 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Based on the BBORG_RELAY-00A2.dts written by
+ * Robert Nelson & Amilcar Lucas for kernel <4.14
+ * Copyright (C) 2015 Robert Nelson <robertcnelson@gmail.com>
+ * Copyright (C) 2019 Amilcar Lucas <amilcar.lucas@iav.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+ */
+&{/chosen} {
+ overlays {
+ BBORG_RELAY-00A2 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Free up the pins used by the cape from the pinmux helpers.
+ */
+&ocp {
+ P9_41_pinmux { status = "disabled"; };
+ P9_42_pinmux { status = "disabled"; };
+ P9_30_pinmux { status = "disabled"; };
+ P9_27_pinmux { status = "disabled"; };
+};
+
+/*
+ * Enable and Update the default state of the pins
+ */
+&ocp {
+ P9_41_pinmux { status = "okay"; pinctrl-0 = <&P9_41_gpio_pin>;};
+ P9_42_pinmux { status = "okay"; pinctrl-0 = <&P9_42_gpio_pin>;};
+ P9_30_pinmux { status = "okay"; pinctrl-0 = <&P9_30_gpio_pin>;};
+ P9_27_pinmux { status = "okay"; pinctrl-0 = <&P9_27_gpio_pin>;};
+};
+
+/*
+ * Easy relay control through sysfs (/sys/class/leds/) using gpio-leds driver
+ * See these files for the led_P8_#/led_P9_# definition
+ * https://github.com/beagleboard/BeagleBoard-DeviceTrees/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/beagleboard/BeagleBoard-DeviceTrees/src/arm/bbb-bone-buses.dtsi
+ *
+ */
+&{/} {
+ leds {
+
+ // relay1
+ led_P9_41{
+ status = "okay";
+ label = "relay1";
+ default-state = "keep";
+ };
+
+ // relay2
+ led_P9_42{
+ status = "okay";
+ label = "relay2";
+ default-state = "keep";
+ };
+
+ // realy3
+ led_P9_30{
+ status = "okay";
+ label = "relay3";
+ default-state = "keep";
+ };
+
+ // realy4
+ led_P9_27{
+ status = "okay";
+ label = "relay4";
+ default-state = "keep";
+ };
+ };
+};
\ No newline at end of file
--
GitLab
From 1d138e5934af5da2e54ab7d448e91d1b10d3d942 Mon Sep 17 00:00:00 2001
From: Deepak Khatri <deepaklorkhatri7@gmail.com>
Date: Wed, 12 Aug 2020 17:04:08 +0530
Subject: [PATCH 86/86] Comms Cape DT overlay
This overlay is compatible with BBBWL/BBB/BBAI when used with compatibility layer from beagleboard/BeagleBoard-DeviceTrees/pull/18.
---
src/arm/overlays/BBORG_COMMS-00A2.dts | 69 +++++++++++++++++++++++++++
1 file changed, 69 insertions(+)
create mode 100644 src/arm/overlays/BBORG_COMMS-00A2.dts
diff --git a/src/arm/overlays/BBORG_COMMS-00A2.dts b/src/arm/overlays/BBORG_COMMS-00A2.dts
new file mode 100644
index 00000000..119bd204
--- /dev/null
+++ b/src/arm/overlays/BBORG_COMMS-00A2.dts
@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) 2020 Deepak Khatri <deepaklorkhatri7@gmail.com>
+ *
+ * Based on older BBORG_COMMS-00A2.dts for kernel <4.14x
+ * Copyright (C) 2012,2019 Texas Instruments Incorporated - http://www.ti.com/
+ * Copyright (C) 2015 Robert Nelson <robertcnelson@gmail.com>
+ * Copyright (C) 2015 Sebastian Jegerås
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/dts-v1/;
+/plugin/;
+
+/*
+ * Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
+ */
+&{/chosen} {
+ overlays {
+ BBORG_COMMS-00A2 = __TIMESTAMP__;
+ };
+};
+
+/*
+ * Update the default pinmux of the pins.
+ * See these files for the phandles (&P9_* & &P8_*)
+ * https://github.com/beagleboard/BeagleBoard-DeviceTrees/src/arm/am335x-bone-common-univ.dtsi
+ * https://github.com/beagleboard/BeagleBoard-DeviceTrees/src/arm/am572x-bone-common-univ.dtsi
+ */
+&ocp {
+ P9_24_pinmux { pinctrl-0 = <&P9_24_can_pin>; }; /* CAN TX */
+ P9_26_pinmux { pinctrl-0 = <&P9_26_can_pin>; }; /* CAN TX */
+ P9_13_pinmux { pinctrl-0 = <&P9_13_uart_pin>; }; /* UART TX */
+ P9_11_pinmux { pinctrl-0 = <&P9_11_uart_pin>; }; /* UART RX */
+ P9_15_pinmux { pinctrl-0 = <&P9_15_gpio_pin>; }; /* GPIO: SINK A*/
+ P9_23_pinmux { pinctrl-0 = <&P9_23_gpio_pin>; }; /* GPIO: SINK B */
+};
+
+/*
+ * See these files for the phandles (&bone_*) and nodes
+ * https://github.com/beagleboard/BeagleBoard-DeviceTrees/src/arm/bbai-bone-buses.dtsi
+ * https://github.com/beagleboard/BeagleBoard-DeviceTrees/src/arm/bbb-bone-buses.dtsi
+ */
+&bone_can_1 {
+ status = "okay";
+};
+
+&bone_uart_4 {
+ status = "okay";
+};
+
+&{/} {
+ leds {
+ // SINK A
+ led_P9_15 {
+ status = "okay";
+ label = "Sink_A";
+ default-state = "off";
+ };
+ // SINK B
+ led_P9_23 {
+ status = "okay";
+ label = "Sink_B";
+ default-state = "off";
+ };
+ };
+};
--
GitLab