- Apr 02, 2016
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Anas Nashif authored
Change-Id: Ie223f458776c81439db8cd4c3a25b4753599588b Signed-off-by:
Anas Nashif <anas.nashif@intel.com>
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Anas Nashif authored
Change-Id: I66c71f7322e1529d7b5bfda5b29eeb078b13daf1 Signed-off-by:
Anas Nashif <anas.nashif@intel.com>
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- Apr 01, 2016
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Daniel Leung authored
Or else, PINMUX_NUM_PINS is not found. Change-Id: I48c173395f2cda72e8915c46aad964e83509a605 Signed-off-by:
Daniel Leung <daniel.leung@intel.com>
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Anas Nashif authored
Set the target to ARC to speed up flashing. the difference: before downloaded 27320 bytes in 50.685825s (0.526 KiB/s) after downloaded 27320 bytes in 3.396626s (7.855 KiB/s) Change-Id: I53ca26f97eefd40e869662b137f5a659082aa478 Signed-off-by:
Anas Nashif <anas.nashif@intel.com>
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Maciek Borzecki authored
Change-Id: I72a4947119f1f2b6fcd59fadbe38a54b6bc1ea61 Signed-off-by:
Maciej Borzecki <maciek.borzecki@gmail.com>
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Maciek Borzecki authored
Exclude STM32F103RB based platforms from the test. The SRAM is overflown by 14kB. Change-Id: I37c2905ed2706a89d9a199bc49518937659ac997 Signed-off-by:
Maciej Borzecki <maciek.borzecki@gmail.com>
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Maciek Borzecki authored
For STM32F103RB targets, the SRAM is overflown by 2-3kB in microkernel test. Platforms with this SoC can still be built for in the nanokernel test. Change-Id: I012b93cf8dfec74292f7ab228f4b2fca1a4f3444 Signed-off-by:
Maciej Borzecki <maciek.borzecki@gmail.com>
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Maciek Borzecki authored
Exclude STM32F103RB platform from the test. The SRAM is overflown by >20kB, while the CPU itself has 20kB of SRAM. Change-Id: Ic9aad6b88d517b62f4a18901cd698ba9a9defb40 Signed-off-by:
Maciej Borzecki <maciek.borzecki@gmail.com>
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Maciek Borzecki authored
Disable the test for STM32 based platforms until an implementation of timestamp counter becomes available. Change-Id: I2e50dac36dbfdc61081610c0e0cf1ace8892f602 Signed-off-by:
Maciej Borzecki <maciek.borzecki@gmail.com>
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Maciek Borzecki authored
Take advantage of shell_init() accepting const commands array. This moves ~280 bytes from SRAM to the text section. Change-Id: Id64ee766e3c6cf7ce4cc623a1e21d3dacf33f050 Signed-off-by:
Maciek Borzecki <maciek.borzecki@gmail.com>
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Maciek Borzecki authored
Take advantage of shell_init() accepting const commands array. Change-Id: Ie8c023de62cda75f7057184555806401f0381a1a Signed-off-by:
Maciej Borzecki <maciek.borzecki@gmail.com>
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Maciek Borzecki authored
The commands array is not expected to change and can be declared const. This allows callers to cleanly declare their commands lists as const, effectively moving the structures from SRAM to code section. Change-Id: Ie1710622b8cfa609e129eb79712f910f1d1aace3 Signed-off-by:
Maciej Borzecki <maciek.borzecki@gmail.com>
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Maciek Borzecki authored
Enable build tests for Nucleo-F103RB and STM32 MINI A15 platforms. Change-Id: I26ccdb6edd537f5dfc9c0120e5a6d4ee1ed63dbb Signed-off-by:
Maciek Borzecki <maciek.borzecki@gmail.com>
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Vlad Dogaru authored
The comments in the sensor header specify that pressure should be expressed in kPa, but the bmp280 driver returns a value in Pa. Change-Id: I6d5346db250d1a01a1e5e31fb1d8685ab5dc405b Signed-off-by:
Vlad Dogaru <vlad.dogaru@intel.com>
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Baohong Liu authored
SPI flash depends on SPI. Enable the SPI flash driver only when SPI is enabled. Change-Id: I902588b806a4a5773fddb58a7567a8e0d4ba9fe0 Signed-off-by:
Baohong Liu <baohong.liu@intel.com>
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Lei Liu authored
Fixes this built error: zephyr/drivers/pinmux/dev/pinmux_dev_quark_mcu.c:138:18: error: 'PINMUX_BASE_ADDR' undeclared here (not in a function) .base_address = PINMUX_BASE_ADDR, Change-Id: I54f15bc262cb887117f7b56660bcf85983daa877 Signed-off-by:
liu.lei <lei.a.liu@intel.com>
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Arkadiusz Lichwa authored
From now on user/app has possibility to dismiss Passkey Notify authentication on acceptor side even with DisplayOnly interface. The action on 'Cancel' API in this case is disconnection. Change-Id: I4be198482c23c0ccaeb0112b72ff269037e03583 Signed-off-by:
Arkadiusz Lichwa <arkadiusz.lichwa@tieto.com>
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Luiz Augusto von Dentz authored
Some devices may actually lose track of CCC setting so this is required to work around the problem, in case the device does work track CCC properly the extra write shall not cause anything more than one extra round trip thus it is probably work doing it anyway. Change-Id: I9e5ed3fa459e4617c6fae094d0ce0f80cb2682e4 Signed-off-by:
Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
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Andrei Emeltchenko authored
Implement bt_gatt_attr_read_cud() making working peripheral_esp app. Change-Id: Ic9634bf31a39ae9cd55279de34ee4c0c0995a4dd Signed-off-by:
Andrei Emeltchenko <andrei.emeltchenko@intel.com>
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Johan Hedberg authored
Deal with controllers that don't support controller to host control. This may potentially lead to dropped packets so make a clear warning log of the issue. Change-Id: Ie8fdaed826a072fd157343721222f618328d59a3 Signed-off-by:
Johan Hedberg <johan.hedberg@intel.com>
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Johan Hedberg authored
Reading supported commands isn't an LE-specific feature, so the command should be in common_init() rather than le_init(). Change-Id: I613bbe8d39b4c2b6dadc45a710bc59568ec9b488 Signed-off-by:
Johan Hedberg <johan.hedberg@intel.com>
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- Mar 31, 2016
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Anas Nashif authored
Change-Id: I36fd9b96d247184b4a986467f1609a9c3b0cbd9f Signed-off-by:
Anas Nashif <anas.nashif@intel.com>
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Peter Mitsis authored
Splits the test into two clear sub-categories: microkernel and nanokernel. This is done to maintain consistency with other tests that do the same (e.g. test_obj_tracing, test_sema, test_stackprot, test_timer). Change-Id: Iddb1ec8d569a9d953fb8af5ce08e87b51995f821 Signed-off-by:
Peter Mitsis <peter.mitsis@windriver.com>
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Tomasz Bursztyka authored
It will extensively test all provided functions within a normal usage of the API. Change-Id: I723203a29c3f3416b464030a7fe34eac5fff6095 Signed-off-by:
Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
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Tomasz Bursztyka authored
As for double linked list provided through misc/dlist.h, this provides a generic API for single linked list in misc/slist.h. It follows the same naming rule as in dlist.h Change-Id: I955bd16a201bc9987c29f5a9e3e3d8447682a71e Signed-off-by:
Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
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Peter Mitsis authored
Fixes line length and whitespace issues flagged by the checkpatch tool. Change-Id: Id49cd5341571ac7893929a2836fe5e06166abe06 Signed-off-by:
Peter Mitsis <peter.mitsis@windriver.com>
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Sebastien Griffoul authored
When an ethernet frame is larger than UIP_BUFSIZE, a net_buf is allocated but never released. Therefore after few bad frames, no more RX network packet can be received. Fixed by allocating the net_buf after checking the frame length. Change-Id: I436487e3c26d739de347b4db6facc3a3dbebbe75 Signed-off-by:
Sebastien Griffoul <sebastien.griffoul@intel.com>
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Yannis Damigos authored
Reduces the amount of memory allocated for fiber's stack. This permits the test_context to compile on boards like nucleo-f103rb. Sanitycheck script passes all test for test-context. This patch was verified on the emulated platforms and not against real hardware boards. Change-Id: I219f63063ee2dca5b0326e25141d8b37f4cd1d74 Signed-off-by:
Yannis Damigos <giannis.damigos@gmail.com>
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Yannis Damigos authored
Reduces the amount of memory allocated for task's stack. This permits the test_pool to compile on boards like nucleo-f103rb. Sanitycheck script passes all test for test-nano. This patch was verified on the emulated platforms and not against real hardware boards. Change-Id: Ib8041f6d91e8ffc5fcb16dc73de1f7662d9596da Signed-off-by:
Yannis Damigos <giannis.damigos@gmail.com>
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Yannis Damigos authored
Reduces the amount of memory allocated for stack (both fiber and task). This permits test_sema and test_mutex to compile on boards like nucleo-f103rb. Sanitycheck script passes all tests for test_sema and test_mutex. This patch was verified on the emulated platforms and not against real hardware boards. Change-Id: Ie25288bbbbfa64bfc5f7463639bfb09639cc184f Signed-off-by:
Yannis Damigos <giannis.damigos@gmail.com>
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Daniel Leung authored
Remove those kconfig options that are SoC specific, and should not be configurable via kconfig. This also separates IRQ_PRI into one for DW and one for QMSI, to follow the convention of every other drivers. Change-Id: I338f819f71c18fa9e17015e8a588a3d0207350c6 Signed-off-by:
Daniel Leung <daniel.leung@intel.com>
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Daniel Leung authored
Remove those kconfig options that are SoC specific, and should not be configurable via kconfig. Change-Id: Ic73783189db57059d2b7f3727e4802e1b2e27931 Signed-off-by:
Daniel Leung <daniel.leung@intel.com>
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Daniel Leung authored
Remove those kconfig options that are SoC specific, and should not be configurable via kconfig. Change-Id: Ifd65097a65f80539cac073f95aadc2d8e42efb9f Signed-off-by:
Daniel Leung <daniel.leung@intel.com>
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Daniel Leung authored
This extends the pwm_dw sample app to build for FRDM_K64F board also. Because of this, pwm_dw has been renamed to pwm. This allows us to put it through sanity test to catch build breakage. Change-Id: Ie4d7442af43ede58f4cec0ec28643384a685321a Signed-off-by:
Daniel Leung <daniel.leung@intel.com>
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Daniel Leung authored
Remove those kconfig options that are SoC specific, and should not be configurable via kconfig. Change-Id: Ifdbb5e3a997795ef577350d88f8cb06877eb6463 Signed-off-by:
Daniel Leung <daniel.leung@intel.com>
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Daniel Leung authored
Remove those kconfig options that are SoC specific, and should not be configurable via kconfig. Change-Id: Ib8158f00a6c6616360ddbcf63981f1a85911c1b9 Signed-off-by:
Daniel Leung <daniel.leung@intel.com>
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Dmitriy Korovkin authored
On Galileo Gen2 board SPI uses GPIO pin for CS. Thus spi_intel driver must be initialized after gpio_dw, so it's init level must be more that gpio_dw's one. Change-Id: If2e5fb1106afe01e5567cf3fe72063bdc94ad3d2 Signed-off-by:
Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
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Dmitriy Korovkin authored
Change-Id: Ifd977289c92d3c88ee2ca93dd964307372d49ca0 Signed-off-by:
Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
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Dmitriy Korovkin authored
GCC enables unaligned memory access for ARMv6 and above. Once unaligned memory access is allowed, there's no need for the unaligned memory access trap. The change prevents the situation when the compiler generates code that uses unaligned memory access, but the CPU generates an exception when this code runs. Change-Id: Id33f2264c631772e5c561e76fb579d8b7bc26e1e Signed-off-by:
Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
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Andre Guedes authored
This patch extends the i2c shim driver so it supports the 'default configuration' infrastructure which enables the user to specify a default configuration for the I2C device. The default configuration is set during driver initialization. This patch also changes Quark SE and D2000 Kconfig.defconfig files so the i2c default configuration is set to '0x12' which means standard bus speed, 7-bit addressing and master mode. This is the same value used when DW driver is selected, by the way. Change-Id: I06e0dc3c29e8da2f3317db5bef285177f2e92c9a Signed-off-by:
Andre Guedes <andre.guedes@intel.com>
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